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We thus remove the `gimple_fold_builtin' changes that would have replaced the dot-product builtin calls with DOT_PROD_EXPRs as well as the novel initialization mechanism for dot-product builtins, choosing instead to redirect the single-mode CODE_FOR_neon_(u|s|us)dot* values generated from `arm_neon_builtins.def' to their new 2-mode equivalents. Regression tested on arm-none-linux-gnueabihf, no new failures identified. ------ Given recent changes to the dot_prod standard pattern name, this patch fixes the arm back-end by implementing the following changes: 1. Add 2nd mode to all patterns relating to the dot-product in .md files. 2. redirect the single-mode CODE_FOR_neon_(u|s|us)dot values generated from `arm_neon_builtins.def' to their new 2-mode equivalents via means of simple aliases, as per the following example: constexpr insn_code CODE_FOR_neon_sdotv8qi = CODE_FOR_neon_sdotv2siv8qi; gcc/ChangeLog: * config/arm/neon.md (dot_prod): Renamed to... (dot_prod): ...this. (neon_dot): Renamed to... (neon_dot): ...this. (neon_usdot): Renamed to... (neon_usdot): ...this. (usdot_prod): Renamed to... (usdot_prod): ...this. * config/arm/arm-builtins.cc (CODE_FOR_neon_sdotv8qi): Definie as alias to new CODE_FOR_neon_sdotv2siv8qi. (CODE_FOR_neon_udotv8qi): Definie as alias to new CODE_FOR_neon_udotv2siv8qi. (CODE_FOR_neon_usdotv8qi): Definie as alias to new CODE_FOR_neon_usdotv2siv8qi. (CODE_FOR_neon_sdotv16qi): Definie as alias to new CODE_FOR_neon_sdotv4siv16qi. (CODE_FOR_neon_udotv16qi): Definie as alias to new CODE_FOR_neon_udotv4siv16qi. (CODE_FOR_neon_usdotv16qi): Definie as alias to new CODE_FOR_neon_usdotv4siv16qi. --- gcc/config/arm/arm-builtins.cc | 7 +++++++ gcc/config/arm/neon.md | 8 ++++---- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc index c9d50bf8fbb..74cea8900b4 100644 --- a/gcc/config/arm/arm-builtins.cc +++ b/gcc/config/arm/arm-builtins.cc @@ -908,6 +908,13 @@ typedef struct { enum arm_type_qualifiers *qualifiers; } arm_builtin_datum; +constexpr insn_code CODE_FOR_neon_sdotv8qi = CODE_FOR_neon_sdotv2siv8qi; +constexpr insn_code CODE_FOR_neon_udotv8qi = CODE_FOR_neon_udotv2siv8qi; +constexpr insn_code CODE_FOR_neon_usdotv8qi = CODE_FOR_neon_usdotv2siv8qi; +constexpr insn_code CODE_FOR_neon_sdotv16qi = CODE_FOR_neon_sdotv4siv16qi; +constexpr insn_code CODE_FOR_neon_udotv16qi = CODE_FOR_neon_udotv4siv16qi; +constexpr insn_code CODE_FOR_neon_usdotv16qi = CODE_FOR_neon_usdotv4siv16qi; + #define CF(N,X) CODE_FOR_neon_##N##X #define VAR1(T, N, A) \ diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index fa4a7aeda35..6892b7b0f44 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2989,7 +2989,7 @@ (define_expand "cmul3" ;; ... ;; ;; and so the vectorizer provides r, in which the result has to be accumulated. -(define_insn "dot_prod" +(define_insn "dot_prod" [(set (match_operand:VCVTI 0 "register_operand" "=w") (plus:VCVTI (unspec:VCVTI [(match_operand: 1 "register_operand" "w") @@ -3002,7 +3002,7 @@ (define_insn "dot_prod" ) ;; These instructions map to the __builtins for the Dot Product operations -(define_expand "neon_dot" +(define_expand "neon_dot" [(set (match_operand:VCVTI 0 "register_operand" "=w") (plus:VCVTI (unspec:VCVTI [(match_operand: 2 "register_operand") @@ -3013,7 +3013,7 @@ (define_expand "neon_dot" ) ;; These instructions map to the __builtins for the Dot Product operations. -(define_insn "neon_usdot" +(define_insn "neon_usdot" [(set (match_operand:VCVTI 0 "register_operand" "=w") (plus:VCVTI (unspec:VCVTI @@ -3112,7 +3112,7 @@ (define_insn "neon_dot_laneq" ) ;; Auto-vectorizer pattern for usdot -(define_expand "usdot_prod" +(define_expand "usdot_prod" [(set (match_operand:VCVTI 0 "register_operand") (plus:VCVTI (unspec:VCVTI [(match_operand: 1 "register_operand") From patchwork Thu Sep 5 11:05:07 2024 Content-Type: text/plain; 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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(35042699022)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Sep 2024 11:05:19.5379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1a9af913-5dc5-43a9-c1a0-08dccd9aa164 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM1PEPF000252DD.eurprd07.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA6PR08MB10443 X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org Changes from previous revision: Rename new `check_effective_target' and tests to make their intent clearer. * lib/target-supports.exp: For new `check_effective_target', s/vect_dotprod_twoway/vect_dotprod_hisi/. * One test is renamed to `vect-dotprod-conv-optab.c' to emphasize aim of checking the new dotprod convert optab allows autovectorization of a given datatype to distinct target data-types. * The aarch64 runtime-correctness check has had the mode supported for its two-way dot-product added to the test name, resulting in the new `vect-dotprod-twoway-hisi.c' name. ------ Given the novel treatment of the dot product optab as a conversion, we are now able to target different relationships between output modes and input modes. This is made clearer by way of example. Previously, on AArch64, the following loop was vectorizable: uint32_t udot4(int n, uint8_t* data) { uint32_t sum = 0; for (int i=0; i + +uint32_t udot4(int n, uint8_t* data) { + uint32_t sum = 0; + for (int i=0; i +#include +#pragma GCC target "+sme2" + +uint32_t +udot2 (int n, uint16_t* data) __arm_streaming +{ + uint32_t sum = 0; + for (int i=0; i