From patchwork Thu Sep 5 01:21:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 97113 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E12DF385021C for ; Thu, 5 Sep 2024 01:22:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by sourceware.org (Postfix) with ESMTPS id 323173861037 for ; Thu, 5 Sep 2024 01:21:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 323173861037 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 323173861037 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725499303; cv=none; b=Ok+QIItNaJs0f2BDpJJRXKjIUFu48+yfWMa4fZoP79iyfvzTO1Xb5qQa1/G7hvtQeOZ6aBiGtvzFdHN+5MA3lhhdAyF9dkBgZXHhx8NPUTxUTN9mIBQ9TzQqcJ4Yk4cjZHGkntlF++m2tskYzgH4nib6fGmjpZRbf2UY7t+j1bE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725499303; c=relaxed/simple; bh=6xvZEeq2y7IUHvEZ76PUz07Q3C+5JVsKZZTWm5kLXxA=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=R4Ig3FBcS+ZdNDe1AAXC/NNn9a0cR8oT+QPN23QA87Qk4M2ogQQroWKAfTLG7p3PTG0CpGYHWFfj9FZtX05OXitksyo/71loIj+8zLfdXhcaou/9HBOcsHEYfXBW/wRPR6Hs+lrohD7nNuo2sxTfNSke/487fM3YbfnEOlQLtJU= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725499301; x=1757035301; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=6xvZEeq2y7IUHvEZ76PUz07Q3C+5JVsKZZTWm5kLXxA=; b=nOlHIeDhaGBCoKN+Z2/iMSFZdfbsSO0r+p68FDqJWIuK0E2Ert9oYgK6 4Wzi+QIyxpTIyrmqfZ7sMhqMF+S5I/gINNA3LxCeTbNQbWZkzItOtWlKo CXQT2kxpqiIi24aLYMKyGCil41KOG2LhMlKNKtQikDnbaFQfxM9xL+YRS OIX4t1O0LWVaGfsFr3VsLO5wuSoUrJ7HpVg8I9Oou3gyLy8XcET65E019 k1Bia9RhK+n6HNj4+mbbqCHNaCjCgxhA85xeI3yZPdKVcf6FPZg6WAHR7 lMNWXsPTuea83MVl9u0EFQbSnplGYDwFq0faOWdle1ZsSABK8YT6KjT0f A==; X-CSE-ConnectionGUID: vAWgpE2tSk+vGIDO2b/jjQ== X-CSE-MsgGUID: HToycxjhSHi6Jl+j5qCggA== X-IronPort-AV: E=McAfee;i="6700,10204,11185"; a="24337313" X-IronPort-AV: E=Sophos;i="6.10,203,1719903600"; d="scan'208";a="24337313" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2024 18:21:40 -0700 X-CSE-ConnectionGUID: a0OA6EkoQlGIMV+uiXIabQ== X-CSE-MsgGUID: whsqPI1ZRO64/Ta74/ugVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,203,1719903600"; d="scan'208";a="102902542" Received: from shliclel4217.sh.intel.com ([10.239.240.127]) by orviesa001.jf.intel.com with ESMTP; 04 Sep 2024 18:21:37 -0700 From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] Handle const0_operand for *avx2_pcmp3_1. Date: Thu, 5 Sep 2024 09:21:37 +0800 Message-Id: <20240905012137.1019518-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org *_eq3_1 supports nonimm_or_0_operand for op1 and op2, pass_combine would fail to lower avx512 comparision back to avx2 one when op1/op2 is const0_rtx. It's because the splitter only support nonimmediate_operand. Failed to match this instruction: (set (reg/i:V16QI 20 xmm0) (vec_merge:V16QI (const_vector:V16QI [ (const_int -1 [0xffffffffffffffff]) repeated x16 ]) (const_vector:V16QI [ (const_int 0 [0]) repeated x16 ]) (unspec:HI [ (reg:V16QI 105 [ a ]) (const_vector:V16QI [ (const_int 0 [0]) repeated x16 ]) (const_int 0 [0]) ] UNSPEC_PCMP))) The patch extend predicates of the splitter to handles that. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: PR target/115517 * config/i386/sse.md (*avx2_pcmp3_1): Change predicate of operands[1] and operands[2] from nonimmdiate_operand to nonimm_or_0_operand. gcc/testsuite/ChangeLog: * gcc.target/i386/pr115517.c: New test. --- gcc/config/i386/sse.md | 9 ++++-- gcc/testsuite/gcc.target/i386/pr115517.c | 38 ++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr115517.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3bf95f0b0e5..1946d3513be 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -17908,8 +17908,8 @@ (define_insn_and_split "*avx2_pcmp3_1" (match_operand:VI_128_256 1 "vector_all_ones_operand") (match_operand:VI_128_256 2 "const0_operand") (unspec: - [(match_operand:VI_128_256 3 "nonimmediate_operand") - (match_operand:VI_128_256 4 "nonimmediate_operand") + [(match_operand:VI_128_256 3 "nonimm_or_0_operand") + (match_operand:VI_128_256 4 "nonimm_or_0_operand") (match_operand:SI 5 "const_0_to_7_operand")] UNSPEC_PCMP)))] "TARGET_AVX512VL && ix86_pre_reload_split () @@ -17928,6 +17928,11 @@ (define_insn_and_split "*avx2_pcmp3_1" { if (INTVAL (operands[5]) == 1) std::swap (operands[3], operands[4]); + + operands[3] = force_reg (mode, operands[3]); + if (operands[4] == CONST0_RTX (mode)) + operands[4] = force_reg (mode, operands[4]); + enum rtx_code code = INTVAL (operands[5]) ? GT : EQ; emit_move_insn (operands[0], gen_rtx_fmt_ee (code, mode, operands[3], operands[4])); diff --git a/gcc/testsuite/gcc.target/i386/pr115517.c b/gcc/testsuite/gcc.target/i386/pr115517.c new file mode 100644 index 00000000000..e91d2c23a6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr115517.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-march=x86-64-v4 -O2" } */ +/* { dg-final { scan-assembler-times "vpcmpeq" 4 } } */ +/* { dg-final { scan-assembler-not {(?n)%k[0-9]} } } */ + +typedef char v16qi __attribute__((vector_size(16))); +typedef short v8hi __attribute__((vector_size(16))); +typedef int v4si __attribute__((vector_size(16))); +typedef long long v2di __attribute__((vector_size(16))); + +v16qi +foo (v16qi a) +{ + v16qi b = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + return a == b; +} + +v8hi +foo2 (v8hi a) +{ + v8hi b = {0, 0, 0, 0, 0, 0, 0, 0}; + return a == b; +} + +v4si +foo3 (v4si a) +{ + v4si b = {0, 0, 0, 0}; + return a == b; +} + +v2di +foo4 (v2di a) +{ + v2di b = {0, 0}; + return a == b; +} +