From patchwork Wed Sep 4 07:24:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 97032 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 11C91386103C for ; Wed, 4 Sep 2024 07:25:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by sourceware.org (Postfix) with ESMTPS id B739E3858D29 for ; Wed, 4 Sep 2024 07:25:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B739E3858D29 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org B739E3858D29 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725434703; cv=none; b=tle4LV1nLc24qPaN8m8y+/tOaJoZhXVWktBgiKKbYy715nuPcnFEZ6B3wXr8vJiRjy69z4MmXkgHgvwCx61XNA+h8OyTa4nfK5AZlrEekAhfaPZlgGnAyZ9tChUp3Y1EQazlL2oxypo4hEdejFMVvTOso90ZULepNdwJtEZdBhI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725434703; c=relaxed/simple; bh=pOketU2AfXLzFlG1bV8zO7ExDEtyyF2SN6Dv+E7fvCs=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=GJFbINROifRUHiDBKm5gz66o/jsEFbaqus0AzpJbuIPGU7SNb1H3K6oLNkmg2RQQaECrwSaI9P+oAGstjHOWQ0TUin6FFC2OiRFRN4KyJZT6J32FBWdGci85zO7EAml5cLqKwTqtZrDneOKt1HOppGLuba5yU3DPHeQaG4YtuQs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725434702; x=1756970702; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=pOketU2AfXLzFlG1bV8zO7ExDEtyyF2SN6Dv+E7fvCs=; b=Ies6ZuZF5BI1xjSxsyhJvVdhuR3tHTpHioac/TFOv7Z8miRrIT7DDxjA vhZjWhkoyJYnhv5S4AOpPAcoUtWzcMjNIt7hrWz48auezCms4zXXAJyvy JHltkBMIEd7/VS6iQfGG4t2FP2F9msTThUQytMSHL2axvTM7QJVnrAVhI JEwmz5Gi0Rs7MvJK2hJOtmkWc9sRXMpON6TSN1wgLl1DAsNpo1M2gXwMG OxM/h9b4AybNglUjwfbOkgItFRVMPr//YJnUErZEihU05KUzut90T/Rli k/fvuqzbzHX0Whv/8KLZVRAxa6Po2sw62hxImFagYZOdgXWO+gxoMjA+n A==; X-CSE-ConnectionGUID: 28JzxE8hQJ+BQYIWYSYYrA== X-CSE-MsgGUID: Kzryoa8VR7S1zk3xoex4mg== X-IronPort-AV: E=McAfee;i="6700,10204,11184"; a="23951994" X-IronPort-AV: E=Sophos;i="6.10,201,1719903600"; d="scan'208";a="23951994" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2024 00:25:00 -0700 X-CSE-ConnectionGUID: RUyS2/p+QRetMmcb6fOrrQ== X-CSE-MsgGUID: oPP9C9mXRX+iMwrbfTeiHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,201,1719903600"; d="scan'208";a="69969407" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa003.jf.intel.com with ESMTP; 04 Sep 2024 00:24:58 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1 1/2] Genmatch: Support new flow for phi on condition Date: Wed, 4 Sep 2024 15:24:12 +0800 Message-ID: <20240904072413.1282149-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li The gen_phi_on_cond can only support below control flow for cond from day 1. Aka: +------+ | def | | ... | +-----+ | cond |------>| def | +------+ | ... | | +-----+ | | v | +-----+ | | PHI |<----------+ +-----+ Unfortunately, there will be more scenarios of control flow on PHI. For example as below: T __attribute__((noinline)) \ sat_s_add_##T##_fmt_3 (T x, T y) \ { \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ return overflow ? x < 0 ? MIN : MAX : sum; \ } DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) With expanded RTL like below. 3 │ 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ signed char _1; 8 │ signed char _2; 9 │ int8_t _3; 10 │ __complex__ signed char _6; 11 │ _Bool _8; 12 │ signed char _9; 13 │ signed char _10; 14 │ signed char _11; 15 │ 16 │ ;; basic block 2, loop depth 0 17 │ ;; pred: ENTRY 18 │ _6 = .ADD_OVERFLOW (x_4(D), y_5(D)); 19 │ _2 = IMAGPART_EXPR <_6>; 20 │ if (_2 != 0) 21 │ goto ; [50.00%] 22 │ else 23 │ goto ; [50.00%] 24 │ ;; succ: 4 25 │ ;; 3 26 │ 27 │ ;; basic block 3, loop depth 0 28 │ ;; pred: 2 29 │ _1 = REALPART_EXPR <_6>; 30 │ goto ; [100.00%] 31 │ ;; succ: 5 32 │ 33 │ ;; basic block 4, loop depth 0 34 │ ;; pred: 2 35 │ _8 = x_4(D) < 0; 36 │ _9 = (signed char) _8; 37 │ _10 = -_9; 38 │ _11 = _10 ^ 127; 39 │ ;; succ: 5 40 │ 41 │ ;; basic block 5, loop depth 0 42 │ ;; pred: 3 43 │ ;; 4 44 │ # _3 = PHI <_1(3), _11(4)> 45 │ return _3; 46 │ ;; succ: EXIT 47 │ 48 │ } The above code will have below control flow which is not supported by the gen_phi_on_cond. +------+ | def | | ... | +-----+ | cond |------>| def | +------+ | ... | | +-----+ | | v | +-----+ | | def | | | ... | | +-----+ | | | | | v | +-----+ | | PHI |<----------+ +-----+ This patch would like to add support above control flow for the gen_phi_on_cond. The below testsuites are passed for this patch: * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * genmatch.cc (dt_operand::gen_phi_on_cond): Add support for a new control flow when gen phi on condition. Signed-off-by: Pan Li --- gcc/genmatch.cc | 85 +++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 76 insertions(+), 9 deletions(-) diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc index a56bd90cb2c..f538df1be62 100644 --- a/gcc/genmatch.cc +++ b/gcc/genmatch.cc @@ -3529,28 +3529,95 @@ dt_operand::gen_phi_on_cond (FILE *f, int indent, int depth) "basic_block _pb_0_%d = EDGE_PRED (_b%d, 0)->src;\n", depth, depth); fprintf_indent (f, indent, "basic_block _pb_1_%d = EDGE_PRED (_b%d, 1)->src;\n", depth, depth); + fprintf_indent (f, indent, - "basic_block _db_%d = safe_dyn_cast (*gsi_last_bb (_pb_0_%d)) ? " - "_pb_0_%d : _pb_1_%d;\n", depth, depth, depth, depth); + "gcond *_ct_0_%d = safe_dyn_cast (*gsi_last_bb (_pb_0_%d));\n", + depth, depth); fprintf_indent (f, indent, - "basic_block _other_db_%d = safe_dyn_cast " - "(*gsi_last_bb (_pb_0_%d)) ? _pb_1_%d : _pb_0_%d;\n", + "gcond *_ct_1_%d = safe_dyn_cast (*gsi_last_bb (_pb_1_%d));\n", + depth, depth); + fprintf_indent (f, indent, + "gcond *_ct_a_%d = _ct_0_%d ? _ct_0_%d : _ct_1_%d;\n", + depth, depth, depth, depth); + fprintf_indent (f, indent, + "basic_block _db_%d = _ct_0_%d ? _pb_0_%d : _pb_1_%d;\n", + depth, depth, depth, depth); + fprintf_indent (f, indent, + "basic_block _other_db_%d = _ct_0_%d ? _pb_1_%d : _pb_0_%d;\n", depth, depth, depth, depth); fprintf_indent (f, indent, - "gcond *_ct_%d = safe_dyn_cast (*gsi_last_bb (_db_%d));\n", - depth, depth); - fprintf_indent (f, indent, "if (_ct_%d" + "edge _e_00_%d = _pb_0_%d->preds ? EDGE_PRED (_pb_0_%d, 0) : NULL;\n", + depth, depth, depth); + fprintf_indent (f, indent, + "basic_block _pb_00_%d = _e_00_%d ? _e_00_%d->src : NULL;\n", + depth, depth, depth); + fprintf_indent (f, indent, + "gcond *_ct_b_%d = _pb_00_%d ? " + "safe_dyn_cast (*gsi_last_bb (_pb_00_%d)) : NULL;\n", + depth, depth, depth); + + /* Case 1 flow for PHI. + * +------+ + * | def | + * | ... | +-----+ + * | cond |------>| def | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | PHI |<----------+ + * +-----+ + */ + fprintf_indent (f, indent, "if ((_ct_a_%d" " && EDGE_COUNT (_other_db_%d->preds) == 1\n", depth, depth); fprintf_indent (f, indent, - " && EDGE_COUNT (_other_db_%d->succs) == 1\n", depth); + " && EDGE_COUNT (_other_db_%d->succs) == 1\n", depth); + fprintf_indent (f, indent, + " && EDGE_PRED (_other_db_%d, 0)->src == _db_%d)\n", depth, depth); + + fprintf_indent (f, indent, " ||\n"); + + /* Case 2 flow for PHI. + * +------+ + * | def | + * | ... | +-----+ + * | cond |------>| def | + * +------+ | ... | + * | +-----+ + * | | + * v | + * +-----+ | + * | def | | + * | ... | | + * +-----+ | + * | | + * | | + * v | + * +-----+ | + * | PHI |<----------+ + * +-----+ + */ + fprintf_indent (f, indent, + " (_ct_b_%d && _pb_00_%d && EDGE_COUNT (_pb_0_%d->succs) == 1\n", + depth, depth, depth); + fprintf_indent (f, indent, + " && EDGE_COUNT (_pb_0_%d->preds) == 1\n", depth); fprintf_indent (f, indent, - " && EDGE_PRED (_other_db_%d, 0)->src == _db_%d)\n", depth, depth); + " && EDGE_COUNT (_other_db_%d->preds) == 1\n", depth); + fprintf_indent (f, indent, + " && EDGE_COUNT (_other_db_%d->succs) == 1\n", depth); + fprintf_indent (f, indent, + " && EDGE_PRED (_other_db_%d, 0)->src == _pb_00_%d))\n", depth, depth); indent += 2; fprintf_indent (f, indent, "{\n"); indent += 2; + fprintf_indent (f, indent, + "gcond *_ct_%d = _ct_a_%d ? _ct_a_%d : _ct_b_%d;\n", + depth, depth, depth, depth); fprintf_indent (f, indent, "tree _cond_lhs_%d = gimple_cond_lhs (_ct_%d);\n", depth, depth); fprintf_indent (f, indent, From patchwork Wed Sep 4 07:24:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 97033 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E2F3E3860757 for ; Wed, 4 Sep 2024 07:25:40 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by sourceware.org (Postfix) with ESMTPS id A05DA3858C98 for ; Wed, 4 Sep 2024 07:25:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A05DA3858C98 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A05DA3858C98 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725434705; cv=none; b=UozZtpxHZCnx5xaNQnYM+emgEsp2OwlDrAeH87k6sxxhhsaoneW0rgF1cozuBO8P2qGkKkRQfRnaWxvWHOEWbNYcBQiCuX03yx8w7tkLTcuupBtUogWTtJ/Xpfu1iE3a6fB6bTL4Rzvlz8EgS/opUmdO7H97/4pZDBIKrClvn6s= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1725434705; c=relaxed/simple; bh=2IRJNEg9Hy7r2yNWVoY6wQjCkXM9LmBL0zWL4dALoug=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=riazMJVVystBY4a2ovhlhuIC6A1HFjUaidEHuuMcIopQT5QnCM7giXdWtAVwvdZbstH7hWy0+mo9VaOeJsEvOvcrmGOvE+qr9qDawMfo7YCnWepYyaCcaGXF2Y+9YAVJ1B0MB/tSqFMQ8sl52dUVfNDy8n1I/MimetlqEjiEC/U= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725434703; x=1756970703; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2IRJNEg9Hy7r2yNWVoY6wQjCkXM9LmBL0zWL4dALoug=; b=Qp5uS2T/lgCVVmU+RaySzxIQ0RheBmVyOdqrR4TwEvfEXM9A4SGIwP5c r3PcZ6N5zyKu3JQEyNrtDh3sBaZ3jHx0s807KymJ/NcxeO3pMp5UA4y4T 3IHWaluPXjmSrBINoBIB5gm4HT98UpbnT2Wl9KHcVH1Y02rmVVYFPtczz R6IMeLLsNuIAM3wuXniw3VyTm36vpXruMHjHGZguxytJ7Lst0EV5RW6tc aR9hjW9lrvnvCqwBszrzV61DrtmZL0Zejkl128CAZy5LhVW7EFaiei+tI qbOgptrFmHT8rdtdkS7n7vq/gzyoWdxhL3D+9CllInEeMeSrJkwyjoqLO w==; X-CSE-ConnectionGUID: KG0C92ZFS1uFROWpcT8T4w== X-CSE-MsgGUID: fsXmwUFUQ+eZoi1a/9+XdQ== X-IronPort-AV: E=McAfee;i="6700,10204,11184"; a="23952014" X-IronPort-AV: E=Sophos;i="6.10,201,1719903600"; d="scan'208";a="23952014" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2024 00:25:02 -0700 X-CSE-ConnectionGUID: GauL4VU2SY2IhcUc2zw2DQ== X-CSE-MsgGUID: M/5eKntSTPqRrHkV6STuTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,201,1719903600"; d="scan'208";a="69969433" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa003.jf.intel.com with ESMTP; 04 Sep 2024 00:25:00 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1 2/2] Match: Support form 3 for scalar signed integer .SAT_ADD Date: Wed, 4 Sep 2024 15:24:13 +0800 Message-ID: <20240904072413.1282149-2-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240904072413.1282149-1-pan2.li@intel.com> References: <20240904072413.1282149-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org From: Pan Li This patch would like to support the form 3 of the scalar signed integer .SAT_ADD. Aka below example: Form 3: #define DEF_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) \ T __attribute__((noinline)) \ sat_s_add_##T##_fmt_3 (T x, T y) \ { \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ return overflow ? x < 0 ? MIN : MAX : sum; \ } DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) We can tell the difference before and after this patch if backend implemented the ssadd3 pattern similar as below. Before this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ signed char _1; 8 │ signed char _2; 9 │ int8_t _3; 10 │ __complex__ signed char _6; 11 │ _Bool _8; 12 │ signed char _9; 13 │ signed char _10; 14 │ signed char _11; 15 │ 16 │ ;; basic block 2, loop depth 0 17 │ ;; pred: ENTRY 18 │ _6 = .ADD_OVERFLOW (x_4(D), y_5(D)); 19 │ _2 = IMAGPART_EXPR <_6>; 20 │ if (_2 != 0) 21 │ goto ; [50.00%] 22 │ else 23 │ goto ; [50.00%] 24 │ ;; succ: 4 25 │ ;; 3 26 │ 27 │ ;; basic block 3, loop depth 0 28 │ ;; pred: 2 29 │ _1 = REALPART_EXPR <_6>; 30 │ goto ; [100.00%] 31 │ ;; succ: 5 32 │ 33 │ ;; basic block 4, loop depth 0 34 │ ;; pred: 2 35 │ _8 = x_4(D) < 0; 36 │ _9 = (signed char) _8; 37 │ _10 = -_9; 38 │ _11 = _10 ^ 127; 39 │ ;; succ: 5 40 │ 41 │ ;; basic block 5, loop depth 0 42 │ ;; pred: 3 43 │ ;; 4 44 │ # _3 = PHI <_1(3), _11(4)> 45 │ return _3; 46 │ ;; succ: EXIT 47 │ 48 │ } After this patch: 4 │ __attribute__((noinline)) 5 │ int8_t sat_s_add_int8_t_fmt_3 (int8_t x, int8_t y) 6 │ { 7 │ int8_t _3; 8 │ 9 │ ;; basic block 2, loop depth 0 10 │ ;; pred: ENTRY 11 │ _3 = .SAT_ADD (x_4(D), y_5(D)); [tail call] 12 │ return _3; 13 │ ;; succ: EXIT 14 │ 15 │ } The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Add the form 3 of signed .SAT_ADD matching. Signed-off-by: Pan Li --- gcc/match.pd | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/match.pd b/gcc/match.pd index 1372f2ba377..1218abcd01a 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3222,6 +3222,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) && types_match (type, @0, @1)))) +/* Signed saturation add, case 3: + Z = .ADD_OVERFLOW (X, Y) + SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum; */ +(match (signed_integer_sat_add @0 @1) + (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop) + (bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value) + (realpart @2)) + (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) + && types_match (type, @0, @1)))) + /* Unsigned saturation sub, case 1 (branch with gt): SAT_U_SUB = X > Y ? X - Y : 0 */ (match (unsigned_integer_sat_sub @0 @1)