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CTRY:SE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.axis.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: axis.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2024 03:09:23.8065 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 65ccd3d0-27a5-4b0f-6c1b-08dca3b25cf0 X-MS-Exchange-CrossTenant-Id: 78703d3c-b907-432f-b066-88f7af9ca3af X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=78703d3c-b907-432f-b066-88f7af9ca3af; Ip=[195.60.68.100]; Helo=[mail.axis.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001B0.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR02MB7928 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~patchwork=sourceware.org@gcc.gnu.org Heads-up to xtensa maintainers, who might similarly want to move the option-override to TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE (and call it from TARGET_OPTION_OVERRIDE). Regarding disabling that optimization: with the brief description per the below, I think I've done due diligence when it comes to a valid reason for disabling that optimization, if only the bare minimum. Not that it'd be a requirement, but to proactively counter presumed arguments about sweeping target bugs under the carpet. I may revisit later (famous last words), but for now, I'd rather spend time I don't have, writing my own optimizations. ;-) Sorry. Oops! I see I forgot to replace the XXXXX templates before committing and pushing, so there'll be a brown-paper bag fixup. Bah. -- >8 -- With late-combine, performance for coremark compiled for cris-elf regresses 2.6% by performance and by size 0.4%, measured at r15-2005-g13757e50ff0b, when compiled with "-O2 -march=v10". Earlier, at r15-1880-gce34fcc572a0, numbers were by performance 3.2% and by size 0.4%, even with the proposed patch to PR115883 (TL;DR: a presumed bug in LRA or combine exposed by late-combine). Without that patch, about the same performance results (at that revision). Similarly around the late-combine commit (r15-1579-g792f97b44ffc5e). I briefly looked at the performance regression for coremark at r15-2005-g13757e50ff0b (with/without this patch) as far as seeing that the stack-frame grew larger (maxing out on hard registers and needing one more slot) for at least two of the top three* functions that regressed the most in terms of cycles per call: matrix_mul_matrix_bitextract (in coremark, 17% slower) and __subdf3 (in libgcc, 6.7% slower). That makes sense when considering that late-combine "naturally" stretches register life-times. But, looking at late_combine::combine_into_uses and late_combine::optimizable_set, nothing stood out to me. I guess there's improvement opportunities in late_combine::check_register_pressure. (*) I opted not to look at _dtoa_r (in newlib) mostly because it's boring and always shows up when something in gcc goes sideways. (It maxes out on hard registers and is big. End of story.) Note that the change of default is done in the TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE worker, not in the TARGET_OPTION_OVERRIDE worker for reasons stated in the comment. * config/cris/cris.cc (cris_option_override_after_change): New function. Disable late-combine by default. (cris_option_override): Call the new function. --- gcc/config/cris/cris.cc | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc index f1accc0f36e5..f2c3955b9665 100644 --- a/gcc/config/cris/cris.cc +++ b/gcc/config/cris/cris.cc @@ -53,6 +53,7 @@ along with GCC; see the file COPYING3. If not see #include "builtins.h" #include "cfgrtl.h" #include "tree-pass.h" +#include "opts.h" /* This file should be included last. */ #include "target-def.h" @@ -156,6 +157,7 @@ static rtx_insn *cris_md_asm_adjust (vec &, vec &, HARD_REG_SET &, location_t); static void cris_option_override (void); +static void cris_option_override_after_change (); static bool cris_frame_pointer_required (void); @@ -281,6 +283,8 @@ int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION; #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE cris_option_override +#undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE +#define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE cris_option_override_after_change #undef TARGET_ASM_TRAMPOLINE_TEMPLATE #define TARGET_ASM_TRAMPOLINE_TEMPLATE cris_asm_trampoline_template @@ -2409,6 +2413,39 @@ cris_option_override (void) /* Set the per-function-data initializer. */ init_machine_status = cris_init_machine_status; + + cris_option_override_after_change (); +} + +/* The TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE worker. + + The CRIS port doesn't have any port-specific function attributes to + handle, but to keep attributes consistent across per-function changes + and not fail per-function optimization settings as exposed by + gcc.dg/ipa/iinline-attr.c, any OPTION_SET_P work need to be done + here, not in the TARGET_OPTION_OVERRIDE function. This function then + instead needs to called from that function. */ + +static void +cris_option_override_after_change () +{ + /* The combine pass inserts extra copies of the incoming parameter + registers in make_more_copies, between the hard registers and + pseudo-registers holding the "original" copies. When doing that, + it does not copy attributes from those original registers. With + the late-combine pass, those extra copies are propagated into more + places than the original copies, and trips up LRA which doesn't see + e.g. REG_POINTER where it's expected. This causes an ICE for + gcc.target/cris/rld-legit1.c. That's a red flag, but also a very + special corner case. + + A more valid reason is that coremark with -march=v10 -O2 regresses + by XXXXX% (@r15-gXXXXXXXXXXXX vs. @r15-gXXXXXXXXXXXX and also at + r15-gXXXXXXXXXXXX with patches to handle the REG_POINTER and + rld-legit1 fallout vs. this additional change). Disable + late-combine by default until that's fixed. */ + if (!OPTION_SET_P (flag_late_combine_instructions)) + flag_late_combine_instructions = 0; } /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */