From patchwork Fri May 24 18:45:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Mora X-Patchwork-Id: 90844 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7D55A385E457 for ; Fri, 24 May 2024 18:45:47 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by sourceware.org (Postfix) with ESMTPS id 282D73858D29 for ; Fri, 24 May 2024 18:45:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 282D73858D29 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 282D73858D29 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::634 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716576321; cv=none; b=f4LAVj5TzgTEKap9PJ81FF0wV94kGMOkF7OLfkzsFU0SC/TFX+nn0EE2HS894loXokeSvQR6Nn2RFHw6FatmbsyntduIfsB0pJZG5JpU4MakkC9VuNFJpYDYYPMlxiDWm0H1JN7FmGJ41kOb7tjjk4Ym4IS56w9/dyApR0zAHqo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716576321; c=relaxed/simple; bh=f+4B8Fs/9f5XZQJxovK6l7kULlTFB471zVfIyw5ETj8=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=ST3k4qg1AsfHs4OJHemXIwjdPeozze0QbAORVy5kZL8b3H8/xwhfLF00l/6WcAskAKL2p0cxKAJQAu/vCBDA/gi1h2ja8QrjXFbyp+9U04oCMJmYKbzjZ/NtQ24BKhR0sjdAzBv2PQF3f1+5kYFajpr8ew9y7xQ2zJUa+8/cHvc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a6266fff501so152912966b.1 for ; Fri, 24 May 2024 11:45:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1716576317; x=1717181117; darn=sourceware.org; h=to:subject:message-id:date:from:mime-version:from:to:cc:subject :date:message-id:reply-to; bh=P3qwRE/FvriXPT2HVSbpFuQPELhQhjwSG4P9rd7Uolc=; b=aWr7BTL2CKu57rjf3M7/FtI0xUI77Xv+xR5g1N/aflsRH7UPy66/XaPP1Nq9Otu+X+ PFQne5lS7cjCzOGYUL4X96WgcM4A4joKZ9b3hWhV5cfHphcIdZerTe8u3jFR687RKGNJ iuqQCex2ZIaU0IBx4tYOywpW06kQlbw20ymq1GKoyi+LMPBzMrmdOMGJCI/gm2oi0erM znb/o1FzJfMfoK2tAIY+wZsJhGnuTLrVJxd64b0pcXtAaLGdRIQFuGJnYOcxX+CDA/uY 9OPCZewSeGNpN5UYzJQsaf0t0BEf1KbycuQCP1MxMrzRuW9/H/pzPzBTPDwHIyFz3y84 LORw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716576317; x=1717181117; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=P3qwRE/FvriXPT2HVSbpFuQPELhQhjwSG4P9rd7Uolc=; b=bE3GRn+8GYouEv/bcEGZhpA66w6f3uQ+TAkJlLOwtgb2SsE9s0eFFaiPDpxFP56p8e Og+mIxdI+blaeC6pIVvm/5ZIbb2niRHSL2Mzj5l3kwLz3Qi43I4MSy/Z6SbGfih+Tj2O J/djQ6djiEUgPS2akw4qtgjpP4e2OuAQxzitPjV71UkXEHo9E12FjePGD668krhL7Me+ d0ytiocybw/rrXPyCectuYv2f5nSMty76YSRxX8Pb9iLj92lCLl4I9WGWXS9SSij4xcs KvGUz3fyKpsw9/3Z9eujRANqlZ5h7iqpW6uVqhuuKxDEiiI5QLoJpB6a519kJBv8avw4 eJ/w== X-Gm-Message-State: AOJu0YyUHIXVVasQehiPTSyx6/DbIw/EeGwJP84BsnJMGzhIwHoWXRVW o722dsMF+/5vX8DiOi6SZ8tqGoIOpbAy1Vbec3LsayHqxgw4XNo6yKTtclnLfk9cpBRkJOTg7M8 ugv0tOVfl5XWLDOpjoh6HhEerV7Bye26X X-Google-Smtp-Source: AGHT+IEf/lspfNP5koVFpaypUH1vfZFity/M96jOfX/Qryt8AZj1vFgwkNmXugoskhNIo2EFsdQ/Xk3NpoAdswnEzqw= X-Received: by 2002:a17:906:3c8:b0:a52:2486:299f with SMTP id a640c23a62f3a-a62651187bbmr217197166b.71.1716576316602; Fri, 24 May 2024 11:45:16 -0700 (PDT) MIME-Version: 1.0 From: Javier Mora Date: Fri, 24 May 2024 20:45:05 +0200 Message-ID: Subject: [PATCH] gas/doc: RISC-V: Fix Type U instruction To: binutils@sourceware.org X-Spam-Status: No, score=-10.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org The RISC-V Type U instruction (.insn u) at https://sourceware.org/binutils/docs/as/RISC_002dV_002dFormats.html shows an incorrect format for the `simm20` immediate. The bits should be sequentially arranged (simm20[19:0]) which is how `gas` treats them, but instead they appear in the Type J format (simm20[20|10:1|11|19:12]) in the documentation. Additionally, I changed all occurrences of `opcode6` to `opcode7` since the opcode has 7 bits, not 6. (This is my first patch on this project, so my apologies if the format is not correct!) As a side note, and speaking of off-by-one errors, I don't quite like the bit numbering in the instructions: the numbers appear in the ASCII box diagrams directly under the field boundaries; they should either appear slightly to the left (indicating that they refer to the first bit of the next field) or to the right in the case of the leftmost 31; otherwise it becomes a little confusing (especially since the leftmost field appears to have one bit less). Alternatively, you may go full "Python style limits" and systematically write the index of the bit to the left of the boundary -- i.e., replace all those 31 with 32 (and the 30 in Type J with 31). Otherwise the leftmost field is "different". A third, more explicit but maybe too verbose option is to include both boundaries in every field. Thanks in advance. Keep up the good work! From cd25864a6e215323cd68cdfa0fb23313897415da Mon Sep 17 00:00:00 2001 From: Javier Mora Date: Fri, 24 May 2024 20:10:05 +0200 Subject: [PATCH] gas/doc: RISC-V: Fix U insn; replace opcode6->7 The type U RISC-V instruction format in gas/doc/c-riscv.texi shows the bit arrangement of the simm20 immediate that belongs to the J type; it should be simm20[19:0] (or simply simm20). The current behavior of `gas` matches the proposed change. Additionally, the opcode is called `opcode6` despite of having 7 bits. Rename it to `opcode7`. --- gas/doc/c-riscv.texi | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index 7484a71798a..1b5e834fc69 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -435,7 +435,7 @@ instruction formats: @display @multitable @columnfractions .15 .40 -@item opcode @tab Unsigned immediate or opcode name for 7-bits opcode. +@item opcode7 @tab Unsigned immediate or opcode name for 7-bits opcode. @item opcode2 @tab Unsigned immediate or opcode name for 2-bits opcode. @item func7 @tab Unsigned immediate for 7-bits function code. @item func6 @tab Unsigned immediate for 6-bits function code. @@ -549,62 +549,62 @@ The following table lists the RISC-V instruction formats that are available with the @samp{.insn} pseudo directive: @table @code -@item R type: .insn r opcode6, func3, func7, rd, rs1, rs2 +@item R type: .insn r opcode7, func3, func7, rd, rs1, rs2 @verbatim +-------+-----+-----+-------+----+---------+ -| func7 | rs2 | rs1 | func3 | rd | opcode6 | +| func7 | rs2 | rs1 | func3 | rd | opcode7 | +-------+-----+-----+-------+----+---------+ 31 25 20 15 12 7 0 @end verbatim -@item R type with 4 register operands: .insn r opcode6, func3, func2, rd, rs1, rs2, rs3 -@itemx R4 type: .insn r4 opcode6, func3, func2, rd, rs1, rs2, rs3 +@item R type with 4 register operands: .insn r opcode7, func3, func2, rd, rs1, rs2, rs3 +@itemx R4 type: .insn r4 opcode7, func3, func2, rd, rs1, rs2, rs3 @verbatim +-----+-------+-----+-----+-------+----+---------+ -| rs3 | func2 | rs2 | rs1 | func3 | rd | opcode6 | +| rs3 | func2 | rs2 | rs1 | func3 | rd | opcode7 | +-----+-------+-----+-----+-------+----+---------+ 31 27 25 20 15 12 7 0 @end verbatim -@item I type: .insn i opcode6, func3, rd, rs1, simm12 -@itemx I type: .insn i opcode6, func3, rd, simm12(rs1) +@item I type: .insn i opcode7, func3, rd, rs1, simm12 +@itemx I type: .insn i opcode7, func3, rd, simm12(rs1) @verbatim +--------------+-----+-------+----+---------+ -| simm12[11:0] | rs1 | func3 | rd | opcode6 | +| simm12[11:0] | rs1 | func3 | rd | opcode7 | +--------------+-----+-------+----+---------+ 31 20 15 12 7 0 @end verbatim -@item S type: .insn s opcode6, func3, rs2, simm12(rs1) +@item S type: .insn s opcode7, func3, rs2, simm12(rs1) @verbatim +--------------+-----+-----+-------+-------------+---------+ -| simm12[11:5] | rs2 | rs1 | func3 | simm12[4:0] | opcode6 | +| simm12[11:5] | rs2 | rs1 | func3 | simm12[4:0] | opcode7 | +--------------+-----+-----+-------+-------------+---------+ 31 25 20 15 12 7 0 @end verbatim -@item B type: .insn s opcode6, func3, rs1, rs2, symbol -@itemx SB type: .insn sb opcode6, func3, rs1, rs2, symbol +@item B type: .insn s opcode7, func3, rs1, rs2, symbol +@itemx SB type: .insn sb opcode7, func3, rs1, rs2, symbol @verbatim +-----------------+-----+-----+-------+----------------+---------+ -| simm12[12|10:5] | rs2 | rs1 | func3 | simm12[4:1|11] | opcode6 | +| simm12[12|10:5] | rs2 | rs1 | func3 | simm12[4:1|11] | opcode7 | +-----------------+-----+-----+-------+----------------+---------+ 31 25 20 15 12 7 0 @end verbatim -@item U type: .insn u opcode6, rd, simm20 +@item U type: .insn u opcode7, rd, simm20 @verbatim -+--------------------------+----+---------+ -| simm20[20|10:1|11|19:12] | rd | opcode6 | -+--------------------------+----+---------+ -31 12 7 0 ++--------+----+---------+ +| simm20 | rd | opcode7 | ++--------+----+---------+ +31 12 7 0 @end verbatim -@item J type: .insn j opcode6, rd, symbol -@itemx UJ type: .insn uj opcode6, rd, symbol +@item J type: .insn j opcode7, rd, symbol +@itemx UJ type: .insn uj opcode7, rd, symbol @verbatim +------------+--------------+------------+---------------+----+---------+ -| simm20[20] | simm20[10:1] | simm20[11] | simm20[19:12] | rd | opcode6 | +| simm20[20] | simm20[10:1] | simm20[11] | simm20[19:12] | rd | opcode7 | +------------+--------------+------------+---------------+----+---------+ 31 30 21 20 12 7 0 @end verbatim -- 2.40.1.423.g2807bd2c10