From patchwork Thu May 23 13:48:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Willgerodt, Felix" X-Patchwork-Id: 90732 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 81235384AB74 for ; Thu, 23 May 2024 13:49:40 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by sourceware.org (Postfix) with ESMTPS id D11793858D33 for ; Thu, 23 May 2024 13:48:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D11793858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D11793858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716472143; cv=none; b=XUwP0mcTZZOzmeMOaJR6SYhVMHC5VGcPOVOEAUYjleEipgHvBV65pUbjkK8c53TiPDYbZOPTbqaDbCmkNRThxNmYLD5xV/iprIZ3TZ/XPjMGuN4JVri/f1eDQoeG6kQW+ZOe2yGrDuWUlg0gK4D6B4BAedxc3b3sZIHGb22U29I= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716472143; c=relaxed/simple; bh=Oc5VBpDWn35XX0PUDKQZnIegNkt321Bd+MEJlpWix2Y=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=KUvHqRHagzPWL6eTNVbiOKU0W9GJXDNfFwgUUexqhpOgQ9TqD0qg3TaWx6y1VsPMZ0SvFwymL0abA34vtrdKF2rQcAvIyrR3k0Kk5HZbPDOepzdj4FKHgOKv6SrMvio8r4oIPPDVy7UrbCdmPCjRB1uQBaJfZoGJJ/9Uf88cn/Q= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716472139; x=1748008139; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Oc5VBpDWn35XX0PUDKQZnIegNkt321Bd+MEJlpWix2Y=; b=KHZMuz5uA01Jb3MqrD8UnE9d/nNK+DpmQmZDFQVhYwzHByIybBlPVr4M qc9EpnqkUaLOEXAeUeJ8CJ2Y9YS6LNtn1cALRfnGAhpFWM8y1y2zrC8Vi lMdakcSMFr785JE30kOr6O2a+dMFO4VsaCh+E5+2TdwVGnweMOkR/NkkA W/lxSa+vDnV+JFZ6vB4MAMMlzvdrfwFpZO0Ghg5Rr3RyXhi5cBWPsezfN EaBpb1VaJ/0Iv71qBq5LMR0cbrqos0tGUMgytsdvsaHr/gb752hS8uRcf TYMKnMnVvE3+8v4Uz2Lc4o2c5fQN/VWnuLfoHZf/HxmqhJ7spWvTvM330 Q==; X-CSE-ConnectionGUID: JTNbyb5yR2KJZaU7Iab95A== X-CSE-MsgGUID: OLvUS96iQlC3R11SPW7nQA== X-IronPort-AV: E=McAfee;i="6600,9927,11081"; a="23923176" X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="23923176" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:48:59 -0700 X-CSE-ConnectionGUID: LGzSsoK0TLuMQXYXeUVVyg== X-CSE-MsgGUID: yZ1gh31ITCOG7GZ9fJqyLg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="33650268" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:48:57 -0700 From: Felix Willgerodt To: gdb-patches@sourceware.org Subject: [PATCH 1/3] gdb, doc: Fix AVX-512 documentation. Date: Thu, 23 May 2024 15:48:40 +0200 Message-Id: <20240523134842.3019820-2-felix.willgerodt@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240523134842.3019820-1-felix.willgerodt@intel.com> References: <20240523134842.3019820-1-felix.willgerodt@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org org.gnu.gdb.i386.avx512 adds k registers, but these aren't mentioned in the docs yet. Fix that. In addition the documentation describes xmm registers with an `h` (e.g. xmm16h). I am assuming that we follow the register xml files here, which don't have the h suffix. So this removes that as well. --- gdb/doc/gdb.texinfo | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index 61f91ef4ad6..750f368f980 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -49471,7 +49471,7 @@ describe additional @sc{xmm} registers: @itemize @minus @item -@samp{xmm16h} through @samp{xmm31h}, only valid for amd64. +@samp{xmm16} through @samp{xmm31}, only valid for amd64. @end itemize It should describe the upper 128 bits of additional @sc{ymm} registers: @@ -49499,6 +49499,14 @@ describe the additional @sc{zmm} registers: @samp{zmm16h} through @samp{zmm31h}, only valid for amd64. @end itemize +It should +describe the additional 64-bit @sc{k} registers: + +@itemize @minus +@item +@samp{k0} through @samp{k7}, valid for amd64 and i386. +@end itemize + The @samp{org.gnu.gdb.i386.pkeys} feature is optional. It should describe a single register, @samp{pkru}. It is a 32-bit register valid for i386 and amd64. From patchwork Thu May 23 13:48:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Willgerodt, Felix" X-Patchwork-Id: 90733 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9D9A838654A4 for ; Thu, 23 May 2024 13:49:44 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by sourceware.org (Postfix) with ESMTPS id CD4AF3858CD1 for ; Thu, 23 May 2024 13:49:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CD4AF3858CD1 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CD4AF3858CD1 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716472146; cv=none; b=HcRwmASyRTp5V79qTIeM7sbqfjCwoSIZ7HXgmS4olDvYbXYSVpd3vAmCISrNXCjq9+wx5QIrA4Kv0OrCmxr6OX6UHg26qD4ot1rCTBa6Uvd4pfrMhBVC9az2yJTozCRzzU3v9jkZ7AZ0G/HbrrDHKFMKy22oW4gk8dh9cBOtn5g= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1716472146; c=relaxed/simple; bh=tlSvebTntbbB71JXuAZtweXoE5QshagB5S+eUJ7EKBo=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=UhwbDoe5JxBT2oLFc0pW+2TtbvRTSZALK1OIW7VuYKfh0pgsnvr9RYShStYi0OcTSxsoCMOXjYzTCyXRAbV07zZ1v0lgrrZWkwpra6hU3SEsSKW0jgbxnSpK8OPhYnEpCmoSe53a0IWJOLvFXqBjCmGJFWaEjIshQ9SV3pjhoVs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716472145; x=1748008145; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=tlSvebTntbbB71JXuAZtweXoE5QshagB5S+eUJ7EKBo=; b=Kt33E5Rb8gaOIUd0yFB+wHZi6745+SG8uUkJktoSM8vR6nmKM4dTZ8QP yPjgVTwe5KFlZt7s0mB5OfG7wKrhYM/TramUoAVaCMexcZtTvq0yGEHEs 5VdXXfxgjxtzyJFjPOIs9Qj28rfLAvzX6mO8Q9TmLH63lLOEniVzlMRgD djXL31C8zlH11qj4BwBspqKNTJbO8PUYUkBE91Tcob3DFDjWZ55DuFqLn Y7ia5rzvkBxRxcod44MtbMFpNabxg7jtYcXGGlvRlTqTT3EvTFT43F2Jy 5vb5CvVF6UK34QkZx3bhryFJjscLpsT/8JZGZOXLG1u1cKdma0l9Cf6oB A==; X-CSE-ConnectionGUID: 9z45eM2MSPCsSbhHQbi45w== X-CSE-MsgGUID: ebbGUlvJRv+qc0j/XA109A== X-IronPort-AV: E=McAfee;i="6600,9927,11081"; a="23923208" X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="23923208" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:49:05 -0700 X-CSE-ConnectionGUID: 2kNah+x9TqyPd0Of8F+dMg== X-CSE-MsgGUID: Rn7UlGWSSaKkMjyCJxai2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="33650295" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:49:03 -0700 From: Felix Willgerodt To: gdb-patches@sourceware.org Subject: [PATCH 2/3] gdb, amd64: remove unused forward declerations Date: Thu, 23 May 2024 15:48:41 +0200 Message-Id: <20240523134842.3019820-3-felix.willgerodt@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240523134842.3019820-1-felix.willgerodt@intel.com> References: <20240523134842.3019820-1-felix.willgerodt@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org These structs are not referenced anywhere anymore and seemed to have been missed at some point when their usage was removed. Co-authored-by: Nils-Christian Kempke --- gdb/amd64-linux-tdep.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/gdb/amd64-linux-tdep.h b/gdb/amd64-linux-tdep.h index 2003dcda78f..66170256639 100644 --- a/gdb/amd64-linux-tdep.h +++ b/gdb/amd64-linux-tdep.h @@ -31,18 +31,6 @@ /* Total number of registers for GNU/Linux. */ #define AMD64_LINUX_NUM_REGS (AMD64_LINUX_ORIG_RAX_REGNUM + 1) -/* Linux target description. */ -extern struct target_desc *tdesc_amd64_linux; -extern struct target_desc *tdesc_amd64_avx_linux; -extern struct target_desc *tdesc_amd64_mpx_linux; -extern struct target_desc *tdesc_amd64_avx_mpx_linux; -extern struct target_desc *tdesc_amd64_avx_avx512_linux; -extern struct target_desc *tdesc_amd64_avx_mpx_avx512_pku_linux; - -extern struct target_desc *tdesc_x32_linux; -extern struct target_desc *tdesc_x32_avx_linux; -extern struct target_desc *tdesc_x32_avx_avx512_linux; - /* Return the right amd64-linux target descriptions according to XCR0_FEATURES_BIT and IS_X32. */ From patchwork Thu May 23 13:48:42 2024 Content-Type: text/plain; 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X-CSE-ConnectionGUID: z0wvBkGjSHmd9ro2MVds5g== X-CSE-MsgGUID: CfEDOqgyQEiAb/ChIGPS8A== X-IronPort-AV: E=McAfee;i="6600,9927,11081"; a="23923254" X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="23923254" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:49:11 -0700 X-CSE-ConnectionGUID: 0yhlkZXkR06m9eKFdUATTQ== X-CSE-MsgGUID: RchaR44ISOObdqMc8tyMRw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,182,1712646000"; d="scan'208";a="33650319" Received: from gkldtt-dev-004.igk.intel.com (HELO localhost) ([10.123.221.202]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2024 06:49:09 -0700 From: Felix Willgerodt To: gdb-patches@sourceware.org Subject: [PATCH 3/3] gdb: rename offset to high bits in ymm registers Date: Thu, 23 May 2024 15:48:42 +0200 Message-Id: <20240523134842.3019820-4-felix.willgerodt@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240523134842.3019820-1-felix.willgerodt@intel.com> References: <20240523134842.3019820-1-felix.willgerodt@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org The xsave_ymm_avx512_offset data structure contains the xsave offset to the upper 128 bits of a ymm register. Similarly, for zmm this offset is described by xsave_avx512_zmm_h_offset, h indicating the high bits. This commit renames the xsave_ymm_avx512_offset to xsave_ymm_h_avx512_offset - as well as the associated define from XSAVE_YMM_AVX512_ADDR to XSAVE_YMM_H_AVX512_ADDR - to make this more consistent. Note, that the regnum defines already included the 'h' for ymm, like I387_YMM16H_REGNUM and I387_YMMH_AVX512_END_REGNUM. Co-authored-by: Nils-Christian Kempke --- gdb/i387-tdep.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c index 45bd43a50a9..675ee8d2e81 100644 --- a/gdb/i387-tdep.c +++ b/gdb/i387-tdep.c @@ -762,11 +762,11 @@ static int xsave_avxh_offset[] = (xsave + (tdep)->xsave_layout.avx_offset \ + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)]) -/* At xsave_ymm_avx512_offset[REGNUM] you'll find the relative offset +/* At xsave_ymm_h_avx512_offset[REGNUM] you'll find the relative offset within the ZMM region of the XSAVE extended state where the second 128bits of GDB register YMM16 + REGNUM is stored. */ -static int xsave_ymm_avx512_offset[] = +static int xsave_ymm_h_avx512_offset[] = { 16 + 0 * 64, /* %ymm16 through... */ 16 + 1 * 64, @@ -786,9 +786,9 @@ static int xsave_ymm_avx512_offset[] = 16 + 15 * 64 /* ... %ymm31 (128 bits each). */ }; -#define XSAVE_YMM_AVX512_ADDR(tdep, xsave, regnum) \ +#define XSAVE_YMM_H_AVX512_ADDR(tdep, xsave, regnum) \ (xsave + (tdep)->xsave_layout.zmm_offset \ - + xsave_ymm_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) + + xsave_ymm_h_avx512_offset[regnum - I387_YMM16H_REGNUM (tdep)]) /* At xsave_xmm_avx512_offset[REGNUM] you'll find the relative offset within the ZMM region of the XSAVE extended state where the first @@ -1187,7 +1187,7 @@ i387_supply_xsave (struct regcache *regcache, int regnum, regcache->raw_supply (regnum, zero); else regcache->raw_supply (regnum, - XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum)); + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum)); return; case avx512_xmm_avx512: @@ -1314,7 +1314,8 @@ i387_supply_xsave (struct regcache *regcache, int regnum, for (i = I387_YMM16H_REGNUM (tdep); i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) - regcache->raw_supply (i, XSAVE_YMM_AVX512_ADDR (tdep, regs, i)); + regcache->raw_supply (i, + XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i)); for (i = I387_XMM16_REGNUM (tdep); i < I387_XMM_AVX512_END_REGNUM (tdep); i++) @@ -1644,7 +1645,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, memset (XSAVE_AVX512_ZMM16_H_ADDR (tdep, regs, i), 0, 32); for (i = I387_YMM16H_REGNUM (tdep); i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) - memset (XSAVE_YMM_AVX512_ADDR (tdep, regs, i), 0, 16); + memset (XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i), 0, 16); for (i = I387_XMM16_REGNUM (tdep); i < I387_XMM_AVX512_END_REGNUM (tdep); i++) memset (XSAVE_XMM_AVX512_ADDR (tdep, regs, i), 0, 16); @@ -1750,7 +1751,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, i < I387_YMMH_AVX512_END_REGNUM (tdep); i++) { regcache->raw_collect (i, raw); - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, i); + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, i); if (memcmp (raw, p, 16) != 0) { xstate_bv |= X86_XSTATE_ZMM; @@ -1911,7 +1912,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum, case avx512_ymmh_avx512: /* This is an upper YMM16-31 register. */ - p = XSAVE_YMM_AVX512_ADDR (tdep, regs, regnum); + p = XSAVE_YMM_H_AVX512_ADDR (tdep, regs, regnum); if (memcmp (raw, p, 16) != 0) { xstate_bv |= X86_XSTATE_ZMM;