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Regards, Srinath. --- opcodes/aarch64-asm-2.c | 85 +++++++++++++++++++++-------------------- opcodes/aarch64-dis-2.c | 85 +++++++++++++++++++++-------------------- opcodes/aarch64-opc-2.c | 1 + 3 files changed, 87 insertions(+), 84 deletions(-) diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index cb567e52548..8a4ac3e81c3 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -666,30 +666,30 @@ aarch64_insert_operand (const aarch64_operand *self, case 187: case 188: case 189: - case 204: case 205: case 206: case 207: - case 216: + case 208: case 217: case 218: case 219: case 220: - case 228: - case 232: - case 236: - case 243: + case 221: + case 229: + case 233: + case 237: case 244: - case 251: + case 245: case 252: case 253: case 254: + case 255: return aarch64_ins_regno (self, info, code, inst, errors); case 6: case 114: case 115: - case 286: - case 288: + case 287: + case 289: return aarch64_ins_none (self, info, code, inst, errors); case 17: return aarch64_ins_reg_extended (self, info, code, inst, errors); @@ -703,7 +703,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 36: case 37: case 38: - case 290: + case 291: return aarch64_ins_reglane (self, info, code, inst, errors); case 39: return aarch64_ins_reglist (self, info, code, inst, errors); @@ -749,13 +749,14 @@ aarch64_insert_operand (const aarch64_operand *self, case 201: case 202: case 203: - case 257: - case 284: + case 204: + case 258: case 285: - case 287: - case 289: - case 294: + case 286: + case 288: + case 290: case 295: + case 296: return aarch64_ins_imm (self, info, code, inst, errors); case 47: case 48: @@ -903,57 +904,56 @@ aarch64_insert_operand (const aarch64_operand *self, case 193: case 194: case 195: - case 270: + case 271: return aarch64_ins_sve_shrimm (self, info, code, inst, errors); - case 208: case 209: case 210: case 211: - return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors); case 212: + return aarch64_ins_sme_za_vrs1 (self, info, code, inst, errors); case 213: case 214: case 215: + case 216: return aarch64_ins_sme_za_vrs2 (self, info, code, inst, errors); - case 221: case 222: case 223: case 224: case 225: case 226: case 227: + case 228: return aarch64_ins_sve_quad_index (self, info, code, inst, errors); - case 229: case 230: - return aarch64_ins_sve_index (self, info, code, inst, errors); case 231: - case 233: - case 250: - case 296: + return aarch64_ins_sve_index (self, info, code, inst, errors); + case 232: + case 234: + case 251: case 297: case 298: + case 299: return aarch64_ins_sve_reglist (self, info, code, inst, errors); - case 234: case 235: - case 237: + case 236: case 238: case 239: case 240: - case 249: - return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors); case 241: + case 250: + return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors); case 242: + case 243: return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors); - case 245: - case 247: - case 258: - return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors); case 246: case 248: + case 259: + return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors); + case 247: + case 249: return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors); - case 255: case 256: - case 271: + case 257: case 272: case 273: case 274: @@ -966,33 +966,34 @@ aarch64_insert_operand (const aarch64_operand *self, case 281: case 282: case 283: + case 284: return aarch64_ins_simple_index (self, info, code, inst, errors); - case 259: case 260: case 261: case 262: case 263: case 264: case 265: - return aarch64_ins_sme_za_array (self, info, code, inst, errors); case 266: - return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); + return aarch64_ins_sme_za_array (self, info, code, inst, errors); case 267: - return aarch64_ins_sme_sm_za (self, info, code, inst, errors); + return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 268: - return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); + return aarch64_ins_sme_sm_za (self, info, code, inst, errors); case 269: + return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); + case 270: return aarch64_ins_plain_shrimm (self, info, code, inst, errors); - case 291: case 292: case 293: + case 294: return aarch64_ins_x0_to_x30 (self, info, code, inst, errors); - case 299: case 300: case 301: case 302: - return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors); case 303: + return aarch64_ins_rcpc3_addr_opt_offset (self, info, code, inst, errors); + case 304: return aarch64_ins_rcpc3_addr_offset (self, info, code, inst, errors); default: assert (0); abort (); } diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index bd57f07ae3f..b82f3731d98 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -33564,30 +33564,30 @@ aarch64_extract_operand (const aarch64_operand *self, case 187: case 188: case 189: - case 204: case 205: case 206: case 207: - case 216: + case 208: case 217: case 218: case 219: case 220: - case 228: - case 232: - case 236: - case 243: + case 221: + case 229: + case 233: + case 237: case 244: - case 251: + case 245: case 252: case 253: case 254: + case 255: return aarch64_ext_regno (self, info, code, inst, errors); case 6: case 114: case 115: - case 286: - case 288: + case 287: + case 289: return aarch64_ext_none (self, info, code, inst, errors); case 11: return aarch64_ext_regrt_sysins (self, info, code, inst, errors); @@ -33606,7 +33606,7 @@ aarch64_extract_operand (const aarch64_operand *self, case 36: case 37: case 38: - case 290: + case 291: return aarch64_ext_reglane (self, info, code, inst, errors); case 39: return aarch64_ext_reglist (self, info, code, inst, errors); @@ -33653,13 +33653,14 @@ aarch64_extract_operand (const aarch64_operand *self, case 201: case 202: case 203: - case 257: - case 284: + case 204: + case 258: case 285: - case 287: - case 289: - case 294: + case 286: + case 288: + case 290: case 295: + case 296: return aarch64_ext_imm (self, info, code, inst, errors); case 47: case 48: @@ -33809,54 +33810,53 @@ aarch64_extract_operand (const aarch64_operand *self, case 193: case 194: case 195: - case 270: + case 271: return aarch64_ext_sve_shrimm (self, info, code, inst, errors); - case 208: case 209: case 210: case 211: - return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors); case 212: + return aarch64_ext_sme_za_vrs1 (self, info, code, inst, errors); case 213: case 214: case 215: + case 216: return aarch64_ext_sme_za_vrs2 (self, info, code, inst, errors); - case 221: case 222: case 223: case 224: case 225: case 226: case 227: + case 228: return aarch64_ext_sve_quad_index (self, info, code, inst, errors); - case 229: case 230: - return aarch64_ext_sve_index (self, info, code, inst, errors); case 231: - case 233: - case 250: - return aarch64_ext_sve_reglist (self, info, code, inst, errors); + return aarch64_ext_sve_index (self, info, code, inst, errors); + case 232: case 234: + case 251: + return aarch64_ext_sve_reglist (self, info, code, inst, errors); case 235: - case 237: + case 236: case 238: case 239: case 240: - case 249: - return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors); case 241: + case 250: + return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors); case 242: + case 243: return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors); - case 245: - case 247: - case 258: - return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors); case 246: case 248: + case 259: + return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors); + case 247: + case 249: return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors); - case 255: case 256: - case 271: + case 257: case 272: case 273: case 274: @@ -33869,37 +33869,38 @@ aarch64_extract_operand (const aarch64_operand *self, case 281: case 282: case 283: + case 284: return aarch64_ext_simple_index (self, info, code, inst, errors); - case 259: case 260: case 261: case 262: case 263: case 264: case 265: - return aarch64_ext_sme_za_array (self, info, code, inst, errors); case 266: - return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors); + return aarch64_ext_sme_za_array (self, info, code, inst, errors); case 267: - return aarch64_ext_sme_sm_za (self, info, code, inst, errors); + return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 268: - return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors); + return aarch64_ext_sme_sm_za (self, info, code, inst, errors); case 269: + return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors); + case 270: return aarch64_ext_plain_shrimm (self, info, code, inst, errors); - case 291: case 292: case 293: + case 294: return aarch64_ext_x0_to_x30 (self, info, code, inst, errors); - case 296: case 297: case 298: - return aarch64_ext_sve_reglist_zt (self, info, code, inst, errors); case 299: + return aarch64_ext_sve_reglist_zt (self, info, code, inst, errors); case 300: case 301: case 302: - return aarch64_ext_rcpc3_addr_opt_offset (self, info, code, inst, errors); case 303: + return aarch64_ext_rcpc3_addr_opt_offset (self, info, code, inst, errors); + case 304: return aarch64_ext_rcpc3_addr_offset (self, info, code, inst, errors); default: assert (0); abort (); } diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index d3d5752f7db..97b7fb9a8ea 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -228,6 +228,7 @@ const struct aarch64_operand aarch64_operands[] = {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm7}, "a 7-bit unsigned immediate"}, {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm8}, "an 8-bit unsigned immediate"}, {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8_53", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm5,FLD_imm3_10}, "an 8-bit unsigned immediate"}, + {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm4}, "a 4-bit unsigned immediate"}, {AARCH64_OPND_CLASS_SIMD_REG, "SVE_VZn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a SIMD register"}, {AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vd}, "a SIMD register"}, {AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vm}, "a SIMD register"},