From patchwork Sat May 16 14:08:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 39277 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 188D83840C12; Sat, 16 May 2020 14:08:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 188D83840C12 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1589638100; bh=1GQLLy6XTXc7pUtz8KfhaWumNghc2bTUh5I45GtqsyU=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=U10Kc3tUcwCGE0bwfqIucjAyJrAwp8wgaHd9iaSueVcjVIHrBMF78R73TFguXWYTg b/p5ZzxRLMtxhV+GT5JAhjDx9191HNAJm1ep4jki7W3DPbCPI5HRrid6F7K2G7kv7s XnUY8HfVI/tK+SyTdLpwNpRU1r9KSBQBEgj5O5ts= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-pf1-x442.google.com (mail-pf1-x442.google.com [IPv6:2607:f8b0:4864:20::442]) by sourceware.org (Postfix) with ESMTPS id 0D36738708FF for ; Sat, 16 May 2020 14:08:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0D36738708FF Received: by mail-pf1-x442.google.com with SMTP id z1so2452399pfn.3 for ; Sat, 16 May 2020 07:08:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=1GQLLy6XTXc7pUtz8KfhaWumNghc2bTUh5I45GtqsyU=; b=tU8etz8v9GYS/lHuYBjrjTa4kP6XeQHOKGhfqHG51NZNuk07uWdH9UzSbpL5K/JPnC YN0B+Bco1n3itFafVDTmTXZ06MFoqXf5eAUez924KFyH2BBJGHdsEuS82/JP4pGQyYTc LJcKTI42BslRiXQLeDNqM1B8oTTNXW8t0GTesBNkWl9GI0WziYeH1+MVYLuKRJm/1/oQ /iXH5EE7HAV17zJ8k/W5A8MUtU/KCJW+RNyy1ju+CLRpSmMR1ODRZphw1wO6lLPj1inr QMiIgetyBv4q9GEiuap8I6swGaBh487TCQWDgauj9crltUMDv60QSaoxEK3+D7oZsN+s XiwQ== X-Gm-Message-State: AOAM532IF2Hn4VZGFlynSf9YoZogCM7xgMs9RsehkWwhePx/W0DkGaWG gig5EB8SCdcNaaJisuuqj8NxYa8X X-Google-Smtp-Source: ABdhPJzVX10OUnplwCEw81Y81dljgJ6Z+kvi8Wf4GW4zjTMZx9HQ0L2econeibmvAXKGIS/EtJxB9w== X-Received: by 2002:aa7:9429:: with SMTP id y9mr8986610pfo.8.1589638095895; Sat, 16 May 2020 07:08:15 -0700 (PDT) Received: from gnu-cfl-2.localdomain (c-69-181-90-243.hsd1.ca.comcast.net. [69.181.90.243]) by smtp.gmail.com with ESMTPSA id q44sm1702268pja.2.2020.05.16.07.08.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 May 2020 07:08:15 -0700 (PDT) Received: from gnu-cfl-2.localdomain (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 49D611A00DD for ; Sat, 16 May 2020 07:08:14 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH] x86: Update Intel Atom processor family optimization Date: Sat, 16 May 2020 07:08:14 -0700 Message-Id: <20200516140814.151673-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-Spam-Status: No, score=-14.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Libc-alpha" From: "H.J. Lu" Reply-To: "H.J. Lu" Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" Enable Intel Silvermont optimization for Intel Goldmont Plus. Detect more Intel Airmont processors. Optimize Intel Tremont like Intel Silvermont with rep string instructions. --- sysdeps/x86/cpu-features.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index bfb415f05a..b1e4c2d1aa 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -348,18 +348,23 @@ init_cpu_features (struct cpu_features *cpu_features) case 0x57: /* Knights Landing. Enable Silvermont optimizations. */ + case 0x7a: + /* Unaligned load versions are faster than SSSE3 + on Goldmont Plus. */ + case 0x5c: case 0x5f: /* Unaligned load versions are faster than SSSE3 on Goldmont. */ case 0x4c: + case 0x5a: + case 0x75: /* Airmont is a die shrink of Silvermont. */ case 0x37: case 0x4a: case 0x4d: - case 0x5a: case 0x5d: /* Unaligned load versions are faster than SSSE3 on Silvermont. */ @@ -370,6 +375,19 @@ init_cpu_features (struct cpu_features *cpu_features) | bit_arch_Slow_SSE4_2); break; + case 0x86: + case 0x96: + case 0x9c: + /* Enable rep string instructions, unaligned load, unaligned + copy, pminub and avoid SSE 4.2 on Tremont. */ + cpu_features->feature[index_arch_Fast_Rep_String] + |= (bit_arch_Fast_Rep_String + | bit_arch_Fast_Unaligned_Load + | bit_arch_Fast_Unaligned_Copy + | bit_arch_Prefer_PMINUB_for_stringop + | bit_arch_Slow_SSE4_2); + break; + default: /* Unknown family 0x06 processors. Assuming this is one of Core i3/i5/i7 processors if AVX is available. */