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with SMTP id AQAAf8AxX89RbuBlRb9KAA--.1626S5; Thu, 29 Feb 2024 19:45:34 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 1/7] LoongArch: Add gas testsuit for alias instructions Date: Thu, 29 Feb 2024 19:45:13 +0800 Message-Id: <20240229114519.1552207-2-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114519.1552207-1-cailulu@loongson.cn> References: <20240229114519.1552207-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxX89RbuBlRb9KAA--.1626S5 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEjAAAss X-Coremail-Antispam: 1Uk129KBj93XoWxAF1fCr17ur4DZr4UAw4kZrc_yoW5AFy5pw 12vFn8Ca95GF1xtrnxGry5uF1fXw4IvF4j9FWfK3W2kF1xXr1kA3WkKFyDtFZ8t34UK34f Xw4fXr4Y9F15twcCm3ZEXasCq-sJn29KB7ZKAUJUUUUr529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUU9Fb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2kKe7AKxVWUXVWUAwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07 AIYIkI8VC2zVCFFI0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWU tVWrXwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7V AKI48JMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMxCIbckI1I0E14v2 6r1Y6r17MI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17 CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r4j6ryUMIIF 0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIx AIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2 KfnxnUUI43ZEXa7IU8y8BUUUUUU== X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the alias instructions. --- gas/testsuite/gas/loongarch/insn_alias_32.d | 19 +++++++++++++++++++ gas/testsuite/gas/loongarch/insn_alias_32.s | 10 ++++++++++ gas/testsuite/gas/loongarch/insn_alias_64.d | 20 ++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_alias_64.s | 11 +++++++++++ 4 files changed, 60 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.d create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.s create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.d create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.s diff --git a/gas/testsuite/gas/loongarch/insn_alias_32.d b/gas/testsuite/gas/loongarch/insn_alias_32.d new file mode 100644 index 00000000000..753eae7a8f9 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_alias_32.d @@ -0,0 +1,19 @@ +#as: +#objdump: -d -M no-aliases +#skip: loongarch64-*-* + +.* file format .* + + +Disassembly of section .text: + +0+ : + 0: 001500a4 or \$a0, \$a1, \$zero + 4: 02bffc04 addi.w \$a0, \$zero, -1 + 8: 03400000 andi \$zero, \$zero, 0x0 + c: 03800404 ori \$a0, \$zero, 0x1 + 10: 4c000020 jirl \$zero, \$ra, 0 + 14: 4c000020 jirl \$zero, \$ra, 0 + 18: 60000080 blt \$a0, \$zero, 0 # 18 + 1c: 64000080 bge \$a0, \$zero, 0 # 1c + 20: 64000004 bge \$zero, \$a0, 0 # 20 diff --git a/gas/testsuite/gas/loongarch/insn_alias_32.s b/gas/testsuite/gas/loongarch/insn_alias_32.s new file mode 100644 index 00000000000..8027e32a5a6 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_alias_32.s @@ -0,0 +1,10 @@ +L1: + move $a0,$a1 + li.w $a0,-1 + nop + li.w $a0,1 + ret + jr $ra + bltz $a0,.L1 + bgez $a0,.L1 + blez $a0,.L1 diff --git a/gas/testsuite/gas/loongarch/insn_alias_64.d b/gas/testsuite/gas/loongarch/insn_alias_64.d new file mode 100644 index 00000000000..8d3ed7bc472 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_alias_64.d @@ -0,0 +1,20 @@ +#as-new: +#objdump: -d -M no-aliases +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ : + 0: 001500a4 or \$a0, \$a1, \$zero + 4: 02bffc04 addi.w \$a0, \$zero, -1 + 8: 02bffc04 addi.w \$a0, \$zero, -1 + c: 03400000 andi \$zero, \$zero, 0x0 + 10: 03800404 ori \$a0, \$zero, 0x1 + 14: 4c000020 jirl \$zero, \$ra, 0 + 18: 4c000020 jirl \$zero, \$ra, 0 + 1c: 60000080 blt \$a0, \$zero, 0 # 1c + 20: 64000080 bge \$a0, \$zero, 0 # 20 + 24: 64000004 bge \$zero, \$a0, 0 # 24 diff --git a/gas/testsuite/gas/loongarch/insn_alias_64.s b/gas/testsuite/gas/loongarch/insn_alias_64.s new file mode 100644 index 00000000000..e7e42638889 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_alias_64.s @@ -0,0 +1,11 @@ +L1: + move $a0,$a1 + li.w $a0,-1 + li.d $a0,-1 + nop + li.w $a0,1 + ret + jr $ra + bltz $a0,.L1 + bgez $a0,.L1 + blez $a0,.L1 From patchwork Thu Feb 29 11:45:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cai X-Patchwork-Id: 86580 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B4B4E3858430 for ; Thu, 29 Feb 2024 11:46:26 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id CF10D3858418 for ; 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b=kKOhulGbjif92t3Lfpqyg6Jmc7Xo1XD2s1yucm1ehK4Iii4zZSpImStp/0SfPPSgV/MN7hRx0n9UHjPJzMeUSLXcCtKrl9Kw3DU0ljCz8YeMo4tE5/IZlwL4PKRO+tP/hGxEmsNDAtj+8yfAwt0QJ+fJ7ZMVzWUi34hu0ykidVc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8DxdfFkbuBlrOISAA--.48120S3; Thu, 29 Feb 2024 19:45:40 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxX89RbuBlRb9KAA--.1626S6; Thu, 29 Feb 2024 19:45:39 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 2/7] LoongArch: Add gas testsuit for lbt/lvz instructions Date: Thu, 29 Feb 2024 19:45:14 +0800 Message-Id: <20240229114519.1552207-3-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114519.1552207-1-cailulu@loongson.cn> References: <20240229114519.1552207-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxX89RbuBlRb9KAA--.1626S6 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEkAAAsw X-Coremail-Antispam: 1Uk129KBj9fXoW3KrykCw43ur1UJr4DZw43urX_yoW8Jr1kWo Z5Ar95trs7C398tw4IkrWUtF47uF98WF97trZxAw17AF47C340qayvgFn8JaySv34rAr4U urnrAr15Xa4UGrs3l-sFpf9Il3svdjkaLaAFLSUrUUUU1b8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUY27kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUXVWUAwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAaw2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2 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binutils-bounces+patchwork=sourceware.org@sourceware.org Test the LBT/LVZ instructions. Only LA64 supports these instructions. --- gas/testsuite/gas/loongarch/insn_lbt.d | 186 +++++++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_lbt.s | 176 +++++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_lvz.d | 15 ++ gas/testsuite/gas/loongarch/insn_lvz.s | 5 + 4 files changed, 382 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.d create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.s create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.d create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.s diff --git a/gas/testsuite/gas/loongarch/insn_lbt.d b/gas/testsuite/gas/loongarch/insn_lbt.d new file mode 100644 index 00000000000..7d80fb89070 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lbt.d @@ -0,0 +1,186 @@ +#as: +#objdump: -d +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 00000820 movgr2scr \$scr0, \$ra + 4: 00000c20 movscr2gr \$zero, \$scr1 + 8: 48006600 jiscr0 100 + c: 48006700 jiscr1 100 + 10: 00290420 addu12i.w \$zero, \$ra, 1 + 14: 00298420 addu12i.d \$zero, \$ra, 1 + 18: 00300820 adc.b \$zero, \$ra, \$tp + 1c: 00308820 adc.h \$zero, \$ra, \$tp + 20: 00310820 adc.w \$zero, \$ra, \$tp + 24: 00318820 adc.d \$zero, \$ra, \$tp + 28: 00320820 sbc.b \$zero, \$ra, \$tp + 2c: 00328820 sbc.h \$zero, \$ra, \$tp + 30: 00330820 sbc.w \$zero, \$ra, \$tp + 34: 00338820 sbc.d \$zero, \$ra, \$tp + 38: 001a0820 rotr.b \$zero, \$ra, \$tp + 3c: 001a8820 rotr.h \$zero, \$ra, \$tp + 40: 004c2420 rotri.b \$zero, \$ra, 0x1 + 44: 004c4420 rotri.h \$zero, \$ra, 0x1 + 48: 00340820 rcr.b \$zero, \$ra, \$tp + 4c: 00348820 rcr.h \$zero, \$ra, \$tp + 50: 00350820 rcr.w \$zero, \$ra, \$tp + 54: 00358820 rcr.d \$zero, \$ra, \$tp + 58: 00502420 rcri.b \$zero, \$ra, 0x1 + 5c: 00504420 rcri.h \$zero, \$ra, 0x1 + 60: 00508420 rcri.w \$zero, \$ra, 0x1 + 64: 00510420 rcri.d \$zero, \$ra, 0x1 + 68: 0114e420 fcvt.ud.d \$fa0, \$fa1 + 6c: 0114e020 fcvt.ld.d \$fa0, \$fa1 + 70: 01150820 fcvt.d.ld \$fa0, \$fa1, \$fa2 + 74: 2e800420 ldl.d \$zero, \$ra, 1 + 78: 2e000420 ldl.w \$zero, \$ra, 1 + 7c: 2e400420 ldr.w \$zero, \$ra, 1 + 80: 2ec00420 ldr.d \$zero, \$ra, 1 + 84: 2f000420 stl.w \$zero, \$ra, 1 + 88: 2f800420 stl.d \$zero, \$ra, 1 + 8c: 2f400420 str.w \$zero, \$ra, 1 + 90: 2fc00420 str.d \$zero, \$ra, 1 + 94: 003f040c x86adc.b \$zero, \$ra + 98: 003f040d x86adc.h \$zero, \$ra + 9c: 003f040e x86adc.w \$zero, \$ra + a0: 003f040f x86adc.d \$zero, \$ra + a4: 003f0404 x86add.b \$zero, \$ra + a8: 003f0405 x86add.h \$zero, \$ra + ac: 003f0406 x86add.w \$zero, \$ra + b0: 003f0407 x86add.d \$zero, \$ra + b4: 003f0400 x86add.wu \$zero, \$ra + b8: 003f0401 x86add.du \$zero, \$ra + bc: 00008000 x86inc.b \$zero + c0: 00008001 x86inc.h \$zero + c4: 00008002 x86inc.w \$zero + c8: 00008003 x86inc.d \$zero + cc: 003f0410 x86sbc.b \$zero, \$ra + d0: 003f0411 x86sbc.h \$zero, \$ra + d4: 003f0412 x86sbc.w \$zero, \$ra + d8: 003f0413 x86sbc.d \$zero, \$ra + dc: 003f0408 x86sub.b \$zero, \$ra + e0: 003f0409 x86sub.h \$zero, \$ra + e4: 003f040a x86sub.w \$zero, \$ra + e8: 003f040b x86sub.d \$zero, \$ra + ec: 003f0402 x86sub.wu \$zero, \$ra + f0: 003f0403 x86sub.du \$zero, \$ra + f4: 00008004 x86dec.b \$zero + f8: 00008005 x86dec.h \$zero + fc: 00008006 x86dec.w \$zero + 100: 00008007 x86dec.d \$zero + 104: 003f8410 x86and.b \$zero, \$ra + 108: 003f8411 x86and.h \$zero, \$ra + 10c: 003f8412 x86and.w \$zero, \$ra + 110: 003f8413 x86and.d \$zero, \$ra + 114: 003f8414 x86or.b \$zero, \$ra + 118: 003f8415 x86or.h \$zero, \$ra + 11c: 003f8416 x86or.w \$zero, \$ra + 120: 003f8417 x86or.d \$zero, \$ra + 124: 003f8418 x86xor.b \$zero, \$ra + 128: 003f8419 x86xor.h \$zero, \$ra + 12c: 003f841a x86xor.w \$zero, \$ra + 130: 003f841b x86xor.d \$zero, \$ra + 134: 003e8400 x86mul.b \$zero, \$ra + 138: 003e8401 x86mul.h \$zero, \$ra + 13c: 003e8402 x86mul.w \$zero, \$ra + 140: 003e8403 x86mul.d \$zero, \$ra + 144: 003e8404 x86mul.bu \$zero, \$ra + 148: 003e8405 x86mul.hu \$zero, \$ra + 14c: 003e8406 x86mul.wu \$zero, \$ra + 150: 003e8407 x86mul.du \$zero, \$ra + 154: 003f840c x86rcl.b \$zero, \$ra + 158: 003f840d x86rcl.h \$zero, \$ra + 15c: 003f840e x86rcl.w \$zero, \$ra + 160: 003f840f x86rcl.d \$zero, \$ra + 164: 00542418 x86rcli.b \$zero, 0x1 + 168: 00544419 x86rcli.h \$zero, 0x1 + 16c: 0054841a x86rcli.w \$zero, 0x1 + 170: 0055041b x86rcli.d \$zero, 0x1 + 174: 003f8408 x86rcr.b \$zero, \$ra + 178: 003f8409 x86rcr.h \$zero, \$ra + 17c: 003f840a x86rcr.w \$zero, \$ra + 180: 003f840b x86rcr.d \$zero, \$ra + 184: 00542410 x86rcri.b \$zero, 0x1 + 188: 00544411 x86rcri.h \$zero, 0x1 + 18c: 00548412 x86rcri.w \$zero, 0x1 + 190: 00550413 x86rcri.d \$zero, 0x1 + 194: 003f8404 x86rotl.b \$zero, \$ra + 198: 003f8405 x86rotl.h \$zero, \$ra + 19c: 003f8406 x86rotl.w \$zero, \$ra + 1a0: 003f8407 x86rotl.d \$zero, \$ra + 1a4: 00542414 x86rotli.b \$zero, 0x1 + 1a8: 00544415 x86rotli.h \$zero, 0x1 + 1ac: 00548416 x86rotli.w \$zero, 0x1 + 1b0: 00550417 x86rotli.d \$zero, 0x1 + 1b4: 003f8400 x86rotr.b \$zero, \$ra + 1b8: 003f8401 x86rotr.h \$zero, \$ra + 1bc: 003f8402 x86rotr.d \$zero, \$ra + 1c0: 003f8403 x86rotr.w \$zero, \$ra + 1c4: 0054240c x86rotri.b \$zero, 0x1 + 1c8: 0054440d x86rotri.h \$zero, 0x1 + 1cc: 0054840e x86rotri.w \$zero, 0x1 + 1d0: 0055040f x86rotri.d \$zero, 0x1 + 1d4: 003f0414 x86sll.b \$zero, \$ra + 1d8: 003f0415 x86sll.h \$zero, \$ra + 1dc: 003f0416 x86sll.w \$zero, \$ra + 1e0: 003f0417 x86sll.d \$zero, \$ra + 1e4: 00542400 x86slli.b \$zero, 0x1 + 1e8: 00544401 x86slli.h \$zero, 0x1 + 1ec: 00548402 x86slli.w \$zero, 0x1 + 1f0: 00550403 x86slli.d \$zero, 0x1 + 1f4: 003f0418 x86srl.b \$zero, \$ra + 1f8: 003f0419 x86srl.h \$zero, \$ra + 1fc: 003f041a x86srl.w \$zero, \$ra + 200: 003f041b x86srl.d \$zero, \$ra + 204: 00542404 x86srli.b \$zero, 0x1 + 208: 00544405 x86srli.h \$zero, 0x1 + 20c: 00548406 x86srli.w \$zero, 0x1 + 210: 00550407 x86srli.d \$zero, 0x1 + 214: 003f041c x86sra.b \$zero, \$ra + 218: 003f041d x86sra.h \$zero, \$ra + 21c: 003f041e x86sra.w \$zero, \$ra + 220: 003f041f x86sra.d \$zero, \$ra + 224: 00542408 x86srai.b \$zero, 0x1 + 228: 00544409 x86srai.h \$zero, 0x1 + 22c: 0054840a x86srai.w \$zero, 0x1 + 230: 0055040b x86srai.d \$zero, 0x1 + 234: 00368400 setx86j \$zero, 0x1 + 238: 00007820 setx86loope \$zero, \$ra + 23c: 00007c20 setx86loopne \$zero, \$ra + 240: 005c0400 x86mfflag \$zero, 0x1 + 244: 005c0420 x86mtflag \$zero, 0x1 + 248: 00007400 x86mftop \$zero + 24c: 00007020 x86mttop 0x1 + 250: 00008009 x86inctop + 254: 00008029 x86dectop + 258: 00008008 x86settm + 25c: 00008028 x86clrtm + 260: 00580420 x86settag \$zero, 0x1, 0x1 + 264: 00370411 armadd.w \$zero, \$ra, 0x1 + 268: 00378411 armsub.w \$zero, \$ra, 0x1 + 26c: 00380411 armadc.w \$zero, \$ra, 0x1 + 270: 00388411 armsbc.w \$zero, \$ra, 0x1 + 274: 00390411 armand.w \$zero, \$ra, 0x1 + 278: 00398411 armor.w \$zero, \$ra, 0x1 + 27c: 003a0411 armxor.w \$zero, \$ra, 0x1 + 280: 003fc41c armnot.w \$zero, 0x1 + 284: 003a8411 armsll.w \$zero, \$ra, 0x1 + 288: 003b0411 armsrl.w \$zero, \$ra, 0x1 + 28c: 003b8411 armsra.w \$zero, \$ra, 0x1 + 290: 003c0411 armrotr.w \$zero, \$ra, 0x1 + 294: 003c8411 armslli.w \$zero, 0x1, 0x1 + 298: 003d0411 armsrli.w \$zero, 0x1, 0x1 + 29c: 003d8411 armsrai.w \$zero, 0x1, 0x1 + 2a0: 003e0411 armrotri.w \$zero, 0x1, 0x1 + 2a4: 003fc41f armrrx.w \$zero, 0x1 + 2a8: 00364420 armmove \$zero, \$ra, 0x1 + 2ac: 003fc41d armmov.w \$zero, 0x1 + 2b0: 003fc41e armmov.d \$zero, 0x1 + 2b4: 005c0440 armmfflag \$zero, 0x1 + 2b8: 005c0460 armmtflag \$zero, 0x1 + 2bc: 0036c400 setarmj \$zero, 0x1 diff --git a/gas/testsuite/gas/loongarch/insn_lbt.s b/gas/testsuite/gas/loongarch/insn_lbt.s new file mode 100644 index 00000000000..e49453c0dfc --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lbt.s @@ -0,0 +1,176 @@ +movgr2scr $scr0, $r1 +movscr2gr $r0, $scr1 +jiscr0 100 +jiscr1 100 +addu12i.w $r0, $r1, 1 +addu12i.d $r0, $r1, 1 +adc.b $r0, $r1, $r2 +adc.h $r0, $r1, $r2 +adc.w $r0, $r1, $r2 +adc.d $r0, $r1, $r2 +sbc.b $r0, $r1, $r2 +sbc.h $r0, $r1, $r2 +sbc.w $r0, $r1, $r2 +sbc.d $r0, $r1, $r2 +rotr.b $r0, $r1, $r2 +rotr.h $r0, $r1, $r2 +rotri.b $r0, $r1, 1 +rotri.h $r0, $r1, 1 +rcr.b $r0, $r1, $r2 +rcr.h $r0, $r1, $r2 +rcr.w $r0, $r1, $r2 +rcr.d $r0, $r1, $r2 +rcri.b $r0, $r1, 1 +rcri.h $r0, $r1, 1 +rcri.w $r0, $r1, 1 +rcri.d $r0, $r1, 1 +fcvt.ud.d $f0, $f1 +fcvt.ld.d $f0, $f1 +fcvt.d.ld $f0, $f1, $f2 +ldl.d $r0, $r1, 1 +ldl.w $r0, $r1, 1 +ldr.w $r0, $r1, 1 +ldr.d $r0, $r1, 1 +stl.w $r0, $r1, 1 +stl.d $r0, $r1, 1 +str.w $r0, $r1, 1 +str.d $r0, $r1, 1 +x86adc.b $r0, $r1 +x86adc.h $r0, $r1 +x86adc.w $r0, $r1 +x86adc.d $r0, $r1 +x86add.b $r0, $r1 +x86add.h $r0, $r1 +x86add.w $r0, $r1 +x86add.d $r0, $r1 +x86add.wu $r0, $r1 +x86add.du $r0, $r1 +x86inc.b $r0 +x86inc.h $r0 +x86inc.w $r0 +x86inc.d $r0 +x86sbc.b $r0, $r1 +x86sbc.h $r0, $r1 +x86sbc.w $r0, $r1 +x86sbc.d $r0, $r1 +x86sub.b $r0, $r1 +x86sub.h $r0, $r1 +x86sub.w $r0, $r1 +x86sub.d $r0, $r1 +x86sub.wu $r0, $r1 +x86sub.du $r0, $r1 +x86dec.b $r0 +x86dec.h $r0 +x86dec.w $r0 +x86dec.d $r0 +x86and.b $r0, $r1 +x86and.h $r0, $r1 +x86and.w $r0, $r1 +x86and.d $r0, $r1 +x86or.b $r0, $r1 +x86or.h $r0, $r1 +x86or.w $r0, $r1 +x86or.d $r0, $r1 +x86xor.b $r0, $r1 +x86xor.h $r0, $r1 +x86xor.w $r0, $r1 +x86xor.d $r0, $r1 +x86mul.b $r0, $r1 +x86mul.h $r0, $r1 +x86mul.w $r0, $r1 +x86mul.d $r0, $r1 +x86mul.bu $r0, $r1 +x86mul.hu $r0, $r1 +x86mul.wu $r0, $r1 +x86mul.du $r0, $r1 +x86rcl.b $r0, $r1 +x86rcl.h $r0, $r1 +x86rcl.w $r0, $r1 +x86rcl.d $r0, $r1 +x86rcli.b $r0, 1 +x86rcli.h $r0, 1 +x86rcli.w $r0, 1 +x86rcli.d $r0, 1 +x86rcr.b $r0, $r1 +x86rcr.h $r0, $r1 +x86rcr.w $r0, $r1 +x86rcr.d $r0, $r1 +x86rcri.b $r0, 1 +x86rcri.h $r0, 1 +x86rcri.w $r0, 1 +x86rcri.d $r0, 1 +x86rotl.b $r0, $r1 +x86rotl.h $r0, $r1 +x86rotl.w $r0, $r1 +x86rotl.d $r0, $r1 +x86rotli.b $r0, 1 +x86rotli.h $r0, 1 +x86rotli.w $r0, 1 +x86rotli.d $r0, 1 +x86rotr.b $r0, $r1 +x86rotr.h $r0, $r1 +x86rotr.d $r0, $r1 +x86rotr.w $r0, $r1 +x86rotri.b $r0, 1 +x86rotri.h $r0, 1 +x86rotri.w $r0, 1 +x86rotri.d $r0, 1 +x86sll.b $r0, $r1 +x86sll.h $r0, $r1 +x86sll.w $r0, $r1 +x86sll.d $r0, $r1 +x86slli.b $r0, 1 +x86slli.h $r0, 1 +x86slli.w $r0, 1 +x86slli.d $r0, 1 +x86srl.b $r0, $r1 +x86srl.h $r0, $r1 +x86srl.w $r0, $r1 +x86srl.d $r0, $r1 +x86srli.b $r0, 1 +x86srli.h $r0, 1 +x86srli.w $r0, 1 +x86srli.d $r0, 1 +x86sra.b $r0, $r1 +x86sra.h $r0, $r1 +x86sra.w $r0, $r1 +x86sra.d $r0, $r1 +x86srai.b $r0, 1 +x86srai.h $r0, 1 +x86srai.w $r0, 1 +x86srai.d $r0, 1 +setx86j $r0, 1 +setx86loope $r0, $r1 +setx86loopne $r0, $r1 +x86mfflag $r0, 1 +x86mtflag $r0, 1 +x86mftop $r0 +x86mttop 1 +x86inctop +x86dectop +x86settm +x86clrtm +x86settag $r0, 1, 1 +armadd.w $r0, $r1, 1 +armsub.w $r0, $r1, 1 +armadc.w $r0, $r1, 1 +armsbc.w $r0, $r1, 1 +armand.w $r0, $r1, 1 +armor.w $r0, $r1, 1 +armxor.w $r0, $r1, 1 +armnot.w $r0, 1 +armsll.w $r0, $r1, 1 +armsrl.w $r0, $r1, 1 +armsra.w $r0, $r1, 1 +armrotr.w $r0, $r1, 1 +armslli.w $r0, 1, 1 +armsrli.w $r0, 1, 1 +armsrai.w $r0, 1, 1 +armrotri.w $r0, 1, 1 +armrrx.w $r0, 1 +armmove $r0, $r1, 1 +armmov.w $r0, 1 +armmov.d $r0, 1 +armmfflag $r0, 1 +armmtflag $r0, 1 +setarmj $r0, 1 diff --git a/gas/testsuite/gas/loongarch/insn_lvz.d b/gas/testsuite/gas/loongarch/insn_lvz.d new file mode 100644 index 00000000000..547091ed3b3 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lvz.d @@ -0,0 +1,15 @@ +#as: +#objdump: -d +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 05000400 gcsrrd \$zero, 0x1 + 4: 05000420 gcsrwr \$zero, 0x1 + 8: 05000483 gcsrxchg \$sp, \$a0, 0x1 + c: 06482401 gtlbflush + 10: 002b8001 hvcl 0x1 diff --git a/gas/testsuite/gas/loongarch/insn_lvz.s b/gas/testsuite/gas/loongarch/insn_lvz.s new file mode 100644 index 00000000000..1b1a594064d --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lvz.s @@ -0,0 +1,5 @@ +gcsrrd $r0, 1 +gcsrwr $r0, 1 +gcsrxchg $r3, $r4, 1 +gtlbflush +hvcl 1 From patchwork Thu Feb 29 11:45:15 2024 Content-Type: text/plain; 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From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 3/7] LoongArch: Add gas testsuit for lsx/lasx instructions Date: Thu, 29 Feb 2024 19:45:15 +0800 Message-Id: <20240229114519.1552207-4-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114519.1552207-1-cailulu@loongson.cn> References: <20240229114519.1552207-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxX89RbuBlRb9KAA--.1626S7 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEkwAAsz X-Coremail-Antispam: 1Uk129KBj9fXoWDtry7Zr13AF4UKw1rGF1Utwc_yoWkGrWfWo W5G34Ygw4DG3s7tr15ZF1rZr1UJF45ZryDGw1xAw4DJa95u348Awsav347Cr98Kr9avw45 tFy7CF48G3sxGr4kl-sFpf9Il3svdjkaLaAFLSUrUUUU1b8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUYy7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUGVWUXwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAaw2AFwI0_Jrv_JF1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2 xF0cIa020Ex4CE44I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_ Jw0_WrylYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x 0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwCFI7km07C267AK xVWUXVWUAwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67 AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW5JVW7JwCI 42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMI IF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVF xhVjvjDU0xZFpf9x07jwBMNUUUUU= X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the LSX/LASX instructions. Only LA64 supports these instructions. --- gas/testsuite/gas/loongarch/insn_lasx.d | 737 +++++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_lasx.s | 727 +++++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_lsx.d | 742 ++++++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_lsx.s | 732 +++++++++++++++++++++++ 4 files changed, 2938 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.d create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.s create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.d create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.s diff --git a/gas/testsuite/gas/loongarch/insn_lasx.d b/gas/testsuite/gas/loongarch/insn_lasx.d new file mode 100644 index 00000000000..74742b5f7d9 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lasx.d @@ -0,0 +1,737 @@ +#as: +#objdump: -d +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 0a118820 xvfmadd.s \$xr0, \$xr1, \$xr2, \$xr3 + 4: 0a518820 xvfmsub.s \$xr0, \$xr1, \$xr2, \$xr3 + 8: 0a918820 xvfnmadd.s \$xr0, \$xr1, \$xr2, \$xr3 + c: 0ad18820 xvfnmsub.s \$xr0, \$xr1, \$xr2, \$xr3 + 10: 0c900820 xvfcmp.caf.s \$xr0, \$xr1, \$xr2 + 14: 0c908820 xvfcmp.saf.s \$xr0, \$xr1, \$xr2 + 18: 0c910820 xvfcmp.clt.s \$xr0, \$xr1, \$xr2 + 1c: 0c918820 xvfcmp.slt.s \$xr0, \$xr1, \$xr2 + 20: 0c920820 xvfcmp.ceq.s \$xr0, \$xr1, \$xr2 + 24: 0c928820 xvfcmp.seq.s \$xr0, \$xr1, \$xr2 + 28: 0c930820 xvfcmp.cle.s \$xr0, \$xr1, \$xr2 + 2c: 0c938820 xvfcmp.sle.s \$xr0, \$xr1, \$xr2 + 30: 0c940820 xvfcmp.cun.s \$xr0, \$xr1, \$xr2 + 34: 0c948820 xvfcmp.sun.s \$xr0, \$xr1, \$xr2 + 38: 0c950820 xvfcmp.cult.s \$xr0, \$xr1, \$xr2 + 3c: 0c958820 xvfcmp.sult.s \$xr0, \$xr1, \$xr2 + 40: 0c960820 xvfcmp.cueq.s \$xr0, \$xr1, \$xr2 + 44: 0c968820 xvfcmp.sueq.s \$xr0, \$xr1, \$xr2 + 48: 0c970820 xvfcmp.cule.s \$xr0, \$xr1, \$xr2 + 4c: 0c978820 xvfcmp.sule.s \$xr0, \$xr1, \$xr2 + 50: 0c980820 xvfcmp.cne.s \$xr0, \$xr1, \$xr2 + 54: 0c988820 xvfcmp.sne.s \$xr0, \$xr1, \$xr2 + 58: 0c9a0820 xvfcmp.cor.s \$xr0, \$xr1, \$xr2 + 5c: 0c9a8820 xvfcmp.sor.s \$xr0, \$xr1, \$xr2 + 60: 0c9c0820 xvfcmp.cune.s \$xr0, \$xr1, \$xr2 + 64: 0c9c8820 xvfcmp.sune.s \$xr0, \$xr1, \$xr2 + 68: 0d218820 xvbitsel.v \$xr0, \$xr1, \$xr2, \$xr3 + 6c: 0d618820 xvshuf.b \$xr0, \$xr1, \$xr2, \$xr3 + 70: 0a218820 xvfmadd.d \$xr0, \$xr1, \$xr2, \$xr3 + 74: 0a618820 xvfmsub.d \$xr0, \$xr1, \$xr2, \$xr3 + 78: 0aa18820 xvfnmadd.d \$xr0, \$xr1, \$xr2, \$xr3 + 7c: 0ae18820 xvfnmsub.d \$xr0, \$xr1, \$xr2, \$xr3 + 80: 0ca00820 xvfcmp.caf.d \$xr0, \$xr1, \$xr2 + 84: 0ca08820 xvfcmp.saf.d \$xr0, \$xr1, \$xr2 + 88: 0ca10820 xvfcmp.clt.d \$xr0, \$xr1, \$xr2 + 8c: 0ca18820 xvfcmp.slt.d \$xr0, \$xr1, \$xr2 + 90: 0ca20820 xvfcmp.ceq.d \$xr0, \$xr1, \$xr2 + 94: 0ca28820 xvfcmp.seq.d \$xr0, \$xr1, \$xr2 + 98: 0ca30820 xvfcmp.cle.d \$xr0, \$xr1, \$xr2 + 9c: 0ca38820 xvfcmp.sle.d \$xr0, \$xr1, \$xr2 + a0: 0ca40820 xvfcmp.cun.d \$xr0, \$xr1, \$xr2 + a4: 0ca48820 xvfcmp.sun.d \$xr0, \$xr1, \$xr2 + a8: 0ca50820 xvfcmp.cult.d \$xr0, \$xr1, \$xr2 + ac: 0ca58820 xvfcmp.sult.d \$xr0, \$xr1, \$xr2 + b0: 0ca60820 xvfcmp.cueq.d \$xr0, \$xr1, \$xr2 + b4: 0ca68820 xvfcmp.sueq.d \$xr0, \$xr1, \$xr2 + b8: 0ca70820 xvfcmp.cule.d \$xr0, \$xr1, \$xr2 + bc: 0ca78820 xvfcmp.sule.d \$xr0, \$xr1, \$xr2 + c0: 0ca80820 xvfcmp.cne.d \$xr0, \$xr1, \$xr2 + c4: 0ca88820 xvfcmp.sne.d \$xr0, \$xr1, \$xr2 + c8: 0caa0820 xvfcmp.cor.d \$xr0, \$xr1, \$xr2 + cc: 0caa8820 xvfcmp.sor.d \$xr0, \$xr1, \$xr2 + d0: 0cac0820 xvfcmp.cune.d \$xr0, \$xr1, \$xr2 + d4: 0cac8820 xvfcmp.sune.d \$xr0, \$xr1, \$xr2 + d8: 2c800420 xvld \$xr0, \$ra, 1 + dc: 2cc00420 xvst \$xr0, \$ra, 1 + e0: 38480820 xvldx \$xr0, \$ra, \$tp + e4: 384c0820 xvstx \$xr0, \$ra, \$tp + e8: 3211f420 xvldrepl.d \$xr0, \$ra, 1000 + ec: 32206420 xvldrepl.w \$xr0, \$ra, 100 + f0: 32401420 xvldrepl.h \$xr0, \$ra, 10 + f4: 32800420 xvldrepl.b \$xr0, \$ra, 1 + f8: 3315f420 xvstelm.d \$xr0, \$ra, 1000, 0x1 + fc: 33246420 xvstelm.w \$xr0, \$ra, 100, 0x1 + 100: 33441420 xvstelm.h \$xr0, \$ra, 10, 0x1 + 104: 33840420 xvstelm.b \$xr0, \$ra, 1, 0x1 + 108: 74000820 xvseq.b \$xr0, \$xr1, \$xr2 + 10c: 74008820 xvseq.h \$xr0, \$xr1, \$xr2 + 110: 74010820 xvseq.w \$xr0, \$xr1, \$xr2 + 114: 74018820 xvseq.d \$xr0, \$xr1, \$xr2 + 118: 74020820 xvsle.b \$xr0, \$xr1, \$xr2 + 11c: 74028820 xvsle.h \$xr0, \$xr1, \$xr2 + 120: 74030820 xvsle.w \$xr0, \$xr1, \$xr2 + 124: 74038820 xvsle.d \$xr0, \$xr1, \$xr2 + 128: 74040820 xvsle.bu \$xr0, \$xr1, \$xr2 + 12c: 74048820 xvsle.hu \$xr0, \$xr1, \$xr2 + 130: 74050820 xvsle.wu \$xr0, \$xr1, \$xr2 + 134: 74058820 xvsle.du \$xr0, \$xr1, \$xr2 + 138: 74060820 xvslt.b \$xr0, \$xr1, \$xr2 + 13c: 74068820 xvslt.h \$xr0, \$xr1, \$xr2 + 140: 74070820 xvslt.w \$xr0, \$xr1, \$xr2 + 144: 74078820 xvslt.d \$xr0, \$xr1, \$xr2 + 148: 74080820 xvslt.bu \$xr0, \$xr1, \$xr2 + 14c: 74088820 xvslt.hu \$xr0, \$xr1, \$xr2 + 150: 74090820 xvslt.wu \$xr0, \$xr1, \$xr2 + 154: 74098820 xvslt.du \$xr0, \$xr1, \$xr2 + 158: 740a0820 xvadd.b \$xr0, \$xr1, \$xr2 + 15c: 740a8820 xvadd.h \$xr0, \$xr1, \$xr2 + 160: 740b0820 xvadd.w \$xr0, \$xr1, \$xr2 + 164: 740b8820 xvadd.d \$xr0, \$xr1, \$xr2 + 168: 740c0820 xvsub.b \$xr0, \$xr1, \$xr2 + 16c: 740c8820 xvsub.h \$xr0, \$xr1, \$xr2 + 170: 740d0820 xvsub.w \$xr0, \$xr1, \$xr2 + 174: 740d8820 xvsub.d \$xr0, \$xr1, \$xr2 + 178: 74460820 xvsadd.b \$xr0, \$xr1, \$xr2 + 17c: 74468820 xvsadd.h \$xr0, \$xr1, \$xr2 + 180: 74470820 xvsadd.w \$xr0, \$xr1, \$xr2 + 184: 74478820 xvsadd.d \$xr0, \$xr1, \$xr2 + 188: 74480820 xvssub.b \$xr0, \$xr1, \$xr2 + 18c: 74488820 xvssub.h \$xr0, \$xr1, \$xr2 + 190: 74490820 xvssub.w \$xr0, \$xr1, \$xr2 + 194: 74498820 xvssub.d \$xr0, \$xr1, \$xr2 + 198: 744a0820 xvsadd.bu \$xr0, \$xr1, \$xr2 + 19c: 744a8820 xvsadd.hu \$xr0, \$xr1, \$xr2 + 1a0: 744b0820 xvsadd.wu \$xr0, \$xr1, \$xr2 + 1a4: 744b8820 xvsadd.du \$xr0, \$xr1, \$xr2 + 1a8: 744c0820 xvssub.bu \$xr0, \$xr1, \$xr2 + 1ac: 744c8820 xvssub.hu \$xr0, \$xr1, \$xr2 + 1b0: 744d0820 xvssub.wu \$xr0, \$xr1, \$xr2 + 1b4: 744d8820 xvssub.du \$xr0, \$xr1, \$xr2 + 1b8: 74540820 xvhaddw.h.b \$xr0, \$xr1, \$xr2 + 1bc: 74548820 xvhaddw.w.h \$xr0, \$xr1, \$xr2 + 1c0: 74550820 xvhaddw.d.w \$xr0, \$xr1, \$xr2 + 1c4: 74558820 xvhaddw.q.d \$xr0, \$xr1, \$xr2 + 1c8: 74560820 xvhsubw.h.b \$xr0, \$xr1, \$xr2 + 1cc: 74568820 xvhsubw.w.h \$xr0, \$xr1, \$xr2 + 1d0: 74570820 xvhsubw.d.w \$xr0, \$xr1, \$xr2 + 1d4: 74578820 xvhsubw.q.d \$xr0, \$xr1, \$xr2 + 1d8: 74580820 xvhaddw.hu.bu \$xr0, \$xr1, \$xr2 + 1dc: 74588820 xvhaddw.wu.hu \$xr0, \$xr1, \$xr2 + 1e0: 74590820 xvhaddw.du.wu \$xr0, \$xr1, \$xr2 + 1e4: 74598820 xvhaddw.qu.du \$xr0, \$xr1, \$xr2 + 1e8: 745a0820 xvhsubw.hu.bu \$xr0, \$xr1, \$xr2 + 1ec: 745a8820 xvhsubw.wu.hu \$xr0, \$xr1, \$xr2 + 1f0: 745b0820 xvhsubw.du.wu \$xr0, \$xr1, \$xr2 + 1f4: 745b8820 xvhsubw.qu.du \$xr0, \$xr1, \$xr2 + 1f8: 741e0820 xvaddwev.h.b \$xr0, \$xr1, \$xr2 + 1fc: 741e8820 xvaddwev.w.h \$xr0, \$xr1, \$xr2 + 200: 741f0820 xvaddwev.d.w \$xr0, \$xr1, \$xr2 + 204: 741f8820 xvaddwev.q.d \$xr0, \$xr1, \$xr2 + 208: 742e0820 xvaddwev.h.bu \$xr0, \$xr1, \$xr2 + 20c: 742e8820 xvaddwev.w.hu \$xr0, \$xr1, \$xr2 + 210: 742f0820 xvaddwev.d.wu \$xr0, \$xr1, \$xr2 + 214: 742f8820 xvaddwev.q.du \$xr0, \$xr1, \$xr2 + 218: 743e0820 xvaddwev.h.bu.b \$xr0, \$xr1, \$xr2 + 21c: 743e8820 xvaddwev.w.hu.h \$xr0, \$xr1, \$xr2 + 220: 743f0820 xvaddwev.d.wu.w \$xr0, \$xr1, \$xr2 + 224: 743f8820 xvaddwev.q.du.d \$xr0, \$xr1, \$xr2 + 228: 74220820 xvaddwod.h.b \$xr0, \$xr1, \$xr2 + 22c: 74228820 xvaddwod.w.h \$xr0, \$xr1, \$xr2 + 230: 74230820 xvaddwod.d.w \$xr0, \$xr1, \$xr2 + 234: 74238820 xvaddwod.q.d \$xr0, \$xr1, \$xr2 + 238: 74320820 xvaddwod.h.bu \$xr0, \$xr1, \$xr2 + 23c: 74328820 xvaddwod.w.hu \$xr0, \$xr1, \$xr2 + 240: 74330820 xvaddwod.d.wu \$xr0, \$xr1, \$xr2 + 244: 74338820 xvaddwod.q.du \$xr0, \$xr1, \$xr2 + 248: 74400820 xvaddwod.h.bu.b \$xr0, \$xr1, \$xr2 + 24c: 74408820 xvaddwod.w.hu.h \$xr0, \$xr1, \$xr2 + 250: 74410820 xvaddwod.d.wu.w \$xr0, \$xr1, \$xr2 + 254: 74418820 xvaddwod.q.du.d \$xr0, \$xr1, \$xr2 + 258: 74ac0820 xvmaddwev.h.b \$xr0, \$xr1, \$xr2 + 25c: 74ac8820 xvmaddwev.w.h \$xr0, \$xr1, \$xr2 + 260: 74ad0820 xvmaddwev.d.w \$xr0, \$xr1, \$xr2 + 264: 74ad8820 xvmaddwev.q.d \$xr0, \$xr1, \$xr2 + 268: 74bc0820 xvmaddwev.h.bu.b \$xr0, \$xr1, \$xr2 + 26c: 74bc8820 xvmaddwev.w.hu.h \$xr0, \$xr1, \$xr2 + 270: 74bd0820 xvmaddwev.d.wu.w \$xr0, \$xr1, \$xr2 + 274: 74bd8820 xvmaddwev.q.du.d \$xr0, \$xr1, \$xr2 + 278: 74b40820 xvmaddwev.h.bu \$xr0, \$xr1, \$xr2 + 27c: 74b48820 xvmaddwev.w.hu \$xr0, \$xr1, \$xr2 + 280: 74b50820 xvmaddwev.d.wu \$xr0, \$xr1, \$xr2 + 284: 74b58820 xvmaddwev.q.du \$xr0, \$xr1, \$xr2 + 288: 74ae0820 xvmaddwod.h.b \$xr0, \$xr1, \$xr2 + 28c: 74ae8820 xvmaddwod.w.h \$xr0, \$xr1, \$xr2 + 290: 74af0820 xvmaddwod.d.w \$xr0, \$xr1, \$xr2 + 294: 74af8820 xvmaddwod.q.d \$xr0, \$xr1, \$xr2 + 298: 74b60820 xvmaddwod.h.bu \$xr0, \$xr1, \$xr2 + 29c: 74b68820 xvmaddwod.w.hu \$xr0, \$xr1, \$xr2 + 2a0: 74b70820 xvmaddwod.d.wu \$xr0, \$xr1, \$xr2 + 2a4: 74b78820 xvmaddwod.q.du \$xr0, \$xr1, \$xr2 + 2a8: 74be0820 xvmaddwod.h.bu.b \$xr0, \$xr1, \$xr2 + 2ac: 74be8820 xvmaddwod.w.hu.h \$xr0, \$xr1, \$xr2 + 2b0: 74bf0820 xvmaddwod.d.wu.w \$xr0, \$xr1, \$xr2 + 2b4: 74bf8820 xvmaddwod.q.du.d \$xr0, \$xr1, \$xr2 + 2b8: 74900820 xvmulwev.h.b \$xr0, \$xr1, \$xr2 + 2bc: 74908820 xvmulwev.w.h \$xr0, \$xr1, \$xr2 + 2c0: 74910820 xvmulwev.d.w \$xr0, \$xr1, \$xr2 + 2c4: 74918820 xvmulwev.q.d \$xr0, \$xr1, \$xr2 + 2c8: 74980820 xvmulwev.h.bu \$xr0, \$xr1, \$xr2 + 2cc: 74988820 xvmulwev.w.hu \$xr0, \$xr1, \$xr2 + 2d0: 74990820 xvmulwev.d.wu \$xr0, \$xr1, \$xr2 + 2d4: 74998820 xvmulwev.q.du \$xr0, \$xr1, \$xr2 + 2d8: 74a00820 xvmulwev.h.bu.b \$xr0, \$xr1, \$xr2 + 2dc: 74a08820 xvmulwev.w.hu.h \$xr0, \$xr1, \$xr2 + 2e0: 74a10820 xvmulwev.d.wu.w \$xr0, \$xr1, \$xr2 + 2e4: 74a18820 xvmulwev.q.du.d \$xr0, \$xr1, \$xr2 + 2e8: 74920820 xvmulwod.h.b \$xr0, \$xr1, \$xr2 + 2ec: 74928820 xvmulwod.w.h \$xr0, \$xr1, \$xr2 + 2f0: 74930820 xvmulwod.d.w \$xr0, \$xr1, \$xr2 + 2f4: 74938820 xvmulwod.q.d \$xr0, \$xr1, \$xr2 + 2f8: 749a0820 xvmulwod.h.bu \$xr0, \$xr1, \$xr2 + 2fc: 749a8820 xvmulwod.w.hu \$xr0, \$xr1, \$xr2 + 300: 749b0820 xvmulwod.d.wu \$xr0, \$xr1, \$xr2 + 304: 749b8820 xvmulwod.q.du \$xr0, \$xr1, \$xr2 + 308: 74a20820 xvmulwod.h.bu.b \$xr0, \$xr1, \$xr2 + 30c: 74a28820 xvmulwod.w.hu.h \$xr0, \$xr1, \$xr2 + 310: 74a30820 xvmulwod.d.wu.w \$xr0, \$xr1, \$xr2 + 314: 74a38820 xvmulwod.q.du.d \$xr0, \$xr1, \$xr2 + 318: 74200820 xvsubwev.h.b \$xr0, \$xr1, \$xr2 + 31c: 74208820 xvsubwev.w.h \$xr0, \$xr1, \$xr2 + 320: 74210820 xvsubwev.d.w \$xr0, \$xr1, \$xr2 + 324: 74218820 xvsubwev.q.d \$xr0, \$xr1, \$xr2 + 328: 74300820 xvsubwev.h.bu \$xr0, \$xr1, \$xr2 + 32c: 74308820 xvsubwev.w.hu \$xr0, \$xr1, \$xr2 + 330: 74310820 xvsubwev.d.wu \$xr0, \$xr1, \$xr2 + 334: 74318820 xvsubwev.q.du \$xr0, \$xr1, \$xr2 + 338: 74240820 xvsubwod.h.b \$xr0, \$xr1, \$xr2 + 33c: 74248820 xvsubwod.w.h \$xr0, \$xr1, \$xr2 + 340: 74250820 xvsubwod.d.w \$xr0, \$xr1, \$xr2 + 344: 74258820 xvsubwod.q.d \$xr0, \$xr1, \$xr2 + 348: 74340820 xvsubwod.h.bu \$xr0, \$xr1, \$xr2 + 34c: 74348820 xvsubwod.w.hu \$xr0, \$xr1, \$xr2 + 350: 74350820 xvsubwod.d.wu \$xr0, \$xr1, \$xr2 + 354: 74358820 xvsubwod.q.du \$xr0, \$xr1, \$xr2 + 358: 745c0820 xvadda.b \$xr0, \$xr1, \$xr2 + 35c: 745c8820 xvadda.h \$xr0, \$xr1, \$xr2 + 360: 745d0820 xvadda.w \$xr0, \$xr1, \$xr2 + 364: 745d8820 xvadda.d \$xr0, \$xr1, \$xr2 + 368: 74600820 xvabsd.b \$xr0, \$xr1, \$xr2 + 36c: 74608820 xvabsd.h \$xr0, \$xr1, \$xr2 + 370: 74610820 xvabsd.w \$xr0, \$xr1, \$xr2 + 374: 74618820 xvabsd.d \$xr0, \$xr1, \$xr2 + 378: 74620820 xvabsd.bu \$xr0, \$xr1, \$xr2 + 37c: 74628820 xvabsd.hu \$xr0, \$xr1, \$xr2 + 380: 74630820 xvabsd.wu \$xr0, \$xr1, \$xr2 + 384: 74638820 xvabsd.du \$xr0, \$xr1, \$xr2 + 388: 74640820 xvavg.b \$xr0, \$xr1, \$xr2 + 38c: 74648820 xvavg.h \$xr0, \$xr1, \$xr2 + 390: 74650820 xvavg.w \$xr0, \$xr1, \$xr2 + 394: 74658820 xvavg.d \$xr0, \$xr1, \$xr2 + 398: 74660820 xvavg.bu \$xr0, \$xr1, \$xr2 + 39c: 74668820 xvavg.hu \$xr0, \$xr1, \$xr2 + 3a0: 74670820 xvavg.wu \$xr0, \$xr1, \$xr2 + 3a4: 74678820 xvavg.du \$xr0, \$xr1, \$xr2 + 3a8: 74680820 xvavgr.b \$xr0, \$xr1, \$xr2 + 3ac: 74688820 xvavgr.h \$xr0, \$xr1, \$xr2 + 3b0: 74690820 xvavgr.w \$xr0, \$xr1, \$xr2 + 3b4: 74698820 xvavgr.d \$xr0, \$xr1, \$xr2 + 3b8: 746a0820 xvavgr.bu \$xr0, \$xr1, \$xr2 + 3bc: 746a8820 xvavgr.hu \$xr0, \$xr1, \$xr2 + 3c0: 746b0820 xvavgr.wu \$xr0, \$xr1, \$xr2 + 3c4: 746b8820 xvavgr.du \$xr0, \$xr1, \$xr2 + 3c8: 74700820 xvmax.b \$xr0, \$xr1, \$xr2 + 3cc: 74708820 xvmax.h \$xr0, \$xr1, \$xr2 + 3d0: 74710820 xvmax.w \$xr0, \$xr1, \$xr2 + 3d4: 74718820 xvmax.d \$xr0, \$xr1, \$xr2 + 3d8: 74720820 xvmin.b \$xr0, \$xr1, \$xr2 + 3dc: 74728820 xvmin.h \$xr0, \$xr1, \$xr2 + 3e0: 74730820 xvmin.w \$xr0, \$xr1, \$xr2 + 3e4: 74738820 xvmin.d \$xr0, \$xr1, \$xr2 + 3e8: 74740820 xvmax.bu \$xr0, \$xr1, \$xr2 + 3ec: 74748820 xvmax.hu \$xr0, \$xr1, \$xr2 + 3f0: 74750820 xvmax.wu \$xr0, \$xr1, \$xr2 + 3f4: 74758820 xvmax.du \$xr0, \$xr1, \$xr2 + 3f8: 74760820 xvmin.bu \$xr0, \$xr1, \$xr2 + 3fc: 74768820 xvmin.hu \$xr0, \$xr1, \$xr2 + 400: 74770820 xvmin.wu \$xr0, \$xr1, \$xr2 + 404: 74778820 xvmin.du \$xr0, \$xr1, \$xr2 + 408: 74840820 xvmul.b \$xr0, \$xr1, \$xr2 + 40c: 74848820 xvmul.h \$xr0, \$xr1, \$xr2 + 410: 74850820 xvmul.w \$xr0, \$xr1, \$xr2 + 414: 74858820 xvmul.d \$xr0, \$xr1, \$xr2 + 418: 74860820 xvmuh.b \$xr0, \$xr1, \$xr2 + 41c: 74868820 xvmuh.h \$xr0, \$xr1, \$xr2 + 420: 74870820 xvmuh.w \$xr0, \$xr1, \$xr2 + 424: 74878820 xvmuh.d \$xr0, \$xr1, \$xr2 + 428: 74880820 xvmuh.bu \$xr0, \$xr1, \$xr2 + 42c: 74888820 xvmuh.hu \$xr0, \$xr1, \$xr2 + 430: 74890820 xvmuh.wu \$xr0, \$xr1, \$xr2 + 434: 74898820 xvmuh.du \$xr0, \$xr1, \$xr2 + 438: 74a80820 xvmadd.b \$xr0, \$xr1, \$xr2 + 43c: 74a88820 xvmadd.h \$xr0, \$xr1, \$xr2 + 440: 74a90820 xvmadd.w \$xr0, \$xr1, \$xr2 + 444: 74a98820 xvmadd.d \$xr0, \$xr1, \$xr2 + 448: 74aa0820 xvmsub.b \$xr0, \$xr1, \$xr2 + 44c: 74aa8820 xvmsub.h \$xr0, \$xr1, \$xr2 + 450: 74ab0820 xvmsub.w \$xr0, \$xr1, \$xr2 + 454: 74ab8820 xvmsub.d \$xr0, \$xr1, \$xr2 + 458: 74e00820 xvdiv.b \$xr0, \$xr1, \$xr2 + 45c: 74e08820 xvdiv.h \$xr0, \$xr1, \$xr2 + 460: 74e10820 xvdiv.w \$xr0, \$xr1, \$xr2 + 464: 74e18820 xvdiv.d \$xr0, \$xr1, \$xr2 + 468: 74e20820 xvmod.b \$xr0, \$xr1, \$xr2 + 46c: 74e28820 xvmod.h \$xr0, \$xr1, \$xr2 + 470: 74e30820 xvmod.w \$xr0, \$xr1, \$xr2 + 474: 74e38820 xvmod.d \$xr0, \$xr1, \$xr2 + 478: 74e40820 xvdiv.bu \$xr0, \$xr1, \$xr2 + 47c: 74e48820 xvdiv.hu \$xr0, \$xr1, \$xr2 + 480: 74e50820 xvdiv.wu \$xr0, \$xr1, \$xr2 + 484: 74e58820 xvdiv.du \$xr0, \$xr1, \$xr2 + 488: 74e60820 xvmod.bu \$xr0, \$xr1, \$xr2 + 48c: 74e68820 xvmod.hu \$xr0, \$xr1, \$xr2 + 490: 74e70820 xvmod.wu \$xr0, \$xr1, \$xr2 + 494: 74e78820 xvmod.du \$xr0, \$xr1, \$xr2 + 498: 74e80820 xvsll.b \$xr0, \$xr1, \$xr2 + 49c: 74e88820 xvsll.h \$xr0, \$xr1, \$xr2 + 4a0: 74e90820 xvsll.w \$xr0, \$xr1, \$xr2 + 4a4: 74e98820 xvsll.d \$xr0, \$xr1, \$xr2 + 4a8: 74ea0820 xvsrl.b \$xr0, \$xr1, \$xr2 + 4ac: 74ea8820 xvsrl.h \$xr0, \$xr1, \$xr2 + 4b0: 74eb0820 xvsrl.w \$xr0, \$xr1, \$xr2 + 4b4: 74eb8820 xvsrl.d \$xr0, \$xr1, \$xr2 + 4b8: 74ec0820 xvsra.b \$xr0, \$xr1, \$xr2 + 4bc: 74ec8820 xvsra.h \$xr0, \$xr1, \$xr2 + 4c0: 74ed0820 xvsra.w \$xr0, \$xr1, \$xr2 + 4c4: 74ed8820 xvsra.d \$xr0, \$xr1, \$xr2 + 4c8: 74ee0820 xvrotr.b \$xr0, \$xr1, \$xr2 + 4cc: 74ee8820 xvrotr.h \$xr0, \$xr1, \$xr2 + 4d0: 74ef0820 xvrotr.w \$xr0, \$xr1, \$xr2 + 4d4: 74ef8820 xvrotr.d \$xr0, \$xr1, \$xr2 + 4d8: 74f00820 xvsrlr.b \$xr0, \$xr1, \$xr2 + 4dc: 74f08820 xvsrlr.h \$xr0, \$xr1, \$xr2 + 4e0: 74f10820 xvsrlr.w \$xr0, \$xr1, \$xr2 + 4e4: 74f18820 xvsrlr.d \$xr0, \$xr1, \$xr2 + 4e8: 74f20820 xvsrar.b \$xr0, \$xr1, \$xr2 + 4ec: 74f28820 xvsrar.h \$xr0, \$xr1, \$xr2 + 4f0: 74f30820 xvsrar.w \$xr0, \$xr1, \$xr2 + 4f4: 74f38820 xvsrar.d \$xr0, \$xr1, \$xr2 + 4f8: 74f48820 xvsrln.b.h \$xr0, \$xr1, \$xr2 + 4fc: 74f50820 xvsrln.h.w \$xr0, \$xr1, \$xr2 + 500: 74f58820 xvsrln.w.d \$xr0, \$xr1, \$xr2 + 504: 74f68820 xvsran.b.h \$xr0, \$xr1, \$xr2 + 508: 74f70820 xvsran.h.w \$xr0, \$xr1, \$xr2 + 50c: 74f78820 xvsran.w.d \$xr0, \$xr1, \$xr2 + 510: 74f88820 xvsrlrn.b.h \$xr0, \$xr1, \$xr2 + 514: 74f90820 xvsrlrn.h.w \$xr0, \$xr1, \$xr2 + 518: 74f98820 xvsrlrn.w.d \$xr0, \$xr1, \$xr2 + 51c: 74fa8820 xvsrarn.b.h \$xr0, \$xr1, \$xr2 + 520: 74fb0820 xvsrarn.h.w \$xr0, \$xr1, \$xr2 + 524: 74fb8820 xvsrarn.w.d \$xr0, \$xr1, \$xr2 + 528: 74fc8820 xvssrln.b.h \$xr0, \$xr1, \$xr2 + 52c: 74fd0820 xvssrln.h.w \$xr0, \$xr1, \$xr2 + 530: 74fd8820 xvssrln.w.d \$xr0, \$xr1, \$xr2 + 534: 74fe8820 xvssran.b.h \$xr0, \$xr1, \$xr2 + 538: 74ff0820 xvssran.h.w \$xr0, \$xr1, \$xr2 + 53c: 74ff8820 xvssran.w.d \$xr0, \$xr1, \$xr2 + 540: 75008820 xvssrlrn.b.h \$xr0, \$xr1, \$xr2 + 544: 75010820 xvssrlrn.h.w \$xr0, \$xr1, \$xr2 + 548: 75018820 xvssrlrn.w.d \$xr0, \$xr1, \$xr2 + 54c: 75028820 xvssrarn.b.h \$xr0, \$xr1, \$xr2 + 550: 75030820 xvssrarn.h.w \$xr0, \$xr1, \$xr2 + 554: 75038820 xvssrarn.w.d \$xr0, \$xr1, \$xr2 + 558: 75048820 xvssrln.bu.h \$xr0, \$xr1, \$xr2 + 55c: 75050820 xvssrln.hu.w \$xr0, \$xr1, \$xr2 + 560: 75058820 xvssrln.wu.d \$xr0, \$xr1, \$xr2 + 564: 75068820 xvssran.bu.h \$xr0, \$xr1, \$xr2 + 568: 75070820 xvssran.hu.w \$xr0, \$xr1, \$xr2 + 56c: 75078820 xvssran.wu.d \$xr0, \$xr1, \$xr2 + 570: 75088820 xvssrlrn.bu.h \$xr0, \$xr1, \$xr2 + 574: 75090820 xvssrlrn.hu.w \$xr0, \$xr1, \$xr2 + 578: 75098820 xvssrlrn.wu.d \$xr0, \$xr1, \$xr2 + 57c: 750a8820 xvssrarn.bu.h \$xr0, \$xr1, \$xr2 + 580: 750b0820 xvssrarn.hu.w \$xr0, \$xr1, \$xr2 + 584: 750b8820 xvssrarn.wu.d \$xr0, \$xr1, \$xr2 + 588: 750c0820 xvbitclr.b \$xr0, \$xr1, \$xr2 + 58c: 750c8820 xvbitclr.h \$xr0, \$xr1, \$xr2 + 590: 750d0820 xvbitclr.w \$xr0, \$xr1, \$xr2 + 594: 750d8820 xvbitclr.d \$xr0, \$xr1, \$xr2 + 598: 750e0820 xvbitset.b \$xr0, \$xr1, \$xr2 + 59c: 750e8820 xvbitset.h \$xr0, \$xr1, \$xr2 + 5a0: 750f0820 xvbitset.w \$xr0, \$xr1, \$xr2 + 5a4: 750f8820 xvbitset.d \$xr0, \$xr1, \$xr2 + 5a8: 75100820 xvbitrev.b \$xr0, \$xr1, \$xr2 + 5ac: 75108820 xvbitrev.h \$xr0, \$xr1, \$xr2 + 5b0: 75110820 xvbitrev.w \$xr0, \$xr1, \$xr2 + 5b4: 75118820 xvbitrev.d \$xr0, \$xr1, \$xr2 + 5b8: 75160820 xvpackev.b \$xr0, \$xr1, \$xr2 + 5bc: 75168820 xvpackev.h \$xr0, \$xr1, \$xr2 + 5c0: 75170820 xvpackev.w \$xr0, \$xr1, \$xr2 + 5c4: 75178820 xvpackev.d \$xr0, \$xr1, \$xr2 + 5c8: 75180820 xvpackod.b \$xr0, \$xr1, \$xr2 + 5cc: 75188820 xvpackod.h \$xr0, \$xr1, \$xr2 + 5d0: 75190820 xvpackod.w \$xr0, \$xr1, \$xr2 + 5d4: 75198820 xvpackod.d \$xr0, \$xr1, \$xr2 + 5d8: 751a0820 xvilvl.b \$xr0, \$xr1, \$xr2 + 5dc: 751a8820 xvilvl.h \$xr0, \$xr1, \$xr2 + 5e0: 751b0820 xvilvl.w \$xr0, \$xr1, \$xr2 + 5e4: 751b8820 xvilvl.d \$xr0, \$xr1, \$xr2 + 5e8: 751c0820 xvilvh.b \$xr0, \$xr1, \$xr2 + 5ec: 751c8820 xvilvh.h \$xr0, \$xr1, \$xr2 + 5f0: 751d0820 xvilvh.w \$xr0, \$xr1, \$xr2 + 5f4: 751d8820 xvilvh.d \$xr0, \$xr1, \$xr2 + 5f8: 751e0820 xvpickev.b \$xr0, \$xr1, \$xr2 + 5fc: 751e8820 xvpickev.h \$xr0, \$xr1, \$xr2 + 600: 751f0820 xvpickev.w \$xr0, \$xr1, \$xr2 + 604: 751f8820 xvpickev.d \$xr0, \$xr1, \$xr2 + 608: 75200820 xvpickod.b \$xr0, \$xr1, \$xr2 + 60c: 75208820 xvpickod.h \$xr0, \$xr1, \$xr2 + 610: 75210820 xvpickod.w \$xr0, \$xr1, \$xr2 + 614: 75218820 xvpickod.d \$xr0, \$xr1, \$xr2 + 618: 75220820 xvreplve.b \$xr0, \$xr1, \$tp + 61c: 75228820 xvreplve.h \$xr0, \$xr1, \$tp + 620: 75230820 xvreplve.w \$xr0, \$xr1, \$tp + 624: 75238820 xvreplve.d \$xr0, \$xr1, \$tp + 628: 75260820 xvand.v \$xr0, \$xr1, \$xr2 + 62c: 75268820 xvor.v \$xr0, \$xr1, \$xr2 + 630: 75270820 xvxor.v \$xr0, \$xr1, \$xr2 + 634: 75278820 xvnor.v \$xr0, \$xr1, \$xr2 + 638: 75280820 xvandn.v \$xr0, \$xr1, \$xr2 + 63c: 75288820 xvorn.v \$xr0, \$xr1, \$xr2 + 640: 752b0820 xvfrstp.b \$xr0, \$xr1, \$xr2 + 644: 752b8820 xvfrstp.h \$xr0, \$xr1, \$xr2 + 648: 752d0820 xvadd.q \$xr0, \$xr1, \$xr2 + 64c: 752d8820 xvsub.q \$xr0, \$xr1, \$xr2 + 650: 752e0820 xvsigncov.b \$xr0, \$xr1, \$xr2 + 654: 752e8820 xvsigncov.h \$xr0, \$xr1, \$xr2 + 658: 752f0820 xvsigncov.w \$xr0, \$xr1, \$xr2 + 65c: 752f8820 xvsigncov.d \$xr0, \$xr1, \$xr2 + 660: 75308820 xvfadd.s \$xr0, \$xr1, \$xr2 + 664: 75310820 xvfadd.d \$xr0, \$xr1, \$xr2 + 668: 75328820 xvfsub.s \$xr0, \$xr1, \$xr2 + 66c: 75330820 xvfsub.d \$xr0, \$xr1, \$xr2 + 670: 75388820 xvfmul.s \$xr0, \$xr1, \$xr2 + 674: 75390820 xvfmul.d \$xr0, \$xr1, \$xr2 + 678: 753a8820 xvfdiv.s \$xr0, \$xr1, \$xr2 + 67c: 753b0820 xvfdiv.d \$xr0, \$xr1, \$xr2 + 680: 753c8820 xvfmax.s \$xr0, \$xr1, \$xr2 + 684: 753d0820 xvfmax.d \$xr0, \$xr1, \$xr2 + 688: 753e8820 xvfmin.s \$xr0, \$xr1, \$xr2 + 68c: 753f0820 xvfmin.d \$xr0, \$xr1, \$xr2 + 690: 75408820 xvfmaxa.s \$xr0, \$xr1, \$xr2 + 694: 75410820 xvfmaxa.d \$xr0, \$xr1, \$xr2 + 698: 75428820 xvfmina.s \$xr0, \$xr1, \$xr2 + 69c: 75430820 xvfmina.d \$xr0, \$xr1, \$xr2 + 6a0: 75460820 xvfcvt.h.s \$xr0, \$xr1, \$xr2 + 6a4: 75468820 xvfcvt.s.d \$xr0, \$xr1, \$xr2 + 6a8: 75480820 xvffint.s.l \$xr0, \$xr1, \$xr2 + 6ac: 75498820 xvftint.w.d \$xr0, \$xr1, \$xr2 + 6b0: 754a0820 xvftintrm.w.d \$xr0, \$xr1, \$xr2 + 6b4: 754a8820 xvftintrp.w.d \$xr0, \$xr1, \$xr2 + 6b8: 754b0820 xvftintrz.w.d \$xr0, \$xr1, \$xr2 + 6bc: 754b8820 xvftintrne.w.d \$xr0, \$xr1, \$xr2 + 6c0: 757a8820 xvshuf.h \$xr0, \$xr1, \$xr2 + 6c4: 757b0820 xvshuf.w \$xr0, \$xr1, \$xr2 + 6c8: 757b8820 xvshuf.d \$xr0, \$xr1, \$xr2 + 6cc: 757d0820 xvperm.w \$xr0, \$xr1, \$xr2 + 6d0: 76800420 xvseqi.b \$xr0, \$xr1, 1 + 6d4: 76808420 xvseqi.h \$xr0, \$xr1, 1 + 6d8: 76810420 xvseqi.w \$xr0, \$xr1, 1 + 6dc: 76818420 xvseqi.d \$xr0, \$xr1, 1 + 6e0: 76820420 xvslei.b \$xr0, \$xr1, 1 + 6e4: 76828420 xvslei.h \$xr0, \$xr1, 1 + 6e8: 76830420 xvslei.w \$xr0, \$xr1, 1 + 6ec: 76838420 xvslei.d \$xr0, \$xr1, 1 + 6f0: 76840420 xvslei.bu \$xr0, \$xr1, 0x1 + 6f4: 76848420 xvslei.hu \$xr0, \$xr1, 0x1 + 6f8: 76850420 xvslei.wu \$xr0, \$xr1, 0x1 + 6fc: 76858420 xvslei.du \$xr0, \$xr1, 0x1 + 700: 76860420 xvslti.b \$xr0, \$xr1, 1 + 704: 76868420 xvslti.h \$xr0, \$xr1, 1 + 708: 76870420 xvslti.w \$xr0, \$xr1, 1 + 70c: 76878420 xvslti.d \$xr0, \$xr1, 1 + 710: 76880420 xvslti.bu \$xr0, \$xr1, 0x1 + 714: 76888420 xvslti.hu \$xr0, \$xr1, 0x1 + 718: 76890420 xvslti.wu \$xr0, \$xr1, 0x1 + 71c: 76898420 xvslti.du \$xr0, \$xr1, 0x1 + 720: 768a0420 xvaddi.bu \$xr0, \$xr1, 0x1 + 724: 768a8420 xvaddi.hu \$xr0, \$xr1, 0x1 + 728: 768b0420 xvaddi.wu \$xr0, \$xr1, 0x1 + 72c: 768b8420 xvaddi.du \$xr0, \$xr1, 0x1 + 730: 768c0420 xvsubi.bu \$xr0, \$xr1, 0x1 + 734: 768c8420 xvsubi.hu \$xr0, \$xr1, 0x1 + 738: 768d0420 xvsubi.wu \$xr0, \$xr1, 0x1 + 73c: 768d8420 xvsubi.du \$xr0, \$xr1, 0x1 + 740: 768e0420 xvbsll.v \$xr0, \$xr1, 0x1 + 744: 768e8420 xvbsrl.v \$xr0, \$xr1, 0x1 + 748: 76900420 xvmaxi.b \$xr0, \$xr1, 1 + 74c: 76908420 xvmaxi.h \$xr0, \$xr1, 1 + 750: 76910420 xvmaxi.w \$xr0, \$xr1, 1 + 754: 76918420 xvmaxi.d \$xr0, \$xr1, 1 + 758: 76920420 xvmini.b \$xr0, \$xr1, 1 + 75c: 76928420 xvmini.h \$xr0, \$xr1, 1 + 760: 76930420 xvmini.w \$xr0, \$xr1, 1 + 764: 76938420 xvmini.d \$xr0, \$xr1, 1 + 768: 76940420 xvmaxi.bu \$xr0, \$xr1, 0x1 + 76c: 76948420 xvmaxi.hu \$xr0, \$xr1, 0x1 + 770: 76950420 xvmaxi.wu \$xr0, \$xr1, 0x1 + 774: 76958420 xvmaxi.du \$xr0, \$xr1, 0x1 + 778: 76960420 xvmini.bu \$xr0, \$xr1, 0x1 + 77c: 76968420 xvmini.hu \$xr0, \$xr1, 0x1 + 780: 76970420 xvmini.wu \$xr0, \$xr1, 0x1 + 784: 76978420 xvmini.du \$xr0, \$xr1, 0x1 + 788: 769a0420 xvfrstpi.b \$xr0, \$xr1, 0x1 + 78c: 769a8420 xvfrstpi.h \$xr0, \$xr1, 0x1 + 790: 769c0020 xvclo.b \$xr0, \$xr1 + 794: 769c0420 xvclo.h \$xr0, \$xr1 + 798: 769c0820 xvclo.w \$xr0, \$xr1 + 79c: 769c0c20 xvclo.d \$xr0, \$xr1 + 7a0: 769c1020 xvclz.b \$xr0, \$xr1 + 7a4: 769c1420 xvclz.h \$xr0, \$xr1 + 7a8: 769c1820 xvclz.w \$xr0, \$xr1 + 7ac: 769c1c20 xvclz.d \$xr0, \$xr1 + 7b0: 769c2020 xvpcnt.b \$xr0, \$xr1 + 7b4: 769c2420 xvpcnt.h \$xr0, \$xr1 + 7b8: 769c2820 xvpcnt.w \$xr0, \$xr1 + 7bc: 769c2c20 xvpcnt.d \$xr0, \$xr1 + 7c0: 769c3020 xvneg.b \$xr0, \$xr1 + 7c4: 769c3420 xvneg.h \$xr0, \$xr1 + 7c8: 769c3820 xvneg.w \$xr0, \$xr1 + 7cc: 769c3c20 xvneg.d \$xr0, \$xr1 + 7d0: 769c4020 xvmskltz.b \$xr0, \$xr1 + 7d4: 769c4420 xvmskltz.h \$xr0, \$xr1 + 7d8: 769c4820 xvmskltz.w \$xr0, \$xr1 + 7dc: 769c4c20 xvmskltz.d \$xr0, \$xr1 + 7e0: 769c5020 xvmskgez.b \$xr0, \$xr1 + 7e4: 769c6020 xvmsknz.b \$xr0, \$xr1 + 7e8: 769c9820 xvseteqz.v \$fcc0, \$xr1 + 7ec: 769c9c20 xvsetnez.v \$fcc0, \$xr1 + 7f0: 769ca020 xvsetanyeqz.b \$fcc0, \$xr1 + 7f4: 769ca420 xvsetanyeqz.h \$fcc0, \$xr1 + 7f8: 769ca820 xvsetanyeqz.w \$fcc0, \$xr1 + 7fc: 769cac20 xvsetanyeqz.d \$fcc0, \$xr1 + 800: 769cb020 xvsetallnez.b \$fcc0, \$xr1 + 804: 769cb420 xvsetallnez.h \$fcc0, \$xr1 + 808: 769cb820 xvsetallnez.w \$fcc0, \$xr1 + 80c: 769cbc20 xvsetallnez.d \$fcc0, \$xr1 + 810: 769cc420 xvflogb.s \$xr0, \$xr1 + 814: 769cc820 xvflogb.d \$xr0, \$xr1 + 818: 769cd420 xvfclass.s \$xr0, \$xr1 + 81c: 769cd820 xvfclass.d \$xr0, \$xr1 + 820: 769ce420 xvfsqrt.s \$xr0, \$xr1 + 824: 769ce820 xvfsqrt.d \$xr0, \$xr1 + 828: 769cf420 xvfrecip.s \$xr0, \$xr1 + 82c: 769cf820 xvfrecip.d \$xr0, \$xr1 + 830: 769d0420 xvfrsqrt.s \$xr0, \$xr1 + 834: 769d0820 xvfrsqrt.d \$xr0, \$xr1 + 838: 769d3420 xvfrint.s \$xr0, \$xr1 + 83c: 769d3820 xvfrint.d \$xr0, \$xr1 + 840: 769d4420 xvfrintrm.s \$xr0, \$xr1 + 844: 769d4820 xvfrintrm.d \$xr0, \$xr1 + 848: 769d5420 xvfrintrp.s \$xr0, \$xr1 + 84c: 769d5820 xvfrintrp.d \$xr0, \$xr1 + 850: 769d6420 xvfrintrz.s \$xr0, \$xr1 + 854: 769d6820 xvfrintrz.d \$xr0, \$xr1 + 858: 769d7420 xvfrintrne.s \$xr0, \$xr1 + 85c: 769d7820 xvfrintrne.d \$xr0, \$xr1 + 860: 769de820 xvfcvtl.s.h \$xr0, \$xr1 + 864: 769dec20 xvfcvth.s.h \$xr0, \$xr1 + 868: 769df020 xvfcvtl.d.s \$xr0, \$xr1 + 86c: 769df420 xvfcvth.d.s \$xr0, \$xr1 + 870: 769e0020 xvffint.s.w \$xr0, \$xr1 + 874: 769e0420 xvffint.s.wu \$xr0, \$xr1 + 878: 769e0820 xvffint.d.l \$xr0, \$xr1 + 87c: 769e0c20 xvffint.d.lu \$xr0, \$xr1 + 880: 769e1020 xvffintl.d.w \$xr0, \$xr1 + 884: 769e1420 xvffinth.d.w \$xr0, \$xr1 + 888: 769e3020 xvftint.w.s \$xr0, \$xr1 + 88c: 769e3420 xvftint.l.d \$xr0, \$xr1 + 890: 769e3820 xvftintrm.w.s \$xr0, \$xr1 + 894: 769e3c20 xvftintrm.l.d \$xr0, \$xr1 + 898: 769e4020 xvftintrp.w.s \$xr0, \$xr1 + 89c: 769e4420 xvftintrp.l.d \$xr0, \$xr1 + 8a0: 769e4820 xvftintrz.w.s \$xr0, \$xr1 + 8a4: 769e4c20 xvftintrz.l.d \$xr0, \$xr1 + 8a8: 769e5020 xvftintrne.w.s \$xr0, \$xr1 + 8ac: 769e5420 xvftintrne.l.d \$xr0, \$xr1 + 8b0: 769e5820 xvftint.wu.s \$xr0, \$xr1 + 8b4: 769e5c20 xvftint.lu.d \$xr0, \$xr1 + 8b8: 769e7020 xvftintrz.wu.s \$xr0, \$xr1 + 8bc: 769e7420 xvftintrz.lu.d \$xr0, \$xr1 + 8c0: 769e8020 xvftintl.l.s \$xr0, \$xr1 + 8c4: 769e8420 xvftinth.l.s \$xr0, \$xr1 + 8c8: 769e8820 xvftintrml.l.s \$xr0, \$xr1 + 8cc: 769e8c20 xvftintrmh.l.s \$xr0, \$xr1 + 8d0: 769e9020 xvftintrpl.l.s \$xr0, \$xr1 + 8d4: 769e9420 xvftintrph.l.s \$xr0, \$xr1 + 8d8: 769e9820 xvftintrzl.l.s \$xr0, \$xr1 + 8dc: 769e9c20 xvftintrzh.l.s \$xr0, \$xr1 + 8e0: 769ea020 xvftintrnel.l.s \$xr0, \$xr1 + 8e4: 769ea420 xvftintrneh.l.s \$xr0, \$xr1 + 8e8: 769ee020 xvexth.h.b \$xr0, \$xr1 + 8ec: 769ee420 xvexth.w.h \$xr0, \$xr1 + 8f0: 769ee820 xvexth.d.w \$xr0, \$xr1 + 8f4: 769eec20 xvexth.q.d \$xr0, \$xr1 + 8f8: 769ef020 xvexth.hu.bu \$xr0, \$xr1 + 8fc: 769ef420 xvexth.wu.hu \$xr0, \$xr1 + 900: 769ef820 xvexth.du.wu \$xr0, \$xr1 + 904: 769efc20 xvexth.qu.du \$xr0, \$xr1 + 908: 769f0020 xvreplgr2vr.b \$xr0, \$ra + 90c: 769f0420 xvreplgr2vr.h \$xr0, \$ra + 910: 769f0820 xvreplgr2vr.w \$xr0, \$ra + 914: 769f0c20 xvreplgr2vr.d \$xr0, \$ra + 918: 769f8420 xvhseli.d \$xr0, \$xr1, 0x1 + 91c: 76a02420 xvrotri.b \$xr0, \$xr1, 0x1 + 920: 76a04420 xvrotri.h \$xr0, \$xr1, 0x1 + 924: 76a08420 xvrotri.w \$xr0, \$xr1, 0x1 + 928: 76a10420 xvrotri.d \$xr0, \$xr1, 0x1 + 92c: 76a42420 xvsrlri.b \$xr0, \$xr1, 0x1 + 930: 76a44420 xvsrlri.h \$xr0, \$xr1, 0x1 + 934: 76a48420 xvsrlri.w \$xr0, \$xr1, 0x1 + 938: 76a50420 xvsrlri.d \$xr0, \$xr1, 0x1 + 93c: 76a82420 xvsrari.b \$xr0, \$xr1, 0x1 + 940: 76a84420 xvsrari.h \$xr0, \$xr1, 0x1 + 944: 76a88420 xvsrari.w \$xr0, \$xr1, 0x1 + 948: 76a90420 xvsrari.d \$xr0, \$xr1, 0x1 + 94c: 76ebc420 xvinsgr2vr.w \$xr0, \$ra, 0x1 + 950: 76ebe420 xvinsgr2vr.d \$xr0, \$ra, 0x1 + 954: 76efc420 xvpickve2gr.w \$zero, \$xr1, 0x1 + 958: 76efe420 xvpickve2gr.d \$zero, \$xr1, 0x1 + 95c: 76f3c420 xvpickve2gr.wu \$zero, \$xr1, 0x1 + 960: 76f3e420 xvpickve2gr.du \$zero, \$xr1, 0x1 + 964: 76f78420 xvrepl128vei.b \$xr0, \$xr1, 0x1 + 968: 76f7c420 xvrepl128vei.h \$xr0, \$xr1, 0x1 + 96c: 76f7e420 xvrepl128vei.w \$xr0, \$xr1, 0x1 + 970: 76f7f420 xvrepl128vei.d \$xr0, \$xr1, 0x1 + 974: 76ffc420 xvinsve0.w \$xr0, \$xr1, 0x1 + 978: 76ffe420 xvinsve0.d \$xr0, \$xr1, 0x1 + 97c: 7703c420 xvpickve.w \$xr0, \$xr1, 0x1 + 980: 7703e420 xvpickve.d \$xr0, \$xr1, 0x1 + 984: 77070020 xvreplve0.b \$xr0, \$xr1 + 988: 77078020 xvreplve0.h \$xr0, \$xr1 + 98c: 7707c020 xvreplve0.w \$xr0, \$xr1 + 990: 7707e020 xvreplve0.d \$xr0, \$xr1 + 994: 7707f020 xvreplve0.q \$xr0, \$xr1 + 998: 77082420 xvsllwil.h.b \$xr0, \$xr1, 0x1 + 99c: 77084420 xvsllwil.w.h \$xr0, \$xr1, 0x1 + 9a0: 77088420 xvsllwil.d.w \$xr0, \$xr1, 0x1 + 9a4: 77090020 xvextl.q.d \$xr0, \$xr1 + 9a8: 770c2420 xvsllwil.hu.bu \$xr0, \$xr1, 0x1 + 9ac: 770c4420 xvsllwil.wu.hu \$xr0, \$xr1, 0x1 + 9b0: 770c8420 xvsllwil.du.wu \$xr0, \$xr1, 0x1 + 9b4: 770d0020 xvextl.qu.du \$xr0, \$xr1 + 9b8: 77102420 xvbitclri.b \$xr0, \$xr1, 0x1 + 9bc: 77104420 xvbitclri.h \$xr0, \$xr1, 0x1 + 9c0: 77108420 xvbitclri.w \$xr0, \$xr1, 0x1 + 9c4: 77110420 xvbitclri.d \$xr0, \$xr1, 0x1 + 9c8: 77142420 xvbitseti.b \$xr0, \$xr1, 0x1 + 9cc: 77144420 xvbitseti.h \$xr0, \$xr1, 0x1 + 9d0: 77148420 xvbitseti.w \$xr0, \$xr1, 0x1 + 9d4: 77150420 xvbitseti.d \$xr0, \$xr1, 0x1 + 9d8: 77182420 xvbitrevi.b \$xr0, \$xr1, 0x1 + 9dc: 77184420 xvbitrevi.h \$xr0, \$xr1, 0x1 + 9e0: 77188420 xvbitrevi.w \$xr0, \$xr1, 0x1 + 9e4: 77190420 xvbitrevi.d \$xr0, \$xr1, 0x1 + 9e8: 77242420 xvsat.b \$xr0, \$xr1, 0x1 + 9ec: 77244420 xvsat.h \$xr0, \$xr1, 0x1 + 9f0: 77248420 xvsat.w \$xr0, \$xr1, 0x1 + 9f4: 77250420 xvsat.d \$xr0, \$xr1, 0x1 + 9f8: 77282420 xvsat.bu \$xr0, \$xr1, 0x1 + 9fc: 77284420 xvsat.hu \$xr0, \$xr1, 0x1 + a00: 77288420 xvsat.wu \$xr0, \$xr1, 0x1 + a04: 77290420 xvsat.du \$xr0, \$xr1, 0x1 + a08: 772c2420 xvslli.b \$xr0, \$xr1, 0x1 + a0c: 772c4420 xvslli.h \$xr0, \$xr1, 0x1 + a10: 772c8420 xvslli.w \$xr0, \$xr1, 0x1 + a14: 772d0420 xvslli.d \$xr0, \$xr1, 0x1 + a18: 77302420 xvsrli.b \$xr0, \$xr1, 0x1 + a1c: 77304420 xvsrli.h \$xr0, \$xr1, 0x1 + a20: 77308420 xvsrli.w \$xr0, \$xr1, 0x1 + a24: 77310420 xvsrli.d \$xr0, \$xr1, 0x1 + a28: 77342420 xvsrai.b \$xr0, \$xr1, 0x1 + a2c: 77344420 xvsrai.h \$xr0, \$xr1, 0x1 + a30: 77348420 xvsrai.w \$xr0, \$xr1, 0x1 + a34: 77350420 xvsrai.d \$xr0, \$xr1, 0x1 + a38: 77404420 xvsrlni.b.h \$xr0, \$xr1, 0x1 + a3c: 77408420 xvsrlni.h.w \$xr0, \$xr1, 0x1 + a40: 77410420 xvsrlni.w.d \$xr0, \$xr1, 0x1 + a44: 77420420 xvsrlni.d.q \$xr0, \$xr1, 0x1 + a48: 77444420 xvsrlrni.b.h \$xr0, \$xr1, 0x1 + a4c: 77448420 xvsrlrni.h.w \$xr0, \$xr1, 0x1 + a50: 77450420 xvsrlrni.w.d \$xr0, \$xr1, 0x1 + a54: 77460420 xvsrlrni.d.q \$xr0, \$xr1, 0x1 + a58: 77484420 xvssrlni.b.h \$xr0, \$xr1, 0x1 + a5c: 77488420 xvssrlni.h.w \$xr0, \$xr1, 0x1 + a60: 77490420 xvssrlni.w.d \$xr0, \$xr1, 0x1 + a64: 774a0420 xvssrlni.d.q \$xr0, \$xr1, 0x1 + a68: 774c4420 xvssrlni.bu.h \$xr0, \$xr1, 0x1 + a6c: 774c8420 xvssrlni.hu.w \$xr0, \$xr1, 0x1 + a70: 774d0420 xvssrlni.wu.d \$xr0, \$xr1, 0x1 + a74: 774e0420 xvssrlni.du.q \$xr0, \$xr1, 0x1 + a78: 77504420 xvssrlrni.b.h \$xr0, \$xr1, 0x1 + a7c: 77508420 xvssrlrni.h.w \$xr0, \$xr1, 0x1 + a80: 77510420 xvssrlrni.w.d \$xr0, \$xr1, 0x1 + a84: 77520420 xvssrlrni.d.q \$xr0, \$xr1, 0x1 + a88: 77544420 xvssrlrni.bu.h \$xr0, \$xr1, 0x1 + a8c: 77548420 xvssrlrni.hu.w \$xr0, \$xr1, 0x1 + a90: 77550420 xvssrlrni.wu.d \$xr0, \$xr1, 0x1 + a94: 77560420 xvssrlrni.du.q \$xr0, \$xr1, 0x1 + a98: 77584420 xvsrani.b.h \$xr0, \$xr1, 0x1 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$xr1, 1 +xvextrins.b $xr0, $xr1, 1 +xvshuf4i.b $xr0, $xr1, 1 +xvshuf4i.h $xr0, $xr1, 1 +xvshuf4i.w $xr0, $xr1, 1 +xvshuf4i.d $xr0, $xr1, 1 +xvbitseli.b $xr0, $xr1, 1 +xvandi.b $xr0, $xr1, 1 +xvori.b $xr0, $xr1, 1 +xvxori.b $xr0, $xr1, 1 +xvnori.b $xr0, $xr1, 1 +xvrepli.b $xr0, 1 +xvrepli.d $xr0, 1 +xvrepli.h $xr0, 1 +xvrepli.w $xr0, 1 +xvldi $xr0, 1 +xvpermi.w $xr0, $xr1, 1 +xvpermi.d $xr0, $xr1, 1 +xvpermi.q $xr0, $xr1, 1 +xvfrecipe.s $xr0, $xr1 +xvfrecipe.d $xr0, $xr1 +xvfrsqrte.s $xr0, $xr1 +xvfrsqrte.d $xr0, $xr1 diff --git a/gas/testsuite/gas/loongarch/insn_lsx.d b/gas/testsuite/gas/loongarch/insn_lsx.d new file mode 100644 index 00000000000..8bf5bb5471e --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_lsx.d @@ -0,0 +1,742 @@ +#as: +#objdump: -d +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 09118820 vfmadd.s \$vr0, \$vr1, \$vr2, \$vr3 + 4: 09518820 vfmsub.s \$vr0, \$vr1, \$vr2, \$vr3 + 8: 09918820 vfnmadd.s \$vr0, \$vr1, \$vr2, \$vr3 + c: 09d18820 vfnmsub.s \$vr0, \$vr1, \$vr2, \$vr3 + 10: 0c500820 vfcmp.caf.s \$vr0, \$vr1, \$vr2 + 14: 0c508820 vfcmp.saf.s \$vr0, \$vr1, \$vr2 + 18: 0c510820 vfcmp.clt.s \$vr0, \$vr1, \$vr2 + 1c: 0c518820 vfcmp.slt.s \$vr0, \$vr1, \$vr2 + 20: 0c520820 vfcmp.ceq.s \$vr0, \$vr1, \$vr2 + 24: 0c528820 vfcmp.seq.s \$vr0, \$vr1, \$vr2 + 28: 0c530820 vfcmp.cle.s \$vr0, \$vr1, \$vr2 + 2c: 0c538820 vfcmp.sle.s \$vr0, \$vr1, \$vr2 + 30: 0c540820 vfcmp.cun.s \$vr0, \$vr1, \$vr2 + 34: 0c548820 vfcmp.sun.s \$vr0, \$vr1, \$vr2 + 38: 0c550820 vfcmp.cult.s \$vr0, \$vr1, \$vr2 + 3c: 0c558820 vfcmp.sult.s \$vr0, \$vr1, \$vr2 + 40: 0c560820 vfcmp.cueq.s \$vr0, \$vr1, \$vr2 + 44: 0c568820 vfcmp.sueq.s \$vr0, \$vr1, \$vr2 + 48: 0c570820 vfcmp.cule.s \$vr0, \$vr1, \$vr2 + 4c: 0c578820 vfcmp.sule.s \$vr0, \$vr1, \$vr2 + 50: 0c580820 vfcmp.cne.s \$vr0, \$vr1, \$vr2 + 54: 0c588820 vfcmp.sne.s \$vr0, \$vr1, \$vr2 + 58: 0c5a0820 vfcmp.cor.s \$vr0, \$vr1, \$vr2 + 5c: 0c5a8820 vfcmp.sor.s \$vr0, \$vr1, \$vr2 + 60: 0c5c0820 vfcmp.cune.s \$vr0, \$vr1, \$vr2 + 64: 0c5c8820 vfcmp.sune.s \$vr0, \$vr1, \$vr2 + 68: 0d118820 vbitsel.v \$vr0, \$vr1, \$vr2, \$vr3 + 6c: 0d518820 vshuf.b \$vr0, \$vr1, \$vr2, \$vr3 + 70: 09218820 vfmadd.d \$vr0, \$vr1, \$vr2, \$vr3 + 74: 09618820 vfmsub.d \$vr0, \$vr1, \$vr2, \$vr3 + 78: 09a18820 vfnmadd.d \$vr0, \$vr1, \$vr2, \$vr3 + 7c: 09e18820 vfnmsub.d \$vr0, \$vr1, \$vr2, \$vr3 + 80: 0c600820 vfcmp.caf.d \$vr0, \$vr1, \$vr2 + 84: 0c608820 vfcmp.saf.d \$vr0, \$vr1, \$vr2 + 88: 0c610820 vfcmp.clt.d \$vr0, \$vr1, \$vr2 + 8c: 0c618820 vfcmp.slt.d \$vr0, \$vr1, \$vr2 + 90: 0c620820 vfcmp.ceq.d \$vr0, \$vr1, \$vr2 + 94: 0c628820 vfcmp.seq.d \$vr0, \$vr1, \$vr2 + 98: 0c630820 vfcmp.cle.d \$vr0, \$vr1, \$vr2 + 9c: 0c638820 vfcmp.sle.d \$vr0, \$vr1, \$vr2 + a0: 0c640820 vfcmp.cun.d \$vr0, \$vr1, \$vr2 + a4: 0c648820 vfcmp.sun.d \$vr0, \$vr1, \$vr2 + a8: 0c650820 vfcmp.cult.d \$vr0, \$vr1, \$vr2 + ac: 0c658820 vfcmp.sult.d \$vr0, \$vr1, \$vr2 + b0: 0c660820 vfcmp.cueq.d \$vr0, \$vr1, \$vr2 + b4: 0c668820 vfcmp.sueq.d \$vr0, \$vr1, \$vr2 + b8: 0c670820 vfcmp.cule.d \$vr0, \$vr1, \$vr2 + bc: 0c678820 vfcmp.sule.d \$vr0, \$vr1, \$vr2 + c0: 0c680820 vfcmp.cne.d \$vr0, \$vr1, \$vr2 + c4: 0c688820 vfcmp.sne.d \$vr0, \$vr1, \$vr2 + c8: 0c6a0820 vfcmp.cor.d \$vr0, \$vr1, \$vr2 + cc: 0c6a8820 vfcmp.sor.d \$vr0, \$vr1, \$vr2 + d0: 0c6c0820 vfcmp.cune.d \$vr0, \$vr1, \$vr2 + d4: 0c6c8820 vfcmp.sune.d \$vr0, \$vr1, \$vr2 + d8: 2c000420 vld \$vr0, \$ra, 1 + dc: 2c400420 vst \$vr0, \$ra, 1 + e0: 38400820 vldx \$vr0, \$ra, \$tp + e4: 38440820 vstx \$vr0, \$ra, \$tp + e8: 3011f420 vldrepl.d \$vr0, \$ra, 1000 + ec: 30206420 vldrepl.w \$vr0, \$ra, 100 + f0: 30401420 vldrepl.h \$vr0, \$ra, 10 + f4: 30800420 vldrepl.b \$vr0, \$ra, 1 + f8: 3115f420 vstelm.d \$vr0, \$ra, 1000, 0x1 + fc: 31246420 vstelm.w \$vr0, \$ra, 100, 0x1 + 100: 31441420 vstelm.h \$vr0, \$ra, 10, 0x1 + 104: 31840420 vstelm.b \$vr0, \$ra, 1, 0x1 + 108: 70000820 vseq.b \$vr0, \$vr1, \$vr2 + 10c: 70008820 vseq.h \$vr0, \$vr1, \$vr2 + 110: 70010820 vseq.w \$vr0, \$vr1, \$vr2 + 114: 70018820 vseq.d \$vr0, \$vr1, \$vr2 + 118: 70020820 vsle.b \$vr0, \$vr1, \$vr2 + 11c: 70028820 vsle.h \$vr0, \$vr1, \$vr2 + 120: 70030820 vsle.w \$vr0, \$vr1, \$vr2 + 124: 70038820 vsle.d \$vr0, \$vr1, \$vr2 + 128: 70040820 vsle.bu \$vr0, \$vr1, \$vr2 + 12c: 70048820 vsle.hu \$vr0, \$vr1, \$vr2 + 130: 70050820 vsle.wu \$vr0, \$vr1, \$vr2 + 134: 70058820 vsle.du \$vr0, \$vr1, \$vr2 + 138: 70060820 vslt.b \$vr0, \$vr1, \$vr2 + 13c: 70068820 vslt.h \$vr0, \$vr1, \$vr2 + 140: 70070820 vslt.w \$vr0, \$vr1, \$vr2 + 144: 70078820 vslt.d \$vr0, \$vr1, \$vr2 + 148: 70080820 vslt.bu \$vr0, \$vr1, \$vr2 + 14c: 70088820 vslt.hu \$vr0, \$vr1, \$vr2 + 150: 70090820 vslt.wu \$vr0, \$vr1, \$vr2 + 154: 70098820 vslt.du \$vr0, \$vr1, \$vr2 + 158: 700a0820 vadd.b \$vr0, \$vr1, \$vr2 + 15c: 700a8820 vadd.h \$vr0, \$vr1, \$vr2 + 160: 700b0820 vadd.w \$vr0, \$vr1, \$vr2 + 164: 700b8820 vadd.d \$vr0, \$vr1, \$vr2 + 168: 700c0820 vsub.b \$vr0, \$vr1, \$vr2 + 16c: 700c8820 vsub.h \$vr0, \$vr1, \$vr2 + 170: 700d0820 vsub.w \$vr0, \$vr1, \$vr2 + 174: 700d8820 vsub.d \$vr0, \$vr1, \$vr2 + 178: 70460820 vsadd.b \$vr0, \$vr1, \$vr2 + 17c: 70468820 vsadd.h \$vr0, \$vr1, \$vr2 + 180: 70470820 vsadd.w \$vr0, \$vr1, \$vr2 + 184: 70478820 vsadd.d \$vr0, \$vr1, \$vr2 + 188: 70480820 vssub.b \$vr0, \$vr1, \$vr2 + 18c: 70488820 vssub.h \$vr0, \$vr1, \$vr2 + 190: 70490820 vssub.w \$vr0, \$vr1, \$vr2 + 194: 70498820 vssub.d \$vr0, \$vr1, \$vr2 + 198: 704a0820 vsadd.bu \$vr0, \$vr1, \$vr2 + 19c: 704a8820 vsadd.hu \$vr0, \$vr1, \$vr2 + 1a0: 704b0820 vsadd.wu \$vr0, \$vr1, \$vr2 + 1a4: 704b8820 vsadd.du \$vr0, \$vr1, \$vr2 + 1a8: 704c0820 vssub.bu \$vr0, \$vr1, \$vr2 + 1ac: 704c8820 vssub.hu \$vr0, \$vr1, \$vr2 + 1b0: 704d0820 vssub.wu \$vr0, \$vr1, \$vr2 + 1b4: 704d8820 vssub.du \$vr0, \$vr1, \$vr2 + 1b8: 70540820 vhaddw.h.b \$vr0, \$vr1, \$vr2 + 1bc: 70548820 vhaddw.w.h \$vr0, \$vr1, \$vr2 + 1c0: 70550820 vhaddw.d.w \$vr0, \$vr1, \$vr2 + 1c4: 70558820 vhaddw.q.d \$vr0, \$vr1, \$vr2 + 1c8: 70560820 vhsubw.h.b \$vr0, \$vr1, \$vr2 + 1cc: 70568820 vhsubw.w.h \$vr0, \$vr1, \$vr2 + 1d0: 70570820 vhsubw.d.w \$vr0, \$vr1, \$vr2 + 1d4: 70578820 vhsubw.q.d \$vr0, \$vr1, \$vr2 + 1d8: 70580820 vhaddw.hu.bu \$vr0, \$vr1, \$vr2 + 1dc: 70588820 vhaddw.wu.hu \$vr0, \$vr1, \$vr2 + 1e0: 70590820 vhaddw.du.wu \$vr0, \$vr1, \$vr2 + 1e4: 70598820 vhaddw.qu.du \$vr0, \$vr1, \$vr2 + 1e8: 705a0820 vhsubw.hu.bu \$vr0, \$vr1, \$vr2 + 1ec: 705a8820 vhsubw.wu.hu \$vr0, \$vr1, \$vr2 + 1f0: 705b0820 vhsubw.du.wu \$vr0, \$vr1, \$vr2 + 1f4: 705b8820 vhsubw.qu.du \$vr0, \$vr1, \$vr2 + 1f8: 705c0820 vadda.b \$vr0, \$vr1, \$vr2 + 1fc: 705c8820 vadda.h \$vr0, \$vr1, \$vr2 + 200: 705d0820 vadda.w \$vr0, \$vr1, \$vr2 + 204: 705d8820 vadda.d \$vr0, \$vr1, \$vr2 + 208: 70600820 vabsd.b \$vr0, \$vr1, \$vr2 + 20c: 70608820 vabsd.h \$vr0, \$vr1, \$vr2 + 210: 70610820 vabsd.w \$vr0, \$vr1, \$vr2 + 214: 70618820 vabsd.d \$vr0, \$vr1, \$vr2 + 218: 70620820 vabsd.bu \$vr0, \$vr1, \$vr2 + 21c: 70628820 vabsd.hu \$vr0, \$vr1, \$vr2 + 220: 70630820 vabsd.wu \$vr0, \$vr1, \$vr2 + 224: 70638820 vabsd.du \$vr0, \$vr1, \$vr2 + 228: 70640820 vavg.b \$vr0, \$vr1, \$vr2 + 22c: 70648820 vavg.h \$vr0, \$vr1, \$vr2 + 230: 70650820 vavg.w \$vr0, \$vr1, \$vr2 + 234: 70658820 vavg.d \$vr0, \$vr1, \$vr2 + 238: 70660820 vavg.bu \$vr0, \$vr1, \$vr2 + 23c: 70668820 vavg.hu \$vr0, \$vr1, \$vr2 + 240: 70670820 vavg.wu \$vr0, \$vr1, \$vr2 + 244: 70678820 vavg.du \$vr0, \$vr1, \$vr2 + 248: 70680820 vavgr.b \$vr0, \$vr1, \$vr2 + 24c: 70688820 vavgr.h \$vr0, \$vr1, \$vr2 + 250: 70690820 vavgr.w \$vr0, \$vr1, \$vr2 + 254: 70698820 vavgr.d \$vr0, \$vr1, \$vr2 + 258: 706a0820 vavgr.bu \$vr0, \$vr1, \$vr2 + 25c: 706a8820 vavgr.hu \$vr0, \$vr1, \$vr2 + 260: 706b0820 vavgr.wu \$vr0, \$vr1, \$vr2 + 264: 706b8820 vavgr.du \$vr0, \$vr1, \$vr2 + 268: 70700820 vmax.b \$vr0, \$vr1, \$vr2 + 26c: 70708820 vmax.h \$vr0, \$vr1, \$vr2 + 270: 70710820 vmax.w \$vr0, \$vr1, \$vr2 + 274: 70718820 vmax.d \$vr0, \$vr1, \$vr2 + 278: 70720820 vmin.b \$vr0, \$vr1, \$vr2 + 27c: 70728820 vmin.h \$vr0, \$vr1, \$vr2 + 280: 70730820 vmin.w \$vr0, \$vr1, \$vr2 + 284: 70738820 vmin.d \$vr0, \$vr1, \$vr2 + 288: 70740820 vmax.bu \$vr0, \$vr1, \$vr2 + 28c: 70748820 vmax.hu \$vr0, \$vr1, \$vr2 + 290: 70750820 vmax.wu \$vr0, \$vr1, \$vr2 + 294: 70758820 vmax.du \$vr0, \$vr1, \$vr2 + 298: 70760820 vmin.bu \$vr0, \$vr1, \$vr2 + 29c: 70768820 vmin.hu \$vr0, \$vr1, \$vr2 + 2a0: 70770820 vmin.wu \$vr0, \$vr1, \$vr2 + 2a4: 70778820 vmin.du \$vr0, \$vr1, \$vr2 + 2a8: 70840820 vmul.b \$vr0, \$vr1, \$vr2 + 2ac: 70848820 vmul.h \$vr0, \$vr1, \$vr2 + 2b0: 70850820 vmul.w \$vr0, \$vr1, \$vr2 + 2b4: 70858820 vmul.d \$vr0, \$vr1, \$vr2 + 2b8: 70860820 vmuh.b \$vr0, \$vr1, \$vr2 + 2bc: 70868820 vmuh.h \$vr0, \$vr1, \$vr2 + 2c0: 70870820 vmuh.w \$vr0, \$vr1, \$vr2 + 2c4: 70878820 vmuh.d \$vr0, \$vr1, \$vr2 + 2c8: 70880820 vmuh.bu \$vr0, \$vr1, \$vr2 + 2cc: 70888820 vmuh.hu \$vr0, \$vr1, \$vr2 + 2d0: 70890820 vmuh.wu \$vr0, \$vr1, \$vr2 + 2d4: 70898820 vmuh.du \$vr0, \$vr1, \$vr2 + 2d8: 70a80820 vmadd.b \$vr0, \$vr1, \$vr2 + 2dc: 70a88820 vmadd.h \$vr0, \$vr1, \$vr2 + 2e0: 70a90820 vmadd.w \$vr0, \$vr1, \$vr2 + 2e4: 70a98820 vmadd.d \$vr0, \$vr1, \$vr2 + 2e8: 70aa0820 vmsub.b \$vr0, \$vr1, \$vr2 + 2ec: 70aa8820 vmsub.h \$vr0, \$vr1, \$vr2 + 2f0: 70ab0820 vmsub.w \$vr0, \$vr1, \$vr2 + 2f4: 70ab8820 vmsub.d \$vr0, \$vr1, \$vr2 + 2f8: 70e00820 vdiv.b \$vr0, \$vr1, \$vr2 + 2fc: 70e08820 vdiv.h \$vr0, \$vr1, \$vr2 + 300: 70e10820 vdiv.w \$vr0, \$vr1, \$vr2 + 304: 70e18820 vdiv.d \$vr0, \$vr1, \$vr2 + 308: 70e20820 vmod.b \$vr0, \$vr1, \$vr2 + 30c: 70e28820 vmod.h \$vr0, \$vr1, \$vr2 + 310: 70e30820 vmod.w \$vr0, \$vr1, \$vr2 + 314: 70e38820 vmod.d \$vr0, \$vr1, \$vr2 + 318: 70e40820 vdiv.bu \$vr0, \$vr1, \$vr2 + 31c: 70e48820 vdiv.hu \$vr0, \$vr1, \$vr2 + 320: 70e50820 vdiv.wu \$vr0, \$vr1, \$vr2 + 324: 70e58820 vdiv.du \$vr0, \$vr1, \$vr2 + 328: 70e60820 vmod.bu \$vr0, \$vr1, \$vr2 + 32c: 70e68820 vmod.hu \$vr0, \$vr1, \$vr2 + 330: 70e70820 vmod.wu \$vr0, \$vr1, \$vr2 + 334: 70e78820 vmod.du \$vr0, \$vr1, \$vr2 + 338: 70e80820 vsll.b \$vr0, \$vr1, \$vr2 + 33c: 70e88820 vsll.h \$vr0, \$vr1, \$vr2 + 340: 70e90820 vsll.w \$vr0, \$vr1, \$vr2 + 344: 70e98820 vsll.d \$vr0, \$vr1, \$vr2 + 348: 70ea0820 vsrl.b \$vr0, \$vr1, \$vr2 + 34c: 70ea8820 vsrl.h \$vr0, \$vr1, \$vr2 + 350: 70eb0820 vsrl.w \$vr0, \$vr1, \$vr2 + 354: 70eb8820 vsrl.d \$vr0, \$vr1, \$vr2 + 358: 70ec0820 vsra.b \$vr0, \$vr1, \$vr2 + 35c: 70ec8820 vsra.h \$vr0, \$vr1, \$vr2 + 360: 70ed0820 vsra.w \$vr0, \$vr1, \$vr2 + 364: 70ed8820 vsra.d \$vr0, \$vr1, \$vr2 + 368: 70ee0820 vrotr.b \$vr0, \$vr1, \$vr2 + 36c: 70ee8820 vrotr.h \$vr0, \$vr1, \$vr2 + 370: 70ef0820 vrotr.w \$vr0, \$vr1, \$vr2 + 374: 70ef8820 vrotr.d \$vr0, \$vr1, \$vr2 + 378: 70f00820 vsrlr.b \$vr0, \$vr1, \$vr2 + 37c: 70f08820 vsrlr.h \$vr0, \$vr1, \$vr2 + 380: 70f10820 vsrlr.w \$vr0, \$vr1, \$vr2 + 384: 70f18820 vsrlr.d \$vr0, \$vr1, \$vr2 + 388: 70f20820 vsrar.b \$vr0, \$vr1, \$vr2 + 38c: 70f28820 vsrar.h \$vr0, \$vr1, \$vr2 + 390: 70f30820 vsrar.w \$vr0, \$vr1, \$vr2 + 394: 70f38820 vsrar.d \$vr0, \$vr1, \$vr2 + 398: 70f48820 vsrln.b.h \$vr0, \$vr1, \$vr2 + 39c: 70f50820 vsrln.h.w \$vr0, \$vr1, \$vr2 + 3a0: 70f58820 vsrln.w.d \$vr0, \$vr1, \$vr2 + 3a4: 70f68820 vsran.b.h \$vr0, \$vr1, \$vr2 + 3a8: 70f70820 vsran.h.w \$vr0, \$vr1, \$vr2 + 3ac: 70f78820 vsran.w.d \$vr0, \$vr1, \$vr2 + 3b0: 70f88820 vsrlrn.b.h \$vr0, \$vr1, \$vr2 + 3b4: 70f90820 vsrlrn.h.w \$vr0, \$vr1, \$vr2 + 3b8: 70f98820 vsrlrn.w.d \$vr0, \$vr1, \$vr2 + 3bc: 70fa8820 vsrarn.b.h \$vr0, \$vr1, \$vr2 + 3c0: 70fb0820 vsrarn.h.w \$vr0, \$vr1, \$vr2 + 3c4: 70fb8820 vsrarn.w.d \$vr0, \$vr1, \$vr2 + 3c8: 70fc8820 vssrln.b.h \$vr0, \$vr1, \$vr2 + 3cc: 70fd0820 vssrln.h.w \$vr0, \$vr1, \$vr2 + 3d0: 70fd8820 vssrln.w.d \$vr0, \$vr1, \$vr2 + 3d4: 70fe8820 vssran.b.h \$vr0, \$vr1, \$vr2 + 3d8: 70ff0820 vssran.h.w \$vr0, \$vr1, \$vr2 + 3dc: 70ff8820 vssran.w.d \$vr0, \$vr1, \$vr2 + 3e0: 71008820 vssrlrn.b.h \$vr0, \$vr1, \$vr2 + 3e4: 71010820 vssrlrn.h.w \$vr0, \$vr1, \$vr2 + 3e8: 71018820 vssrlrn.w.d \$vr0, \$vr1, \$vr2 + 3ec: 71028820 vssrarn.b.h \$vr0, \$vr1, \$vr2 + 3f0: 71030820 vssrarn.h.w \$vr0, \$vr1, \$vr2 + 3f4: 71038820 vssrarn.w.d \$vr0, \$vr1, \$vr2 + 3f8: 71048820 vssrln.bu.h \$vr0, \$vr1, \$vr2 + 3fc: 71050820 vssrln.hu.w \$vr0, \$vr1, \$vr2 + 400: 71058820 vssrln.wu.d \$vr0, \$vr1, \$vr2 + 404: 71068820 vssran.bu.h \$vr0, \$vr1, \$vr2 + 408: 71070820 vssran.hu.w \$vr0, \$vr1, \$vr2 + 40c: 71078820 vssran.wu.d \$vr0, \$vr1, \$vr2 + 410: 71088820 vssrlrn.bu.h \$vr0, \$vr1, \$vr2 + 414: 71090820 vssrlrn.hu.w \$vr0, \$vr1, \$vr2 + 418: 71098820 vssrlrn.wu.d \$vr0, \$vr1, \$vr2 + 41c: 710a8820 vssrarn.bu.h \$vr0, \$vr1, \$vr2 + 420: 710b0820 vssrarn.hu.w \$vr0, \$vr1, \$vr2 + 424: 710b8820 vssrarn.wu.d \$vr0, \$vr1, \$vr2 + 428: 710c0820 vbitclr.b \$vr0, \$vr1, \$vr2 + 42c: 710c8820 vbitclr.h \$vr0, \$vr1, \$vr2 + 430: 710d0820 vbitclr.w \$vr0, \$vr1, \$vr2 + 434: 710d8820 vbitclr.d \$vr0, \$vr1, \$vr2 + 438: 710e0820 vbitset.b \$vr0, \$vr1, \$vr2 + 43c: 710e8820 vbitset.h \$vr0, \$vr1, \$vr2 + 440: 710f0820 vbitset.w \$vr0, \$vr1, \$vr2 + 444: 710f8820 vbitset.d \$vr0, \$vr1, \$vr2 + 448: 71100820 vbitrev.b \$vr0, \$vr1, \$vr2 + 44c: 71108820 vbitrev.h \$vr0, \$vr1, \$vr2 + 450: 71110820 vbitrev.w \$vr0, \$vr1, \$vr2 + 454: 71118820 vbitrev.d \$vr0, \$vr1, \$vr2 + 458: 71160820 vpackev.b \$vr0, \$vr1, \$vr2 + 45c: 71168820 vpackev.h \$vr0, \$vr1, \$vr2 + 460: 71170820 vpackev.w \$vr0, \$vr1, \$vr2 + 464: 71178820 vpackev.d \$vr0, \$vr1, \$vr2 + 468: 71180820 vpackod.b \$vr0, \$vr1, \$vr2 + 46c: 71188820 vpackod.h \$vr0, \$vr1, \$vr2 + 470: 71190820 vpackod.w \$vr0, \$vr1, \$vr2 + 474: 71198820 vpackod.d \$vr0, \$vr1, \$vr2 + 478: 711a0820 vilvl.b \$vr0, \$vr1, \$vr2 + 47c: 711a8820 vilvl.h \$vr0, \$vr1, \$vr2 + 480: 711b0820 vilvl.w \$vr0, \$vr1, \$vr2 + 484: 711b8820 vilvl.d \$vr0, \$vr1, \$vr2 + 488: 711c0820 vilvh.b \$vr0, \$vr1, \$vr2 + 48c: 711c8820 vilvh.h \$vr0, \$vr1, \$vr2 + 490: 711d0820 vilvh.w \$vr0, \$vr1, \$vr2 + 494: 711d8820 vilvh.d \$vr0, \$vr1, \$vr2 + 498: 711e0820 vpickev.b \$vr0, \$vr1, \$vr2 + 49c: 711e8820 vpickev.h \$vr0, \$vr1, \$vr2 + 4a0: 711f0820 vpickev.w \$vr0, \$vr1, \$vr2 + 4a4: 711f8820 vpickev.d \$vr0, \$vr1, \$vr2 + 4a8: 71200820 vpickod.b \$vr0, \$vr1, \$vr2 + 4ac: 71208820 vpickod.h \$vr0, \$vr1, \$vr2 + 4b0: 71210820 vpickod.w \$vr0, \$vr1, \$vr2 + 4b4: 71218820 vpickod.d \$vr0, \$vr1, \$vr2 + 4b8: 71220820 vreplve.b \$vr0, \$vr1, \$tp + 4bc: 71228820 vreplve.h \$vr0, \$vr1, \$tp + 4c0: 71230820 vreplve.w \$vr0, \$vr1, \$tp + 4c4: 71238820 vreplve.d \$vr0, \$vr1, \$tp + 4c8: 71260820 vand.v \$vr0, \$vr1, \$vr2 + 4cc: 71268820 vor.v \$vr0, \$vr1, \$vr2 + 4d0: 71270820 vxor.v \$vr0, \$vr1, \$vr2 + 4d4: 71278820 vnor.v \$vr0, \$vr1, \$vr2 + 4d8: 71280820 vandn.v \$vr0, \$vr1, \$vr2 + 4dc: 71288820 vorn.v \$vr0, \$vr1, \$vr2 + 4e0: 712b0820 vfrstp.b \$vr0, \$vr1, \$vr2 + 4e4: 712b8820 vfrstp.h \$vr0, \$vr1, \$vr2 + 4e8: 712d0820 vadd.q \$vr0, \$vr1, \$vr2 + 4ec: 712d8820 vsub.q \$vr0, \$vr1, \$vr2 + 4f0: 712e0820 vsigncov.b \$vr0, \$vr1, \$vr2 + 4f4: 712e8820 vsigncov.h \$vr0, \$vr1, \$vr2 + 4f8: 712f0820 vsigncov.w \$vr0, \$vr1, \$vr2 + 4fc: 712f8820 vsigncov.d \$vr0, \$vr1, \$vr2 + 500: 71308820 vfadd.s \$vr0, \$vr1, \$vr2 + 504: 71310820 vfadd.d \$vr0, \$vr1, \$vr2 + 508: 71328820 vfsub.s \$vr0, \$vr1, \$vr2 + 50c: 71330820 vfsub.d \$vr0, \$vr1, \$vr2 + 510: 71388820 vfmul.s \$vr0, \$vr1, \$vr2 + 514: 71390820 vfmul.d \$vr0, \$vr1, \$vr2 + 518: 713a8820 vfdiv.s \$vr0, \$vr1, \$vr2 + 51c: 713b0820 vfdiv.d \$vr0, \$vr1, \$vr2 + 520: 713c8820 vfmax.s \$vr0, \$vr1, \$vr2 + 524: 713d0820 vfmax.d \$vr0, \$vr1, \$vr2 + 528: 713e8820 vfmin.s \$vr0, \$vr1, \$vr2 + 52c: 713f0820 vfmin.d \$vr0, \$vr1, \$vr2 + 530: 71408820 vfmaxa.s \$vr0, \$vr1, \$vr2 + 534: 71410820 vfmaxa.d \$vr0, \$vr1, \$vr2 + 538: 71428820 vfmina.s \$vr0, \$vr1, \$vr2 + 53c: 71430820 vfmina.d \$vr0, \$vr1, \$vr2 + 540: 71460820 vfcvt.h.s \$vr0, \$vr1, \$vr2 + 544: 71468820 vfcvt.s.d \$vr0, \$vr1, \$vr2 + 548: 71480820 vffint.s.l \$vr0, \$vr1, \$vr2 + 54c: 71498820 vftint.w.d \$vr0, \$vr1, \$vr2 + 550: 714a0820 vftintrm.w.d \$vr0, \$vr1, \$vr2 + 554: 714a8820 vftintrp.w.d \$vr0, \$vr1, \$vr2 + 558: 714b0820 vftintrz.w.d \$vr0, \$vr1, \$vr2 + 55c: 714b8820 vftintrne.w.d \$vr0, \$vr1, \$vr2 + 560: 717a8820 vshuf.h \$vr0, \$vr1, \$vr2 + 564: 717b0820 vshuf.w \$vr0, \$vr1, \$vr2 + 568: 717b8820 vshuf.d \$vr0, \$vr1, \$vr2 + 56c: 72800420 vseqi.b \$vr0, \$vr1, 1 + 570: 72808420 vseqi.h \$vr0, \$vr1, 1 + 574: 72810420 vseqi.w \$vr0, \$vr1, 1 + 578: 72818420 vseqi.d \$vr0, \$vr1, 1 + 57c: 72820420 vslei.b \$vr0, \$vr1, 1 + 580: 72828420 vslei.h \$vr0, \$vr1, 1 + 584: 72830420 vslei.w \$vr0, \$vr1, 1 + 588: 72838420 vslei.d \$vr0, \$vr1, 1 + 58c: 72840420 vslei.bu \$vr0, \$vr1, 0x1 + 590: 72848420 vslei.hu \$vr0, \$vr1, 0x1 + 594: 72850420 vslei.wu \$vr0, \$vr1, 0x1 + 598: 72858420 vslei.du \$vr0, \$vr1, 0x1 + 59c: 72860420 vslti.b \$vr0, \$vr1, 1 + 5a0: 72868420 vslti.h \$vr0, \$vr1, 1 + 5a4: 72870420 vslti.w \$vr0, \$vr1, 1 + 5a8: 72878420 vslti.d \$vr0, \$vr1, 1 + 5ac: 72880420 vslti.bu \$vr0, \$vr1, 0x1 + 5b0: 72888420 vslti.hu \$vr0, \$vr1, 0x1 + 5b4: 72890420 vslti.wu \$vr0, \$vr1, 0x1 + 5b8: 72898420 vslti.du \$vr0, \$vr1, 0x1 + 5bc: 728a0420 vaddi.bu \$vr0, \$vr1, 0x1 + 5c0: 728a8420 vaddi.hu \$vr0, \$vr1, 0x1 + 5c4: 728b0420 vaddi.wu \$vr0, \$vr1, 0x1 + 5c8: 728b8420 vaddi.du \$vr0, \$vr1, 0x1 + 5cc: 728c0420 vsubi.bu \$vr0, \$vr1, 0x1 + 5d0: 728c8420 vsubi.hu \$vr0, \$vr1, 0x1 + 5d4: 728d0420 vsubi.wu \$vr0, \$vr1, 0x1 + 5d8: 728d8420 vsubi.du \$vr0, \$vr1, 0x1 + 5dc: 728e0420 vbsll.v \$vr0, \$vr1, 0x1 + 5e0: 728e8420 vbsrl.v \$vr0, \$vr1, 0x1 + 5e4: 72900420 vmaxi.b \$vr0, \$vr1, 1 + 5e8: 72908420 vmaxi.h \$vr0, \$vr1, 1 + 5ec: 72910420 vmaxi.w \$vr0, \$vr1, 1 + 5f0: 72918420 vmaxi.d \$vr0, \$vr1, 1 + 5f4: 72920420 vmini.b \$vr0, \$vr1, 1 + 5f8: 72928420 vmini.h \$vr0, \$vr1, 1 + 5fc: 72930420 vmini.w \$vr0, \$vr1, 1 + 600: 72938420 vmini.d \$vr0, \$vr1, 1 + 604: 72940420 vmaxi.bu \$vr0, \$vr1, 0x1 + 608: 72948420 vmaxi.hu \$vr0, \$vr1, 0x1 + 60c: 72950420 vmaxi.wu \$vr0, \$vr1, 0x1 + 610: 72958420 vmaxi.du \$vr0, \$vr1, 0x1 + 614: 72960420 vmini.bu \$vr0, \$vr1, 0x1 + 618: 72968420 vmini.hu \$vr0, \$vr1, 0x1 + 61c: 72970420 vmini.wu \$vr0, \$vr1, 0x1 + 620: 72978420 vmini.du \$vr0, \$vr1, 0x1 + 624: 729a0420 vfrstpi.b \$vr0, \$vr1, 0x1 + 628: 729a8420 vfrstpi.h \$vr0, \$vr1, 0x1 + 62c: 729c0020 vclo.b \$vr0, \$vr1 + 630: 729c0420 vclo.h \$vr0, \$vr1 + 634: 729c0820 vclo.w \$vr0, \$vr1 + 638: 729c0c20 vclo.d \$vr0, \$vr1 + 63c: 729c1020 vclz.b \$vr0, \$vr1 + 640: 729c1420 vclz.h \$vr0, \$vr1 + 644: 729c1820 vclz.w \$vr0, \$vr1 + 648: 729c1c20 vclz.d \$vr0, \$vr1 + 64c: 729c2020 vpcnt.b \$vr0, \$vr1 + 650: 729c2420 vpcnt.h \$vr0, \$vr1 + 654: 729c2820 vpcnt.w \$vr0, \$vr1 + 658: 729c2c20 vpcnt.d \$vr0, \$vr1 + 65c: 729c3020 vneg.b \$vr0, \$vr1 + 660: 729c3420 vneg.h \$vr0, \$vr1 + 664: 729c3820 vneg.w \$vr0, \$vr1 + 668: 729c3c20 vneg.d \$vr0, \$vr1 + 66c: 729c4020 vmskltz.b \$vr0, \$vr1 + 670: 729c4420 vmskltz.h \$vr0, \$vr1 + 674: 729c4820 vmskltz.w \$vr0, \$vr1 + 678: 729c4c20 vmskltz.d \$vr0, \$vr1 + 67c: 729c5020 vmskgez.b \$vr0, \$vr1 + 680: 729c6020 vmsknz.b \$vr0, \$vr1 + 684: 729c9820 vseteqz.v \$fcc0, \$vr1 + 688: 729c9c20 vsetnez.v \$fcc0, \$vr1 + 68c: 729ca020 vsetanyeqz.b \$fcc0, \$vr1 + 690: 729ca420 vsetanyeqz.h \$fcc0, \$vr1 + 694: 729ca820 vsetanyeqz.w \$fcc0, \$vr1 + 698: 729cac20 vsetanyeqz.d \$fcc0, \$vr1 + 69c: 729cb020 vsetallnez.b \$fcc0, \$vr1 + 6a0: 729cb420 vsetallnez.h \$fcc0, \$vr1 + 6a4: 729cb820 vsetallnez.w \$fcc0, \$vr1 + 6a8: 729cbc20 vsetallnez.d \$fcc0, \$vr1 + 6ac: 729cc420 vflogb.s \$vr0, \$vr1 + 6b0: 729cc820 vflogb.d \$vr0, \$vr1 + 6b4: 729cd420 vfclass.s \$vr0, \$vr1 + 6b8: 729cd820 vfclass.d \$vr0, \$vr1 + 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$vr1, $vr2 +vmulwod.h.b $vr0, $vr1, $vr2 +vmulwod.w.h $vr0, $vr1, $vr2 +vmulwod.d.w $vr0, $vr1, $vr2 +vmulwod.q.d $vr0, $vr1, $vr2 +vmulwod.h.bu $vr0, $vr1, $vr2 +vmulwod.w.hu $vr0, $vr1, $vr2 +vmulwod.d.wu $vr0, $vr1, $vr2 +vmulwod.q.du $vr0, $vr1, $vr2 +vmulwod.h.bu.b $vr0, $vr1, $vr2 +vmulwod.w.hu.h $vr0, $vr1, $vr2 +vmulwod.d.wu.w $vr0, $vr1, $vr2 +vmulwod.q.du.d $vr0, $vr1, $vr2 +vsubwev.h.b $vr0, $vr1, $vr2 +vsubwev.w.h $vr0, $vr1, $vr2 +vsubwev.d.w $vr0, $vr1, $vr2 +vsubwev.q.d $vr0, $vr1, $vr2 +vsubwev.h.bu $vr0, $vr1, $vr2 +vsubwev.w.hu $vr0, $vr1, $vr2 +vsubwev.d.wu $vr0, $vr1, $vr2 +vsubwev.q.du $vr0, $vr1, $vr2 +vsubwod.h.b $vr0, $vr1, $vr2 +vsubwod.w.h $vr0, $vr1, $vr2 +vsubwod.d.w $vr0, $vr1, $vr2 +vsubwod.q.d $vr0, $vr1, $vr2 +vsubwod.h.bu $vr0, $vr1, $vr2 +vsubwod.w.hu $vr0, $vr1, $vr2 +vsubwod.d.wu $vr0, $vr1, $vr2 +vsubwod.q.du $vr0, $vr1, $vr2 +vrepli.d $vr0, 1 +vrepli.h $vr0, 1 +vrepli.w $vr0, 1 +vldi $vr0, 1 +vpermi.w $vr0, $vr1, 1 +vext2xv.h.b $xr0, $xr1 +vext2xv.w.b $xr0, $xr1 +vext2xv.d.b $xr0, $xr1 +vext2xv.w.h $xr0, $xr1 +vext2xv.d.h $xr0, $xr1 +vext2xv.d.w $xr0, $xr1 +vext2xv.hu.bu $xr0, $xr1 +vext2xv.wu.bu $xr0, $xr1 +vext2xv.du.bu $xr0, $xr1 +vext2xv.wu.hu $xr0, $xr1 +vext2xv.du.hu $xr0, $xr1 +vext2xv.du.wu $xr0, $xr1 +vfrecipe.s $vr0, $vr1 +vfrecipe.d $vr0, $vr1 +vfrsqrte.s $vr0, $vr1 +vfrsqrte.d $vr0, $vr1 From patchwork Thu Feb 29 11:45:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cai X-Patchwork-Id: 86583 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AACEB385843E for ; Thu, 29 Feb 2024 11:47:47 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 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b=UNw3VYyRSxrattJCc0xmLlsWKgBiVwQluAUoJoUfiHpXKkzSjEEmGMKh6r1QiT6ooEsPflACYthkAVIu7HYFMKSFJs165RECj3ahFsm5HJ2VBTa51cE4Wib2tC3Sk3zDEhlp9O8P+3JMmC3+3Ksis+ulbX0IlLCtkPREoPfGYzc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8AxOOhxbuBlz+ISAA--.28294S3; Thu, 29 Feb 2024 19:45:53 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxX89RbuBlRb9KAA--.1626S8; Thu, 29 Feb 2024 19:45:52 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 4/7] LoongArch: Add gas testsuit for LA64 int/float instructions Date: Thu, 29 Feb 2024 19:45:16 +0800 Message-Id: <20240229114519.1552207-5-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114519.1552207-1-cailulu@loongson.cn> References: <20240229114519.1552207-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxX89RbuBlRb9KAA--.1626S8 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUElgAAs2 X-Coremail-Antispam: 1Uk129KBj9fXoWfury3tF4DZw1UWw13CFyrZrc_yoWrGw4DCo WrA34FvF13trZ8JFy8JrW3Z3WUJFW7GFn5KrsxXw4xZ3Z3ur1jyr17KwnYy3WDGr48Z3WD ury5Jr4rZrW3JF9rl-sFpf9Il3svdjkaLaAFLSUrUUUUbb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUY87kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUXVWUAwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 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Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the int/float instructions of LA64. --- gas/testsuite/gas/loongarch/insn_float64.d | 165 ++++++++ gas/testsuite/gas/loongarch/insn_float64.s | 157 ++++++++ gas/testsuite/gas/loongarch/insn_int64.d | 430 ++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_int64.s | 440 +++++++++++++++++++++ 4 files changed, 1192 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/insn_float64.d create mode 100644 gas/testsuite/gas/loongarch/insn_float64.s create mode 100644 gas/testsuite/gas/loongarch/insn_int64.d create mode 100644 gas/testsuite/gas/loongarch/insn_int64.s diff --git a/gas/testsuite/gas/loongarch/insn_float64.d b/gas/testsuite/gas/loongarch/insn_float64.d new file mode 100644 index 00000000000..4ffbfa78508 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_float64.d @@ -0,0 +1,165 @@ +#as-new: +#objdump: -d +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 01008820 fadd.s \$fa0, \$fa1, \$fa2 + 4: 01010820 fadd.d \$fa0, \$fa1, \$fa2 + 8: 01028820 fsub.s \$fa0, \$fa1, \$fa2 + c: 01030820 fsub.d \$fa0, \$fa1, \$fa2 + 10: 01048820 fmul.s \$fa0, \$fa1, \$fa2 + 14: 01050820 fmul.d \$fa0, \$fa1, \$fa2 + 18: 01068820 fdiv.s \$fa0, \$fa1, \$fa2 + 1c: 01070820 fdiv.d \$fa0, \$fa1, \$fa2 + 20: 01088820 fmax.s \$fa0, \$fa1, \$fa2 + 24: 01090820 fmax.d \$fa0, \$fa1, \$fa2 + 28: 010a8820 fmin.s \$fa0, \$fa1, \$fa2 + 2c: 010b0820 fmin.d \$fa0, \$fa1, \$fa2 + 30: 010c8820 fmaxa.s \$fa0, \$fa1, \$fa2 + 34: 010d0820 fmaxa.d \$fa0, \$fa1, \$fa2 + 38: 010e8820 fmina.s \$fa0, \$fa1, \$fa2 + 3c: 010f0820 fmina.d \$fa0, \$fa1, \$fa2 + 40: 01108820 fscaleb.s \$fa0, \$fa1, \$fa2 + 44: 01110820 fscaleb.d \$fa0, \$fa1, \$fa2 + 48: 01128820 fcopysign.s \$fa0, \$fa1, \$fa2 + 4c: 01130820 fcopysign.d \$fa0, \$fa1, \$fa2 + 50: 01140420 fabs.s \$fa0, \$fa1 + 54: 01140820 fabs.d \$fa0, \$fa1 + 58: 01141420 fneg.s \$fa0, \$fa1 + 5c: 01141820 fneg.d \$fa0, \$fa1 + 60: 01142420 flogb.s \$fa0, \$fa1 + 64: 01142820 flogb.d \$fa0, \$fa1 + 68: 01143420 fclass.s \$fa0, \$fa1 + 6c: 01143820 fclass.d \$fa0, \$fa1 + 70: 01144420 fsqrt.s \$fa0, \$fa1 + 74: 01144820 fsqrt.d \$fa0, \$fa1 + 78: 01145420 frecip.s \$fa0, \$fa1 + 7c: 01145820 frecip.d \$fa0, \$fa1 + 80: 01146420 frsqrt.s \$fa0, \$fa1 + 84: 01146820 frsqrt.d \$fa0, \$fa1 + 88: 01149420 fmov.s \$fa0, \$fa1 + 8c: 01149820 fmov.d \$fa0, \$fa1 + 90: 0114a4a0 movgr2fr.w \$fa0, \$a1 + 94: 0114a8a0 movgr2fr.d \$fa0, \$a1 + 98: 0114aca0 movgr2frh.w \$fa0, \$a1 + 9c: 0114b424 movfr2gr.s \$a0, \$fa1 + a0: 0114b824 movfr2gr.d \$a0, \$fa1 + a4: 0114bc24 movfrh2gr.s \$a0, \$fa1 + a8: 0114c0a0 movgr2fcsr \$fcsr0, \$a1 + ac: 0114c804 movfcsr2gr \$a0, \$fcsr0 + b0: 0114d020 movfr2cf \$fcc0, \$fa1 + b4: 0114d4a0 movcf2fr \$fa0, \$fcc5 + b8: 0114d8a0 movgr2cf \$fcc0, \$a1 + bc: 0114dca4 movcf2gr \$a0, \$fcc5 + c0: 01191820 fcvt.s.d \$fa0, \$fa1 + c4: 01192420 fcvt.d.s \$fa0, \$fa1 + c8: 011a0420 ftintrm.w.s \$fa0, \$fa1 + cc: 011a0820 ftintrm.w.d \$fa0, \$fa1 + d0: 011a2420 ftintrm.l.s \$fa0, \$fa1 + d4: 011a2820 ftintrm.l.d \$fa0, \$fa1 + d8: 011a4420 ftintrp.w.s \$fa0, \$fa1 + dc: 011a4820 ftintrp.w.d \$fa0, \$fa1 + e0: 011a6420 ftintrp.l.s \$fa0, \$fa1 + e4: 011a6820 ftintrp.l.d \$fa0, \$fa1 + e8: 011a8420 ftintrz.w.s \$fa0, \$fa1 + ec: 011a8820 ftintrz.w.d \$fa0, \$fa1 + f0: 011aa420 ftintrz.l.s \$fa0, \$fa1 + f4: 011aa820 ftintrz.l.d \$fa0, \$fa1 + f8: 011ac420 ftintrne.w.s \$fa0, \$fa1 + fc: 011ac820 ftintrne.w.d \$fa0, \$fa1 + 100: 011ae420 ftintrne.l.s \$fa0, \$fa1 + 104: 011ae820 ftintrne.l.d \$fa0, \$fa1 + 108: 011b0420 ftint.w.s \$fa0, \$fa1 + 10c: 011b0820 ftint.w.d \$fa0, \$fa1 + 110: 011b2420 ftint.l.s \$fa0, \$fa1 + 114: 011b2820 ftint.l.d \$fa0, \$fa1 + 118: 011d1020 ffint.s.w \$fa0, \$fa1 + 11c: 011d1820 ffint.s.l \$fa0, \$fa1 + 120: 011d2020 ffint.d.w \$fa0, \$fa1 + 124: 011d2820 ffint.d.l \$fa0, \$fa1 + 128: 011e4420 frint.s \$fa0, \$fa1 + 12c: 011e4820 frint.d \$fa0, \$fa1 + 130: 01147420 frecipe.s \$fa0, \$fa1 + 134: 01147820 frecipe.d \$fa0, \$fa1 + 138: 01148420 frsqrte.s \$fa0, \$fa1 + 13c: 01148820 frsqrte.d \$fa0, \$fa1 + 140: 08118820 fmadd.s \$fa0, \$fa1, \$fa2, \$fa3 + 144: 08218820 fmadd.d \$fa0, \$fa1, \$fa2, \$fa3 + 148: 08518820 fmsub.s \$fa0, \$fa1, \$fa2, \$fa3 + 14c: 08618820 fmsub.d \$fa0, \$fa1, \$fa2, \$fa3 + 150: 08918820 fnmadd.s \$fa0, \$fa1, \$fa2, \$fa3 + 154: 08a18820 fnmadd.d \$fa0, \$fa1, \$fa2, \$fa3 + 158: 08d18820 fnmsub.s \$fa0, \$fa1, \$fa2, \$fa3 + 15c: 08e18820 fnmsub.d \$fa0, \$fa1, \$fa2, \$fa3 + 160: 0c100820 fcmp.caf.s \$fcc0, \$fa1, \$fa2 + 164: 0c108820 fcmp.saf.s \$fcc0, \$fa1, \$fa2 + 168: 0c110820 fcmp.clt.s \$fcc0, \$fa1, \$fa2 + 16c: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2 + 170: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2 + 174: 0c120820 fcmp.ceq.s \$fcc0, \$fa1, \$fa2 + 178: 0c128820 fcmp.seq.s \$fcc0, \$fa1, \$fa2 + 17c: 0c130820 fcmp.cle.s \$fcc0, \$fa1, \$fa2 + 180: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2 + 184: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2 + 188: 0c140820 fcmp.cun.s \$fcc0, \$fa1, \$fa2 + 18c: 0c148820 fcmp.sun.s \$fcc0, \$fa1, \$fa2 + 190: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2 + 194: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2 + 198: 0c158820 fcmp.sult.s \$fcc0, \$fa1, \$fa2 + 19c: 0c160820 fcmp.cueq.s \$fcc0, \$fa1, \$fa2 + 1a0: 0c168820 fcmp.sueq.s \$fcc0, \$fa1, \$fa2 + 1a4: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2 + 1a8: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2 + 1ac: 0c178820 fcmp.sule.s \$fcc0, \$fa1, \$fa2 + 1b0: 0c180820 fcmp.cne.s \$fcc0, \$fa1, \$fa2 + 1b4: 0c188820 fcmp.sne.s \$fcc0, \$fa1, \$fa2 + 1b8: 0c1a0820 fcmp.cor.s \$fcc0, \$fa1, \$fa2 + 1bc: 0c1a8820 fcmp.sor.s \$fcc0, \$fa1, \$fa2 + 1c0: 0c1c0820 fcmp.cune.s \$fcc0, \$fa1, \$fa2 + 1c4: 0c1c8820 fcmp.sune.s \$fcc0, \$fa1, \$fa2 + 1c8: 0c200820 fcmp.caf.d \$fcc0, \$fa1, \$fa2 + 1cc: 0c208820 fcmp.saf.d \$fcc0, \$fa1, \$fa2 + 1d0: 0c210820 fcmp.clt.d \$fcc0, \$fa1, \$fa2 + 1d4: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2 + 1d8: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2 + 1dc: 0c220820 fcmp.ceq.d \$fcc0, \$fa1, \$fa2 + 1e0: 0c228820 fcmp.seq.d \$fcc0, \$fa1, \$fa2 + 1e4: 0c230820 fcmp.cle.d \$fcc0, \$fa1, \$fa2 + 1e8: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2 + 1ec: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2 + 1f0: 0c240820 fcmp.cun.d \$fcc0, \$fa1, \$fa2 + 1f4: 0c248820 fcmp.sun.d \$fcc0, \$fa1, \$fa2 + 1f8: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2 + 1fc: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2 + 200: 0c258820 fcmp.sult.d \$fcc0, \$fa1, \$fa2 + 204: 0c260820 fcmp.cueq.d \$fcc0, \$fa1, \$fa2 + 208: 0c268820 fcmp.sueq.d \$fcc0, \$fa1, \$fa2 + 20c: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2 + 210: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2 + 214: 0c278820 fcmp.sule.d \$fcc0, \$fa1, \$fa2 + 218: 0c280820 fcmp.cne.d \$fcc0, \$fa1, \$fa2 + 21c: 0c288820 fcmp.sne.d \$fcc0, \$fa1, \$fa2 + 220: 0c2a0820 fcmp.cor.d \$fcc0, \$fa1, \$fa2 + 224: 0c2a8820 fcmp.sor.d \$fcc0, \$fa1, \$fa2 + 228: 0c2c0820 fcmp.cune.d \$fcc0, \$fa1, \$fa2 + 22c: 0c2c8820 fcmp.sune.d \$fcc0, \$fa1, \$fa2 + 230: 0d000820 fsel \$fa0, \$fa1, \$fa2, \$fcc0 + 234: 2b00058a fld.s \$ft2, \$t0, 1 + 238: 2b40058a fst.s \$ft2, \$t0, 1 + 23c: 2b80058a fld.d \$ft2, \$t0, 1 + 240: 2bc0058a fst.d \$ft2, \$t0, 1 + 244: 38741480 fldgt.s \$fa0, \$a0, \$a1 + 248: 38749480 fldgt.d \$fa0, \$a0, \$a1 + 24c: 38751480 fldle.s \$fa0, \$a0, \$a1 + 250: 38759480 fldle.d \$fa0, \$a0, \$a1 + 254: 38761480 fstgt.s \$fa0, \$a0, \$a1 + 258: 38769480 fstgt.d \$fa0, \$a0, \$a1 + 25c: 38771480 fstle.s \$fa0, \$a0, \$a1 + 260: 38779480 fstle.d \$fa0, \$a0, \$a1 + 264: 48000000 bceqz \$fcc0, 0 # 0x264 + 268: 48000100 bcnez \$fcc0, 0 # 0x268 diff --git a/gas/testsuite/gas/loongarch/insn_float64.s b/gas/testsuite/gas/loongarch/insn_float64.s new file mode 100644 index 00000000000..a7ce56efedf --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_float64.s @@ -0,0 +1,157 @@ +fadd.s $f0,$f1,$f2 +fadd.d $f0,$f1,$f2 +fsub.s $f0,$f1,$f2 +fsub.d $f0,$f1,$f2 +fmul.s $f0,$f1,$f2 +fmul.d $f0,$f1,$f2 +fdiv.s $f0,$f1,$f2 +fdiv.d $f0,$f1,$f2 +fmax.s $f0,$f1,$f2 +fmax.d $f0,$f1,$f2 +fmin.s $f0,$f1,$f2 +fmin.d $f0,$f1,$f2 +fmaxa.s $f0,$f1,$f2 +fmaxa.d $f0,$f1,$f2 +fmina.s $f0,$f1,$f2 +fmina.d $f0,$f1,$f2 +fscaleb.s $f0,$f1,$f2 +fscaleb.d $f0,$f1,$f2 +fcopysign.s $f0,$f1,$f2 +fcopysign.d $f0,$f1,$f2 +fabs.s $f0,$f1 +fabs.d $f0,$f1 +fneg.s $f0,$f1 +fneg.d $f0,$f1 +flogb.s $f0,$f1 +flogb.d $f0,$f1 +fclass.s $f0,$f1 +fclass.d $f0,$f1 +fsqrt.s $f0,$f1 +fsqrt.d $f0,$f1 +frecip.s $f0,$f1 +frecip.d $f0,$f1 +frsqrt.s $f0,$f1 +frsqrt.d $f0,$f1 +fmov.s $f0,$f1 +fmov.d $f0,$f1 +movgr2fr.w $f0,$r5 +movgr2fr.d $f0,$r5 +movgr2frh.w $f0,$r5 +movfr2gr.s $r4,$f1 +movfr2gr.d $r4,$f1 +movfrh2gr.s $r4,$f1 +movgr2fcsr $fcsr0,$r5 +movfcsr2gr $r4,$fcsr0 +movfr2cf $fcc0,$f1 +movcf2fr $f0,$fcc5 +movgr2cf $fcc0,$r5 +movcf2gr $r4,$fcc5 +fcvt.s.d $f0,$f1 +fcvt.d.s $f0,$f1 +ftintrm.w.s $f0,$f1 +ftintrm.w.d $f0,$f1 +ftintrm.l.s $f0,$f1 +ftintrm.l.d $f0,$f1 +ftintrp.w.s $f0,$f1 +ftintrp.w.d $f0,$f1 +ftintrp.l.s $f0,$f1 +ftintrp.l.d $f0,$f1 +ftintrz.w.s $f0,$f1 +ftintrz.w.d $f0,$f1 +ftintrz.l.s $f0,$f1 +ftintrz.l.d $f0,$f1 +ftintrne.w.s $f0,$f1 +ftintrne.w.d $f0,$f1 +ftintrne.l.s $f0,$f1 +ftintrne.l.d $f0,$f1 +ftint.w.s $f0,$f1 +ftint.w.d $f0,$f1 +ftint.l.s $f0,$f1 +ftint.l.d $f0,$f1 +ffint.s.w $f0,$f1 +ffint.s.l $f0,$f1 +ffint.d.w $f0,$f1 +ffint.d.l $f0,$f1 +frint.s $f0,$f1 +frint.d $f0,$f1 +frecipe.s $f0,$f1 +frecipe.d $f0,$f1 +frsqrte.s $f0,$f1 +frsqrte.d $f0,$f1 + +# 4_opt_op +fmadd.s $f0,$f1,$f2,$f3 +fmadd.d $f0,$f1,$f2,$f3 +fmsub.s $f0,$f1,$f2,$f3 +fmsub.d $f0,$f1,$f2,$f3 +fnmadd.s $f0,$f1,$f2,$f3 +fnmadd.d $f0,$f1,$f2,$f3 +fnmsub.s $f0,$f1,$f2,$f3 +fnmsub.d $f0,$f1,$f2,$f3 +fcmp.caf.s $fcc0,$f1,$f2 +fcmp.saf.s $fcc0,$f1,$f2 +fcmp.clt.s $fcc0,$f1,$f2 +fcmp.slt.s $fcc0,$f1,$f2 +fcmp.sgt.s $fcc0,$f2,$f1 +fcmp.ceq.s $fcc0,$f1,$f2 +fcmp.seq.s $fcc0,$f1,$f2 +fcmp.cle.s $fcc0,$f1,$f2 +fcmp.sle.s $fcc0,$f1,$f2 +fcmp.sge.s $fcc0,$f2,$f1 +fcmp.cun.s $fcc0,$f1,$f2 +fcmp.sun.s $fcc0,$f1,$f2 +fcmp.cult.s $fcc0,$f1,$f2 +fcmp.cugt.s $fcc0,$f2,$f1 +fcmp.sult.s $fcc0,$f1,$f2 +fcmp.cueq.s $fcc0,$f1,$f2 +fcmp.sueq.s $fcc0,$f1,$f2 +fcmp.cule.s $fcc0,$f1,$f2 +fcmp.cuge.s $fcc0,$f2,$f1 +fcmp.sule.s $fcc0,$f1,$f2 +fcmp.cne.s $fcc0,$f1,$f2 +fcmp.sne.s $fcc0,$f1,$f2 +fcmp.cor.s $fcc0,$f1,$f2 +fcmp.sor.s $fcc0,$f1,$f2 +fcmp.cune.s $fcc0,$f1,$f2 +fcmp.sune.s $fcc0,$f1,$f2 +fcmp.caf.d $fcc0,$f1,$f2 +fcmp.saf.d $fcc0,$f1,$f2 +fcmp.clt.d $fcc0,$f1,$f2 +fcmp.slt.d $fcc0,$f1,$f2 +fcmp.sgt.d $fcc0,$f2,$f1 +fcmp.ceq.d $fcc0,$f1,$f2 +fcmp.seq.d $fcc0,$f1,$f2 +fcmp.cle.d $fcc0,$f1,$f2 +fcmp.sle.d $fcc0,$f1,$f2 +fcmp.sge.d $fcc0,$f2,$f1 +fcmp.cun.d $fcc0,$f1,$f2 +fcmp.sun.d $fcc0,$f1,$f2 +fcmp.cult.d $fcc0,$f1,$f2 +fcmp.cugt.d $fcc0,$f2,$f1 +fcmp.sult.d $fcc0,$f1,$f2 +fcmp.cueq.d $fcc0,$f1,$f2 +fcmp.sueq.d $fcc0,$f1,$f2 +fcmp.cule.d $fcc0,$f1,$f2 +fcmp.cuge.d $fcc0,$f2,$f1 +fcmp.sule.d $fcc0,$f1,$f2 +fcmp.cne.d $fcc0,$f1,$f2 +fcmp.sne.d $fcc0,$f1,$f2 +fcmp.cor.d $fcc0,$f1,$f2 +fcmp.sor.d $fcc0,$f1,$f2 +fcmp.cune.d $fcc0,$f1,$f2 +fcmp.sune.d $fcc0,$f1,$f2 +fsel $f0,$f1,$f2,$fcc0 +fld.s $f10,$r12,1 +fst.s $f10,$r12,1 +fld.d $f10,$r12,1 +fst.d $f10,$r12,1 +fldgt.s $f0,$a0,$a1 +fldgt.d $f0,$a0,$a1 +fldle.s $f0,$a0,$a1 +fldle.d $f0,$a0,$a1 +fstgt.s $f0,$a0,$a1 +fstgt.d $f0,$a0,$a1 +fstle.s $f0,$a0,$a1 +fstle.d $f0,$a0,$a1 +bceqz $fcc0,.L1 +bcnez $fcc0,.L1 diff --git a/gas/testsuite/gas/loongarch/insn_int64.d b/gas/testsuite/gas/loongarch/insn_int64.d new file mode 100644 index 00000000000..360b840d415 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_int64.d @@ -0,0 +1,430 @@ +#as-new: +#objdump: -d -M no-aliases +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 020000a4 slti \$a0, \$a1, 0 + 4: 021ffca4 slti \$a0, \$a1, 2047 + 8: 022004a4 slti \$a0, \$a1, -2047 + c: 024000a4 sltui \$a0, \$a1, 0 + 10: 025ffca4 sltui \$a0, \$a1, 2047 + 14: 026004a4 sltui \$a0, \$a1, -2047 + 18: 028000a4 addi.w \$a0, \$a1, 0 + 1c: 029ffca4 addi.w \$a0, \$a1, 2047 + 20: 02a004a4 addi.w \$a0, \$a1, -2047 + 24: 02c000a4 addi.d \$a0, \$a1, 0 + 28: 02dffca4 addi.d \$a0, \$a1, 2047 + 2c: 02e004a4 addi.d \$a0, \$a1, -2047 + 30: 030000a4 lu52i.d \$a0, \$a1, 0 + 34: 031ffca4 lu52i.d \$a0, \$a1, 2047 + 38: 032004a4 lu52i.d \$a0, \$a1, -2047 + 3c: 034000a4 andi \$a0, \$a1, 0x0 + 40: 035ffca4 andi \$a0, \$a1, 0x7ff + 44: 038000a4 ori \$a0, \$a1, 0x0 + 48: 039ffca4 ori \$a0, \$a1, 0x7ff + 4c: 03c000a4 xori \$a0, \$a1, 0x0 + 50: 03dffca4 xori \$a0, \$a1, 0x7ff + 54: 100000a4 addu16i.d \$a0, \$a1, 0 + 58: 11fffca4 addu16i.d \$a0, \$a1, 32767 + 5c: 120004a4 addu16i.d \$a0, \$a1, -32767 + 60: 14000004 lu12i.w \$a0, 0 + 64: 14ffffe4 lu12i.w \$a0, 524287 + 68: 17000024 lu32i.d \$a0, -524287 + 6c: 18000004 pcaddi \$a0, 0 + 70: 18ffffe4 pcaddi \$a0, 524287 + 74: 19000004 pcaddi \$a0, -524288 + 78: 1a000004 pcalau12i \$a0, 0 + 7c: 1affffe4 pcalau12i \$a0, 524287 + 80: 1b000024 pcalau12i \$a0, -524287 + 84: 1c000004 pcaddu12i \$a0, 0 + 88: 1cffffe4 pcaddu12i \$a0, 524287 + 8c: 1d000024 pcaddu12i \$a0, -524287 + 90: 1e000004 pcaddu18i \$a0, 0 + 94: 1effffe4 pcaddu18i \$a0, 524287 + 98: 1f000024 pcaddu18i \$a0, -524287 + 9c: 0004b58b alsl.w \$a7, \$t0, \$t1, 0x2 + a0: 0006b58b alsl.wu \$a7, \$t0, \$t1, 0x2 + a4: 0009358b bytepick.w \$a7, \$t0, \$t1, 0x2 + a8: 000d358b bytepick.d \$a7, \$t0, \$t1, 0x2 + ac: 002a0002 break 0x2 + b0: 002a8002 dbcl 0x2 + b4: 002b0002 syscall 0x2 + b8: 002cb58b alsl.d \$a7, \$t0, \$t1, 0x2 + bc: 0040898b slli.w \$a7, \$t0, 0x2 + c0: 0041098b slli.d \$a7, \$t0, 0x2 + c4: 0044898b srli.w \$a7, \$t0, 0x2 + c8: 004509ac srli.d \$t0, \$t1, 0x2 + cc: 004889ac srai.w \$t0, \$t1, 0x2 + d0: 004909ac srai.d \$t0, \$t1, 0x2 + d4: 006209ac bstrins.w \$t0, \$t1, 0x2, 0x2 + d8: 008209ac bstrins.d \$t0, \$t1, 0x2, 0x2 + dc: 00c209ac bstrpick.d \$t0, \$t1, 0x2, 0x2 + e0: 00c209ac bstrpick.d \$t0, \$t1, 0x2, 0x2 + e4: 02048dac slti \$t0, \$t1, 291 + e8: 02448dac sltui \$t0, \$t1, 291 + ec: 02848dac addi.w \$t0, \$t1, 291 + f0: 02c48dac addi.d \$t0, \$t1, 291 + f4: 03048dac lu52i.d \$t0, \$t1, 291 + f8: 034009ac andi \$t0, \$t1, 0x2 + fc: 038009ac ori \$t0, \$t1, 0x2 + 100: 03c009ac xori \$t0, \$t1, 0x2 + 104: 100009ac addu16i.d \$t0, \$t1, 2 + 108: 1400246c lu12i.w \$t0, 291 + 10c: 1600246c lu32i.d \$t0, 291 + 110: 1800000c pcaddi \$t0, 0 + 114: 1a00246c pcalau12i \$t0, 291 + 118: 1c00246c pcaddu12i \$t0, 291 + 11c: 1e00246c pcaddu18i \$t0, 291 + 120: 04048c0c csrrd \$t0, 0x123 + 124: 04048c2c csrwr \$t0, 0x123 + 128: 040009ac csrxchg \$t0, \$t1, 0x2 + 12c: 060009a2 cacop 0x2, \$t1, 2 + 130: 064009ac lddir \$t0, \$t1, 0x2 + 134: 06440980 ldpte \$t0, 0x2 + 138: 0649b9a2 invtlb 0x2, \$t1, \$t2 + 13c: 000010a4 clo.w \$a0, \$a1 + 140: 000014a4 clz.w \$a0, \$a1 + 144: 000018a4 cto.w \$a0, \$a1 + 148: 00001ca4 ctz.w \$a0, \$a1 + 14c: 000020a4 clo.d \$a0, \$a1 + 150: 000024a4 clz.d \$a0, \$a1 + 154: 000028a4 cto.d \$a0, \$a1 + 158: 00002ca4 ctz.d \$a0, \$a1 + 15c: 000030a4 revb.2h \$a0, \$a1 + 160: 000034a4 revb.4h \$a0, \$a1 + 164: 000038a4 revb.2w \$a0, \$a1 + 168: 00003ca4 revb.d \$a0, \$a1 + 16c: 000040a4 revh.2w \$a0, \$a1 + 170: 000044a4 revh.d \$a0, \$a1 + 174: 000048a4 bitrev.4b \$a0, \$a1 + 178: 00004ca4 bitrev.8b \$a0, \$a1 + 17c: 000050a4 bitrev.w \$a0, \$a1 + 180: 000054a4 bitrev.d \$a0, \$a1 + 184: 000058a4 ext.w.h \$a0, \$a1 + 188: 00005ca4 ext.w.b \$a0, \$a1 + 18c: 000060a4 rdtimel.w \$a0, \$a1 + 190: 000064a4 rdtimeh.w \$a0, \$a1 + 194: 000068a4 rdtime.d \$a0, \$a1 + 198: 00006ca4 cpucfg \$a0, \$a1 + 19c: 000118a0 asrtle.d \$a1, \$a2 + 1a0: 000198a0 asrtgt.d \$a1, \$a2 + 1a4: 000418a4 alsl.w \$a0, \$a1, \$a2, 0x1 + 1a8: 000598a4 alsl.w \$a0, \$a1, \$a2, 0x4 + 1ac: 000618a4 alsl.wu \$a0, \$a1, \$a2, 0x1 + 1b0: 000798a4 alsl.wu \$a0, \$a1, \$a2, 0x4 + 1b4: 000818a4 bytepick.w \$a0, \$a1, \$a2, 0x0 + 1b8: 000998a4 bytepick.w \$a0, \$a1, \$a2, 0x3 + 1bc: 000c18a4 bytepick.d \$a0, \$a1, \$a2, 0x0 + 1c0: 000f98a4 bytepick.d \$a0, \$a1, \$a2, 0x7 + 1c4: 001018a4 add.w \$a0, \$a1, \$a2 + 1c8: 001098a4 add.d \$a0, \$a1, \$a2 + 1cc: 001118a4 sub.w \$a0, \$a1, \$a2 + 1d0: 001198a4 sub.d \$a0, \$a1, \$a2 + 1d4: 001218a4 slt \$a0, \$a1, \$a2 + 1d8: 001298a4 sltu \$a0, \$a1, \$a2 + 1dc: 001318a4 maskeqz \$a0, \$a1, \$a2 + 1e0: 001398a4 masknez \$a0, \$a1, \$a2 + 1e4: 001418a4 nor \$a0, \$a1, \$a2 + 1e8: 001498a4 and \$a0, \$a1, \$a2 + 1ec: 001518a4 or \$a0, \$a1, \$a2 + 1f0: 001598a4 xor \$a0, \$a1, \$a2 + 1f4: 001618a4 orn \$a0, \$a1, \$a2 + 1f8: 001698a4 andn \$a0, \$a1, \$a2 + 1fc: 001718a4 sll.w \$a0, \$a1, \$a2 + 200: 001798a4 srl.w \$a0, \$a1, \$a2 + 204: 001818a4 sra.w \$a0, \$a1, \$a2 + 208: 001898a4 sll.d \$a0, \$a1, \$a2 + 20c: 001918a4 srl.d \$a0, \$a1, \$a2 + 210: 001998a4 sra.d \$a0, \$a1, \$a2 + 214: 001b18a4 rotr.w \$a0, \$a1, \$a2 + 218: 001b98a4 rotr.d \$a0, \$a1, \$a2 + 21c: 001c18a4 mul.w \$a0, \$a1, \$a2 + 220: 001c98a4 mulh.w \$a0, \$a1, \$a2 + 224: 001d18a4 mulh.wu \$a0, \$a1, \$a2 + 228: 001d98a4 mul.d \$a0, \$a1, \$a2 + 22c: 001e18a4 mulh.d \$a0, \$a1, \$a2 + 230: 001e98a4 mulh.du \$a0, \$a1, \$a2 + 234: 001f18a4 mulw.d.w \$a0, \$a1, \$a2 + 238: 001f98a4 mulw.d.wu \$a0, \$a1, \$a2 + 23c: 002018a4 div.w \$a0, \$a1, \$a2 + 240: 002098a4 mod.w \$a0, \$a1, \$a2 + 244: 002118a4 div.wu \$a0, \$a1, \$a2 + 248: 002198a4 mod.wu \$a0, \$a1, \$a2 + 24c: 002218a4 div.d \$a0, \$a1, \$a2 + 250: 002298a4 mod.d \$a0, \$a1, \$a2 + 254: 002318a4 div.du \$a0, \$a1, \$a2 + 258: 002398a4 mod.du \$a0, \$a1, \$a2 + 25c: 002418a4 crc.w.b.w \$a0, \$a1, \$a2 + 260: 002498a4 crc.w.h.w \$a0, \$a1, \$a2 + 264: 002518a4 crc.w.w.w \$a0, \$a1, \$a2 + 268: 002598a4 crc.w.d.w \$a0, \$a1, \$a2 + 26c: 002618a4 crcc.w.b.w \$a0, \$a1, \$a2 + 270: 002698a4 crcc.w.h.w \$a0, \$a1, \$a2 + 274: 002718a4 crcc.w.w.w \$a0, \$a1, \$a2 + 278: 002798a4 crcc.w.d.w \$a0, \$a1, \$a2 + 27c: 002a0000 break 0x0 + 280: 002a7fff break 0x7fff + 284: 002a8000 dbcl 0x0 + 288: 002affff dbcl 0x7fff + 28c: 002c18a4 alsl.d \$a0, \$a1, \$a2, 0x1 + 290: 002d98a4 alsl.d \$a0, \$a1, \$a2, 0x4 + 294: 004080a4 slli.w \$a0, \$a1, 0x0 + 298: 004084a4 slli.w \$a0, \$a1, 0x1 + 29c: 0040fca4 slli.w \$a0, \$a1, 0x1f + 2a0: 004100a4 slli.d \$a0, \$a1, 0x0 + 2a4: 004104a4 slli.d \$a0, \$a1, 0x1 + 2a8: 0041fca4 slli.d \$a0, \$a1, 0x3f + 2ac: 004480a4 srli.w \$a0, \$a1, 0x0 + 2b0: 004484a4 srli.w \$a0, \$a1, 0x1 + 2b4: 0044fca4 srli.w \$a0, \$a1, 0x1f + 2b8: 004500a4 srli.d \$a0, \$a1, 0x0 + 2bc: 004504a4 srli.d \$a0, \$a1, 0x1 + 2c0: 0045fca4 srli.d \$a0, \$a1, 0x3f + 2c4: 004880a4 srai.w \$a0, \$a1, 0x0 + 2c8: 004884a4 srai.w \$a0, \$a1, 0x1 + 2cc: 0048fca4 srai.w \$a0, \$a1, 0x1f + 2d0: 004900a4 srai.d \$a0, \$a1, 0x0 + 2d4: 004904a4 srai.d \$a0, \$a1, 0x1 + 2d8: 0049fca4 srai.d \$a0, \$a1, 0x3f + 2dc: 004c80a4 rotri.w \$a0, \$a1, 0x0 + 2e0: 004c84a4 rotri.w \$a0, \$a1, 0x1 + 2e4: 004cfca4 rotri.w \$a0, \$a1, 0x1f + 2e8: 004d00a4 rotri.d \$a0, \$a1, 0x0 + 2ec: 004d04a4 rotri.d \$a0, \$a1, 0x1 + 2f0: 004dfca4 rotri.d \$a0, \$a1, 0x3f + 2f4: 006000a4 bstrins.w \$a0, \$a1, 0x0, 0x0 + 2f8: 006204a4 bstrins.w \$a0, \$a1, 0x2, 0x1 + 2fc: 007f00a4 bstrins.w \$a0, \$a1, 0x1f, 0x0 + 300: 006080a4 bstrpick.w \$a0, \$a1, 0x0, 0x0 + 304: 006284a4 bstrpick.w \$a0, \$a1, 0x2, 0x1 + 308: 007f80a4 bstrpick.w \$a0, \$a1, 0x1f, 0x0 + 30c: 008000a4 bstrins.d \$a0, \$a1, 0x0, 0x0 + 310: 009f04a4 bstrins.d \$a0, \$a1, 0x1f, 0x1 + 314: 00a000a4 bstrins.d \$a0, \$a1, 0x20, 0x0 + 318: 00bf00a4 bstrins.d \$a0, \$a1, 0x3f, 0x0 + 31c: 00c000a4 bstrpick.d \$a0, \$a1, 0x0, 0x0 + 320: 00df04a4 bstrpick.d \$a0, \$a1, 0x1f, 0x1 + 324: 00e000a4 bstrpick.d \$a0, \$a1, 0x20, 0x0 + 328: 00ff00a4 bstrpick.d \$a0, \$a1, 0x3f, 0x0 + 32c: 200000a4 ll.w \$a0, \$a1, 0 + 330: 203ffca4 ll.w \$a0, \$a1, 16380 + 334: 210000a4 sc.w \$a0, \$a1, 0 + 338: 213ffca4 sc.w \$a0, \$a1, 16380 + 33c: 220000a4 ll.d \$a0, \$a1, 0 + 340: 223ffca4 ll.d \$a0, \$a1, 16380 + 344: 230000a4 sc.d \$a0, \$a1, 0 + 348: 233ffca4 sc.d \$a0, \$a1, 16380 + 34c: 240000a4 ldptr.w \$a0, \$a1, 0 + 350: 243ffca4 ldptr.w \$a0, \$a1, 16380 + 354: 250000a4 stptr.w \$a0, \$a1, 0 + 358: 253ffca4 stptr.w \$a0, \$a1, 16380 + 35c: 260000a4 ldptr.d \$a0, \$a1, 0 + 360: 263ffca4 ldptr.d \$a0, \$a1, 16380 + 364: 270000a4 stptr.d \$a0, \$a1, 0 + 368: 273ffca4 stptr.d \$a0, \$a1, 16380 + 36c: 280000a4 ld.b \$a0, \$a1, 0 + 370: 281ffca4 ld.b \$a0, \$a1, 2047 + 374: 282004a4 ld.b \$a0, \$a1, -2047 + 378: 284000a4 ld.h \$a0, \$a1, 0 + 37c: 285ffca4 ld.h \$a0, \$a1, 2047 + 380: 286004a4 ld.h \$a0, \$a1, -2047 + 384: 288000a4 ld.w \$a0, \$a1, 0 + 388: 289ffca4 ld.w \$a0, \$a1, 2047 + 38c: 28a004a4 ld.w \$a0, \$a1, -2047 + 390: 28c000a4 ld.d \$a0, \$a1, 0 + 394: 28dffca4 ld.d \$a0, \$a1, 2047 + 398: 28e004a4 ld.d \$a0, \$a1, -2047 + 39c: 290000a4 st.b \$a0, \$a1, 0 + 3a0: 291ffca4 st.b \$a0, \$a1, 2047 + 3a4: 292004a4 st.b \$a0, \$a1, -2047 + 3a8: 294000a4 st.h \$a0, \$a1, 0 + 3ac: 295ffca4 st.h \$a0, \$a1, 2047 + 3b0: 296004a4 st.h \$a0, \$a1, -2047 + 3b4: 298000a4 st.w \$a0, \$a1, 0 + 3b8: 299ffca4 st.w \$a0, \$a1, 2047 + 3bc: 29a004a4 st.w \$a0, \$a1, -2047 + 3c0: 29c000a4 st.d \$a0, \$a1, 0 + 3c4: 29dffca4 st.d \$a0, \$a1, 2047 + 3c8: 29e004a4 st.d \$a0, \$a1, -2047 + 3cc: 2a0000a4 ld.bu \$a0, \$a1, 0 + 3d0: 2a1ffca4 ld.bu \$a0, \$a1, 2047 + 3d4: 2a2004a4 ld.bu \$a0, \$a1, -2047 + 3d8: 2a4000a4 ld.hu \$a0, \$a1, 0 + 3dc: 2a5ffca4 ld.hu \$a0, \$a1, 2047 + 3e0: 2a6004a4 ld.hu \$a0, \$a1, -2047 + 3e4: 2a8000a4 ld.wu \$a0, \$a1, 0 + 3e8: 2a9ffca4 ld.wu \$a0, \$a1, 2047 + 3ec: 2aa004a4 ld.wu \$a0, \$a1, -2047 + 3f0: 2ac000a0 preld 0x0, \$a1, 0 + 3f4: 2adffcbf preld 0x1f, \$a1, 2047 + 3f8: 2ae004bf preld 0x1f, \$a1, -2047 + 3fc: 380018a4 ldx.b \$a0, \$a1, \$a2 + 400: 380418a4 ldx.h \$a0, \$a1, \$a2 + 404: 380818a4 ldx.w \$a0, \$a1, \$a2 + 408: 380c18a4 ldx.d \$a0, \$a1, \$a2 + 40c: 381018a4 stx.b \$a0, \$a1, \$a2 + 410: 381418a4 stx.h \$a0, \$a1, \$a2 + 414: 381818a4 stx.w \$a0, \$a1, \$a2 + 418: 381c18a4 stx.d \$a0, \$a1, \$a2 + 41c: 382018a4 ldx.bu \$a0, \$a1, \$a2 + 420: 382418a4 ldx.hu \$a0, \$a1, \$a2 + 424: 382818a4 ldx.wu \$a0, \$a1, \$a2 + 428: 382c18a0 preldx 0x0, \$a1, \$a2 + 42c: 382c18bf preldx 0x1f, \$a1, \$a2 + 430: 38720000 dbar 0x0 + 434: 38727fff dbar 0x7fff + 438: 38728000 ibar 0x0 + 43c: 3872ffff ibar 0x7fff + 440: 386014c4 amswap.w \$a0, \$a1, \$a2 + 444: 386018a4 amswap.w \$a0, \$a2, \$a1 + 448: 386094c4 amswap.d \$a0, \$a1, \$a2 + 44c: 386098a4 amswap.d \$a0, \$a2, \$a1 + 450: 386114c4 amadd.w \$a0, \$a1, \$a2 + 454: 386118a4 amadd.w \$a0, \$a2, \$a1 + 458: 386194c4 amadd.d \$a0, \$a1, \$a2 + 45c: 386198a4 amadd.d \$a0, \$a2, \$a1 + 460: 386214c4 amand.w \$a0, \$a1, \$a2 + 464: 386218a4 amand.w \$a0, \$a2, \$a1 + 468: 386294c4 amand.d \$a0, \$a1, \$a2 + 46c: 386298a4 amand.d \$a0, \$a2, \$a1 + 470: 386314c4 amor.w \$a0, \$a1, \$a2 + 474: 386318a4 amor.w \$a0, \$a2, \$a1 + 478: 386394c4 amor.d \$a0, \$a1, \$a2 + 47c: 386398a4 amor.d \$a0, \$a2, \$a1 + 480: 386414c4 amxor.w \$a0, \$a1, \$a2 + 484: 386418a4 amxor.w \$a0, \$a2, \$a1 + 488: 386494c4 amxor.d \$a0, \$a1, \$a2 + 48c: 386498a4 amxor.d \$a0, \$a2, \$a1 + 490: 386514c4 ammax.w \$a0, \$a1, \$a2 + 494: 386518a4 ammax.w \$a0, \$a2, \$a1 + 498: 386594c4 ammax.d \$a0, \$a1, \$a2 + 49c: 386598a4 ammax.d \$a0, \$a2, \$a1 + 4a0: 386614c4 ammin.w \$a0, \$a1, \$a2 + 4a4: 386618a4 ammin.w \$a0, \$a2, \$a1 + 4a8: 386694c4 ammin.d \$a0, \$a1, \$a2 + 4ac: 386698a4 ammin.d \$a0, \$a2, \$a1 + 4b0: 386714c4 ammax.wu \$a0, \$a1, \$a2 + 4b4: 386718a4 ammax.wu \$a0, \$a2, \$a1 + 4b8: 386794c4 ammax.du \$a0, \$a1, \$a2 + 4bc: 386798a4 ammax.du \$a0, \$a2, \$a1 + 4c0: 386814c4 ammin.wu \$a0, \$a1, \$a2 + 4c4: 386818a4 ammin.wu \$a0, \$a2, \$a1 + 4c8: 386894c4 ammin.du \$a0, \$a1, \$a2 + 4cc: 386898a4 ammin.du \$a0, \$a2, \$a1 + 4d0: 386914c4 amswap_db.w \$a0, \$a1, \$a2 + 4d4: 386918a4 amswap_db.w \$a0, \$a2, \$a1 + 4d8: 386994c4 amswap_db.d \$a0, \$a1, \$a2 + 4dc: 386998a4 amswap_db.d \$a0, \$a2, \$a1 + 4e0: 386a14c4 amadd_db.w \$a0, \$a1, \$a2 + 4e4: 386a18a4 amadd_db.w \$a0, \$a2, \$a1 + 4e8: 386a94c4 amadd_db.d \$a0, \$a1, \$a2 + 4ec: 386a98a4 amadd_db.d \$a0, \$a2, \$a1 + 4f0: 386b14c4 amand_db.w \$a0, \$a1, \$a2 + 4f4: 386b18a4 amand_db.w \$a0, \$a2, \$a1 + 4f8: 386b94c4 amand_db.d \$a0, \$a1, \$a2 + 4fc: 386b98a4 amand_db.d \$a0, \$a2, \$a1 + 500: 386c14c4 amor_db.w \$a0, \$a1, \$a2 + 504: 386c18a4 amor_db.w \$a0, \$a2, \$a1 + 508: 386c94c4 amor_db.d \$a0, \$a1, \$a2 + 50c: 386c98a4 amor_db.d \$a0, \$a2, \$a1 + 510: 386d14c4 amxor_db.w \$a0, \$a1, \$a2 + 514: 386d18a4 amxor_db.w \$a0, \$a2, \$a1 + 518: 386d94c4 amxor_db.d \$a0, \$a1, \$a2 + 51c: 386d98a4 amxor_db.d \$a0, \$a2, \$a1 + 520: 386e14c4 ammax_db.w \$a0, \$a1, \$a2 + 524: 386e18a4 ammax_db.w \$a0, \$a2, \$a1 + 528: 386e94c4 ammax_db.d \$a0, \$a1, \$a2 + 52c: 386e98a4 ammax_db.d \$a0, \$a2, \$a1 + 530: 386f14c4 ammin_db.w \$a0, \$a1, \$a2 + 534: 386f18a4 ammin_db.w \$a0, \$a2, \$a1 + 538: 386f94c4 ammin_db.d \$a0, \$a1, \$a2 + 53c: 386f98a4 ammin_db.d \$a0, \$a2, \$a1 + 540: 387014c4 ammax_db.wu \$a0, \$a1, \$a2 + 544: 387018a4 ammax_db.wu \$a0, \$a2, \$a1 + 548: 387094c4 ammax_db.du \$a0, \$a1, \$a2 + 54c: 387098a4 ammax_db.du \$a0, \$a2, \$a1 + 550: 387114c4 ammin_db.wu \$a0, \$a1, \$a2 + 554: 387118a4 ammin_db.wu \$a0, \$a2, \$a1 + 558: 387194c4 ammin_db.du \$a0, \$a1, \$a2 + 55c: 387198a4 ammin_db.du \$a0, \$a2, \$a1 + 560: 387818a4 ldgt.b \$a0, \$a1, \$a2 + 564: 387898a4 ldgt.h \$a0, \$a1, \$a2 + 568: 387918a4 ldgt.w \$a0, \$a1, \$a2 + 56c: 387998a4 ldgt.d \$a0, \$a1, \$a2 + 570: 387a18a4 ldle.b \$a0, \$a1, \$a2 + 574: 387a98a4 ldle.h \$a0, \$a1, \$a2 + 578: 387b18a4 ldle.w \$a0, \$a1, \$a2 + 57c: 387b98a4 ldle.d \$a0, \$a1, \$a2 + 580: 387c18a4 stgt.b \$a0, \$a1, \$a2 + 584: 387c98a4 stgt.h \$a0, \$a1, \$a2 + 588: 387d18a4 stgt.w \$a0, \$a1, \$a2 + 58c: 387d98a4 stgt.d \$a0, \$a1, \$a2 + 590: 387e18a4 stle.b \$a0, \$a1, \$a2 + 594: 387e98a4 stle.h \$a0, \$a1, \$a2 + 598: 387f18a4 stle.w \$a0, \$a1, \$a2 + 59c: 387f98a4 stle.d \$a0, \$a1, \$a2 + 5a0: 385714c4 sc.q \$a0, \$a1, \$a2 + 5a4: 385714c4 sc.q \$a0, \$a1, \$a2 + 5a8: 385780a4 llacq.w \$a0, \$a1 + 5ac: 385780a4 llacq.w \$a0, \$a1 + 5b0: 385784a4 screl.w \$a0, \$a1 + 5b4: 385784a4 screl.w \$a0, \$a1 + 5b8: 385788a4 llacq.d \$a0, \$a1 + 5bc: 385788a4 llacq.d \$a0, \$a1 + 5c0: 38578ca4 screl.d \$a0, \$a1 + 5c4: 38578ca4 screl.d \$a0, \$a1 + 5c8: 385814c4 amcas.b \$a0, \$a1, \$a2 + 5cc: 385818a4 amcas.b \$a0, \$a2, \$a1 + 5d0: 385894c4 amcas.h \$a0, \$a1, \$a2 + 5d4: 385898a4 amcas.h \$a0, \$a2, \$a1 + 5d8: 385914c4 amcas.w \$a0, \$a1, \$a2 + 5dc: 385918a4 amcas.w \$a0, \$a2, \$a1 + 5e0: 385994c4 amcas.d \$a0, \$a1, \$a2 + 5e4: 385998a4 amcas.d \$a0, \$a2, \$a1 + 5e8: 385a14c4 amcas_db.b \$a0, \$a1, \$a2 + 5ec: 385a18a4 amcas_db.b \$a0, \$a2, \$a1 + 5f0: 385a94c4 amcas_db.h \$a0, \$a1, \$a2 + 5f4: 385a98a4 amcas_db.h \$a0, \$a2, \$a1 + 5f8: 385b14c4 amcas_db.w \$a0, \$a1, \$a2 + 5fc: 385b18a4 amcas_db.w \$a0, \$a2, \$a1 + 600: 385b94c4 amcas_db.d \$a0, \$a1, \$a2 + 604: 385b98a4 amcas_db.d \$a0, \$a2, \$a1 + 608: 385c14c4 amswap.b \$a0, \$a1, \$a2 + 60c: 385c18a4 amswap.b \$a0, \$a2, \$a1 + 610: 385c94c4 amswap.h \$a0, \$a1, \$a2 + 614: 385c98a4 amswap.h \$a0, \$a2, \$a1 + 618: 385d14c4 amadd.b \$a0, \$a1, \$a2 + 61c: 385d18a4 amadd.b \$a0, \$a2, \$a1 + 620: 385d94c4 amadd.h \$a0, \$a1, \$a2 + 624: 385d98a4 amadd.h \$a0, \$a2, \$a1 + 628: 385e14c4 amswap_db.b \$a0, \$a1, \$a2 + 62c: 385e18a4 amswap_db.b \$a0, \$a2, \$a1 + 630: 385e94c4 amswap_db.h \$a0, \$a1, \$a2 + 634: 385e98a4 amswap_db.h \$a0, \$a2, \$a1 + 638: 385f14c4 amadd_db.b \$a0, \$a1, \$a2 + 63c: 385f18a4 amadd_db.b \$a0, \$a2, \$a1 + 640: 385f94c4 amadd_db.h \$a0, \$a1, \$a2 + 644: 385f98a4 amadd_db.h \$a0, \$a2, \$a1 + +0+648 <.L1>: + 648: 03400000 andi \$zero, \$zero, 0x0 + 64c: 43fffc9f beqz \$a0, -4 # 648 <.L1> + 650: 47fff89f bnez \$a0, -8 # 648 <.L1> + 654: 53fff7ff b -12 # 648 <.L1> + 658: 57fff3ff bl -16 # 648 <.L1> + 65c: 5bffec85 beq \$a0, \$a1, -20 # 648 <.L1> + 660: 5fffe885 bne \$a0, \$a1, -24 # 648 <.L1> + 664: 63ffe485 blt \$a0, \$a1, -28 # 648 <.L1> + 668: 63ffe0a4 blt \$a1, \$a0, -32 # 648 <.L1> + 66c: 67ffdc85 bge \$a0, \$a1, -36 # 648 <.L1> + 670: 67ffd8a4 bge \$a1, \$a0, -40 # 648 <.L1> + 674: 6bffd485 bltu \$a0, \$a1, -44 # 648 <.L1> + 678: 6bffd0a4 bltu \$a1, \$a0, -48 # 648 <.L1> + 67c: 6fffcc85 bgeu \$a0, \$a1, -52 # 648 <.L1> + 680: 6fffc8a4 bgeu \$a1, \$a0, -56 # 648 <.L1> + 684: 4c000080 jirl \$zero, \$a0, 0 diff --git a/gas/testsuite/gas/loongarch/insn_int64.s b/gas/testsuite/gas/loongarch/insn_int64.s new file mode 100644 index 00000000000..f80895178d4 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_int64.s @@ -0,0 +1,440 @@ +# imm_op +slti $r4,$r5,0 +slti $r4,$r5,0x7ff +slti $r4,$r5,-0x7ff +sltui $r4,$r5,0 +sltui $r4,$r5,0x7ff +sltui $r4,$r5,-0x7ff +addi.w $r4,$r5,0 +addi.w $r4,$r5,0x7ff +addi.w $r4,$r5,-0x7ff +addi.d $r4,$r5,0 +addi.d $r4,$r5,0x7ff +addi.d $r4,$r5,-0x7ff +lu52i.d $r4,$r5,0 +lu52i.d $r4,$r5,0x7ff +lu52i.d $r4,$r5,-0x7ff +andi $r4,$r5,0 +andi $r4,$r5,0x7ff +ori $r4,$r5,0 +ori $r4,$r5,0x7ff +xori $r4,$r5,0 +xori $r4,$r5,0x7ff +addu16i.d $r4,$r5,0 +addu16i.d $r4,$r5,0x7fff +addu16i.d $r4,$r5,-0x7fff +lu12i.w $r4,0 +lu12i.w $r4,0x7ffff +lu32i.d $r4,-0x7ffff +pcaddi $r4,0 +pcaddi $r4,0x7ffff +pcaddi $r4,-0x80000 +pcalau12i $r4,0 +pcalau12i $r4,0x7ffff +pcalau12i $r4,-0x7ffff +pcaddu12i $r4,0 +pcaddu12i $r4,0x7ffff +pcaddu12i $r4,-0x7ffff +pcaddu18i $r4,0 +pcaddu18i $r4,0x7ffff +pcaddu18i $r4,-0x7ffff + +# imm_ins +.equ a, 0x123 +.equ b, 0xfffff00000 +.equ c, 0xfffffffffff +.equ d, 2 +.equ e,0x100 + +alsl.w $r11,$r12,$r13,d +alsl.wu $r11,$r12,$r13,d +bytepick.w $r11,$r12,$r13,d +bytepick.d $r11,$r12,$r13,d + +break d +dbcl d +syscall d + +alsl.d $r11,$r12, $r13,d +slli.w $r11,$r12,d +slli.d $r11,$r12,d +srli.w $r11,$r12,d +srli.d $r12,$r13,d +srai.w $r12,$r13,d +srai.d $r12,$r13,d + +bstrins.w $r12,$r13,d,d +bstrins.d $r12,$r13,d,d +bstrpick.d $r12,$r13,d,d +bstrpick.d $r12,$r13,d,d + +slti $r12,$r13,a +sltui $r12,$r13,a +addi.w $r12,$r13,a +addi.d $r12,$r13,a +lu52i.d $r12,$r13,a +andi $r12,$r13,d +ori $r12,$r13,d +xori $r12,$r13,d +addu16i.d $r12,$r13,d +lu12i.w $r12,a +lu32i.d $r12,a +pcaddi $r12,a +pcalau12i $r12,a +pcaddu12i $r12,a +pcaddu18i $r12,a + +csrrd $r12,a +csrwr $r12,a +csrxchg $r12,$r13,d +cacop d,$r13,d +lddir $r12,$r13,d +ldpte $r12,d + +invtlb d,$r13,$r14 + +# fix_op +clo.w $r4,$r5 +clz.w $r4,$r5 +cto.w $r4,$r5 +ctz.w $r4,$r5 +clo.d $r4,$r5 +clz.d $r4,$r5 +cto.d $r4,$r5 +ctz.d $r4,$r5 +revb.2h $r4,$r5 +revb.4h $r4,$r5 +revb.2w $r4,$r5 +revb.d $r4,$r5 +revh.2w $r4,$r5 +revh.d $r4,$r5 +bitrev.4b $r4,$r5 +bitrev.8b $r4,$r5 +bitrev.w $r4,$r5 +bitrev.d $r4,$r5 +ext.w.h $r4,$r5 +ext.w.b $r4,$r5 +rdtimel.w $r4,$r5 +rdtimeh.w $r4,$r5 +rdtime.d $r4,$r5 +cpucfg $r4,$r5 +asrtle.d $r5,$r6 +asrtgt.d $r5,$r6 +alsl.w $r4,$r5,$r6,1 +alsl.w $r4,$r5,$r6,4 +alsl.wu $r4,$r5,$r6,1 +alsl.wu $r4,$r5,$r6,4 +bytepick.w $r4,$r5,$r6,0 +bytepick.w $r4,$r5,$r6,3 +bytepick.d $r4,$r5,$r6,0 +bytepick.d $r4,$r5,$r6,7 +add.w $r4,$r5,$r6 +add.d $r4,$r5,$r6 +sub.w $r4,$r5,$r6 +sub.d $r4,$r5,$r6 +slt $r4,$r5,$r6 +sltu $r4,$r5,$r6 +maskeqz $r4,$r5,$r6 +masknez $r4,$r5,$r6 +nor $r4,$r5,$r6 +and $r4,$r5,$r6 +or $r4,$r5,$r6 +xor $r4,$r5,$r6 +orn $r4,$r5,$r6 +andn $r4,$r5,$r6 + +# load_store +sll.w $r4,$r5,$r6 +srl.w $r4,$r5,$r6 +sra.w $r4,$r5,$r6 +sll.d $r4,$r5,$r6 +srl.d $r4,$r5,$r6 +sra.d $r4,$r5,$r6 +rotr.w $r4,$r5,$r6 +rotr.d $r4,$r5,$r6 +mul.w $r4,$r5,$r6 +mulh.w $r4,$r5,$r6 +mulh.wu $r4,$r5,$r6 +mul.d $r4,$r5,$r6 +mulh.d $r4,$r5,$r6 +mulh.du $r4,$r5,$r6 +mulw.d.w $r4,$r5,$r6 +mulw.d.wu $r4,$r5,$r6 +div.w $r4,$r5,$r6 +mod.w $r4,$r5,$r6 +div.wu $r4,$r5,$r6 +mod.wu $r4,$r5,$r6 +div.d $r4,$r5,$r6 +mod.d $r4,$r5,$r6 +div.du $r4,$r5,$r6 +mod.du $r4,$r5,$r6 +crc.w.b.w $r4,$r5,$r6 +crc.w.h.w $r4,$r5,$r6 +crc.w.w.w $r4,$r5,$r6 +crc.w.d.w $r4,$r5,$r6 +crcc.w.b.w $r4,$r5,$r6 +crcc.w.h.w $r4,$r5,$r6 +crcc.w.w.w $r4,$r5,$r6 +crcc.w.d.w $r4,$r5,$r6 +break 0 +break 0x7fff +dbcl 0 +dbcl 0x7fff +alsl.d $r4,$r5,$r6,1 +alsl.d $r4,$r5,$r6,4 +slli.w $r4,$r5,0 +slli.w $r4,$r5,1 +slli.w $r4,$r5,0x1f +slli.d $r4,$r5,0 +slli.d $r4,$r5,1 +slli.d $r4,$r5,0x3f +srli.w $r4,$r5,0 +srli.w $r4,$r5,1 +srli.w $r4,$r5,0x1f +srli.d $r4,$r5,0 +srli.d $r4,$r5,1 +srli.d $r4,$r5,0x3f +srai.w $r4,$r5,0 +srai.w $r4,$r5,1 +srai.w $r4,$r5,0x1f +srai.d $r4,$r5,0 +srai.d $r4,$r5,1 +srai.d $r4,$r5,0x3f +rotri.w $r4,$r5,0 +rotri.w $r4,$r5,1 +rotri.w $r4,$r5,0x1f +rotri.d $r4,$r5,0 +rotri.d $r4,$r5,1 +rotri.d $r4,$r5,0x3f +bstrins.w $r4,$r5,0,0 +bstrins.w $r4,$r5,2,1 +bstrins.w $r4,$r5,31,0 +bstrpick.w $r4,$r5,0,0 +bstrpick.w $r4,$r5,2,1 +bstrpick.w $r4,$r5,31,0 +bstrins.d $r4,$r5,0,0 +bstrins.d $r4,$r5,31,1 +bstrins.d $r4,$r5,32,0 +bstrins.d $r4,$r5,63,0 +bstrpick.d $r4,$r5,0,0 +bstrpick.d $r4,$r5,31,1 +bstrpick.d $r4,$r5,32,0 +bstrpick.d $r4,$r5,63,0 +ll.w $r4,$r5,0 +ll.w $r4,$r5,0x3ffc +sc.w $r4,$r5,0 +sc.w $r4,$r5,0x3ffc +ll.d $r4,$r5,0 +ll.d $r4,$r5,0x3ffc +sc.d $r4,$r5,0 +sc.d $r4,$r5,0x3ffc +ldptr.w $r4,$r5,0 +ldptr.w $r4,$r5,0x3ffc +stptr.w $r4,$r5,0 +stptr.w $r4,$r5,0x3ffc +ldptr.d $r4,$r5,0 +ldptr.d $r4,$r5,0x3ffc +stptr.d $r4,$r5,0 +stptr.d $r4,$r5,0x3ffc +ld.b $r4,$r5,0 +ld.b $r4,$r5,0x7ff +ld.b $r4,$r5,-0x7ff +ld.h $r4,$r5,0 +ld.h $r4,$r5,0x7ff +ld.h $r4,$r5,-0x7ff +ld.w $r4,$r5,0 +ld.w $r4,$r5,0x7ff +ld.w $r4,$r5,-0x7ff +ld.d $r4,$r5,0 +ld.d $r4,$r5,0x7ff +ld.d $r4,$r5,-0x7ff +st.b $r4,$r5,0 +st.b $r4,$r5,0x7ff +st.b $r4,$r5,-0x7ff +st.h $r4,$r5,0 +st.h $r4,$r5,0x7ff +st.h $r4,$r5,-0x7ff +st.w $r4,$r5,0 +st.w $r4,$r5,0x7ff +st.w $r4,$r5,-0x7ff +st.d $r4,$r5,0 +st.d $r4,$r5,0x7ff +st.d $r4,$r5,-0x7ff +ld.bu $r4,$r5,0 +ld.bu $r4,$r5,0x7ff +ld.bu $r4,$r5,-0x7ff +ld.hu $r4,$r5,0 +ld.hu $r4,$r5,0x7ff +ld.hu $r4,$r5,-0x7ff +ld.wu $r4,$r5,0 +ld.wu $r4,$r5,0x7ff +ld.wu $r4,$r5,-0x7ff +preld 0,$r5,0 +preld 31,$r5,0x7ff +preld 31,$r5,-0x7ff +ldx.b $r4,$r5,$r6 +ldx.h $r4,$r5,$r6 +ldx.w $r4,$r5,$r6 +ldx.d $r4,$r5,$r6 +stx.b $r4,$r5,$r6 +stx.h $r4,$r5,$r6 +stx.w $r4,$r5,$r6 +stx.d $r4,$r5,$r6 +ldx.bu $r4,$r5,$r6 +ldx.hu $r4,$r5,$r6 +ldx.wu $r4,$r5,$r6 +preldx 0,$r5,$r6 +preldx 31,$r5,$r6 +dbar 0 +dbar 0x7fff +ibar 0 +ibar 0x7fff +amswap.w $r4,$r5,$r6,0 +amswap.w $r4,$r6,$r5 +amswap.d $r4,$r5,$r6,0 +amswap.d $r4,$r6,$r5 +amadd.w $r4,$r5,$r6,0 +amadd.w $r4,$r6,$r5 +amadd.d $r4,$r5,$r6,0 +amadd.d $r4,$r6,$r5 +amand.w $r4,$r5,$r6,0 +amand.w $r4,$r6,$r5 +amand.d $r4,$r5,$r6,0 +amand.d $r4,$r6,$r5 +amor.w $r4,$r5,$r6,0 +amor.w $r4,$r6,$r5 +amor.d $r4,$r5,$r6,0 +amor.d $r4,$r6,$r5 +amxor.w $r4,$r5,$r6,0 +amxor.w $r4,$r6,$r5 +amxor.d $r4,$r5,$r6,0 +amxor.d $r4,$r6,$r5 +ammax.w $r4,$r5,$r6,0 +ammax.w $r4,$r6,$r5 +ammax.d $r4,$r5,$r6,0 +ammax.d $r4,$r6,$r5 +ammin.w $r4,$r5,$r6,0 +ammin.w $r4,$r6,$r5 +ammin.d $r4,$r5,$r6,0 +ammin.d $r4,$r6,$r5 +ammax.wu $r4,$r5,$r6,0 +ammax.wu $r4,$r6,$r5 +ammax.du $r4,$r5,$r6,0 +ammax.du $r4,$r6,$r5 +ammin.wu $r4,$r5,$r6,0 +ammin.wu $r4,$r6,$r5 +ammin.du $r4,$r5,$r6,0 +ammin.du $r4,$r6,$r5 +amswap_db.w $r4,$r5,$r6,0 +amswap_db.w $r4,$r6,$r5 +amswap_db.d $r4,$r5,$r6,0 +amswap_db.d $r4,$r6,$r5 +amadd_db.w $r4,$r5,$r6,0 +amadd_db.w $r4,$r6,$r5 +amadd_db.d $r4,$r5,$r6,0 +amadd_db.d $r4,$r6,$r5 +amand_db.w $r4,$r5,$r6,0 +amand_db.w $r4,$r6,$r5 +amand_db.d $r4,$r5,$r6,0 +amand_db.d $r4,$r6,$r5 +amor_db.w $r4,$r5,$r6,0 +amor_db.w $r4,$r6,$r5 +amor_db.d $r4,$r5,$r6,0 +amor_db.d $r4,$r6,$r5 +amxor_db.w $r4,$r5,$r6,0 +amxor_db.w $r4,$r6,$r5 +amxor_db.d $r4,$r5,$r6,0 +amxor_db.d $r4,$r6,$r5 +ammax_db.w $r4,$r5,$r6,0 +ammax_db.w $r4,$r6,$r5 +ammax_db.d $r4,$r5,$r6,0 +ammax_db.d $r4,$r6,$r5 +ammin_db.w $r4,$r5,$r6,0 +ammin_db.w $r4,$r6,$r5 +ammin_db.d $r4,$r5,$r6,0 +ammin_db.d $r4,$r6,$r5 +ammax_db.wu $r4,$r5,$r6,0 +ammax_db.wu $r4,$r6,$r5 +ammax_db.du $r4,$r5,$r6,0 +ammax_db.du $r4,$r6,$r5 +ammin_db.wu $r4,$r5,$r6,0 +ammin_db.wu $r4,$r6,$r5 +ammin_db.du $r4,$r5,$r6,0 +ammin_db.du $r4,$r6,$r5 +ldgt.b $r4,$r5,$r6 +ldgt.h $r4,$r5,$r6 +ldgt.w $r4,$r5,$r6 +ldgt.d $r4,$r5,$r6 +ldle.b $r4,$r5,$r6 +ldle.h $r4,$r5,$r6 +ldle.w $r4,$r5,$r6 +ldle.d $r4,$r5,$r6 +stgt.b $r4,$r5,$r6 +stgt.h $r4,$r5,$r6 +stgt.w $r4,$r5,$r6 +stgt.d $r4,$r5,$r6 +stle.b $r4,$r5,$r6 +stle.h $r4,$r5,$r6 +stle.w $r4,$r5,$r6 +stle.d $r4,$r5,$r6 +sc.q $r4,$r5,$r6,0 +sc.q $r4,$r5,$r6 +llacq.w $r4,$r5,0 +llacq.w $r4,$r5 +screl.w $r4,$r5,0 +screl.w $r4,$r5 +llacq.d $r4,$r5,0 +llacq.d $r4,$r5 +screl.d $r4,$r5,0 +screl.d $r4,$r5 +amcas.b $r4,$r5,$r6,0 +amcas.b $r4,$r6,$r5 +amcas.h $r4,$r5,$r6,0 +amcas.h $r4,$r6,$r5 +amcas.w $r4,$r5,$r6,0 +amcas.w $r4,$r6,$r5 +amcas.d $r4,$r5,$r6,0 +amcas.d $r4,$r6,$r5 +amcas_db.b $r4,$r5,$r6,0 +amcas_db.b $r4,$r6,$r5 +amcas_db.h $r4,$r5,$r6,0 +amcas_db.h $r4,$r6,$r5 +amcas_db.w $r4,$r5,$r6,0 +amcas_db.w $r4,$r6,$r5 +amcas_db.d $r4,$r5,$r6,0 +amcas_db.d $r4,$r6,$r5 +amswap.b $r4,$r5,$r6,0 +amswap.b $r4,$r6,$r5 +amswap.h $r4,$r5,$r6,0 +amswap.h $r4,$r6,$r5 +amadd.b $r4,$r5,$r6,0 +amadd.b $r4,$r6,$r5 +amadd.h $r4,$r5,$r6,0 +amadd.h $r4,$r6,$r5 +amswap_db.b $r4,$r5,$r6,0 +amswap_db.b $r4,$r6,$r5 +amswap_db.h $r4,$r5,$r6,0 +amswap_db.h $r4,$r6,$r5 +amadd_db.b $r4,$r5,$r6,0 +amadd_db.b $r4,$r6,$r5 +amadd_db.h $r4,$r5,$r6,0 +amadd_db.h $r4,$r6,$r5 + +# jmp_op +.L1: +nop +beqz $r4,.L1 +bnez $r4,.L1 +b .L1 +bl .L1 +beq $r4,$r5,.L1 +bne $r4,$r5,.L1 +blt $r4,$r5,.L1 +bgt $r4,$r5,.L1 +bge $r4,$r5,.L1 +ble $r4,$r5,.L1 +bltu $r4,$r5,.L1 +bgtu $r4,$r5,.L1 +bgeu $r4,$r5,.L1 +bleu $r4,$r5,.L1 +jirl $zero,$r4,0 From patchwork Thu Feb 29 11:46:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cai X-Patchwork-Id: 86584 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D1854385840D for ; Thu, 29 Feb 2024 11:48:43 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id CB87F3858401 for ; Thu, 29 Feb 2024 11:46:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CB87F3858401 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CB87F3858401 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709207218; cv=none; b=D1NaZEvEBSu8FOsxQcf+xey55JSIO5d6y43tz5sO89zEoi2Vf6j0upaEylmnZPrUGrwjV/u0up6AdhjZ0+CicNii9/CeDVw7YGVdbhxpSF0NbstIG54XZ4nb1i7SwdutP8ja9kTgZUsK/rKl/wM3U1mm6Mn3TLscCIuc8UxLocY= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1709207218; c=relaxed/simple; bh=t/mGLETWI4RoPT94bPvfuOCcYObH+xS1kN6GPl6Jdhw=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=poAeXZZnkvkCLesNLnkbmt7xEeEACBLkq8wuyVeWhY3E/wnm8MnhHMaXctLi1TcCv/OU6/fX8049M7FqlhhqIKuOaNxWTtoN03h1nqrTcxjZpDC4ygQhYNxNIMHZdsPmCfDf45X+yWyUnl5aZuPbrltn28hxsYIC1rdUgTT7WIs= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8Axz+uqbuBlDeMSAA--.47969S3; Thu, 29 Feb 2024 19:46:50 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx_c6pbuBloL9KAA--.2410S4; Thu, 29 Feb 2024 19:46:49 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 5/7] LoongArch: Add gas testsuit for LA32 int/float instructions Date: Thu, 29 Feb 2024 19:46:45 +0800 Message-Id: <20240229114647.1587477-1-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx_c6pbuBloL9KAA--.2410S4 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEngACs8 X-Coremail-Antispam: 1Uk129KBj9fXoW3CrWfGr1xXFWktrykGF43twc_yoW8ZF18Wo WrAry3tF4ft3yDKFyUAr4Yv3WUXFW7GFsYkr4avw4fZa4a9r12yrsF9345ta4vgr4xu3Zx uryUJr48Jr13JFnrl-sFpf9Il3svdjkaLaAFLSUrUUUUbb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUY07kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26F1j6w1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r4j6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWrXVW3AwAv7VC2z280 aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jOjjgUUUUU= X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the int/float instructions of LA32. --- gas/testsuite/gas/loongarch/insn_float32.d | 157 +++++++++++++++++++++ gas/testsuite/gas/loongarch/insn_float32.s | 149 +++++++++++++++++++ gas/testsuite/gas/loongarch/insn_int32.d | 147 +++++++++++++++++++ gas/testsuite/gas/loongarch/insn_int32.s | 156 ++++++++++++++++++++ 4 files changed, 609 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/insn_float32.d create mode 100644 gas/testsuite/gas/loongarch/insn_float32.s create mode 100644 gas/testsuite/gas/loongarch/insn_int32.d create mode 100644 gas/testsuite/gas/loongarch/insn_int32.s diff --git a/gas/testsuite/gas/loongarch/insn_float32.d b/gas/testsuite/gas/loongarch/insn_float32.d new file mode 100644 index 00000000000..ee2408af2f9 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_float32.d @@ -0,0 +1,157 @@ +#as-new: +#objdump: -d +#skip: loongarch64-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 01008820 fadd.s \$fa0, \$fa1, \$fa2 + 4: 01010820 fadd.d \$fa0, \$fa1, \$fa2 + 8: 01028820 fsub.s \$fa0, \$fa1, \$fa2 + c: 01030820 fsub.d \$fa0, \$fa1, \$fa2 + 10: 01048820 fmul.s \$fa0, \$fa1, \$fa2 + 14: 01050820 fmul.d \$fa0, \$fa1, \$fa2 + 18: 01068820 fdiv.s \$fa0, \$fa1, \$fa2 + 1c: 01070820 fdiv.d \$fa0, \$fa1, \$fa2 + 20: 01088820 fmax.s \$fa0, \$fa1, \$fa2 + 24: 01090820 fmax.d \$fa0, \$fa1, \$fa2 + 28: 010a8820 fmin.s \$fa0, \$fa1, \$fa2 + 2c: 010b0820 fmin.d \$fa0, \$fa1, \$fa2 + 30: 010c8820 fmaxa.s \$fa0, \$fa1, \$fa2 + 34: 010d0820 fmaxa.d \$fa0, \$fa1, \$fa2 + 38: 010e8820 fmina.s \$fa0, \$fa1, \$fa2 + 3c: 010f0820 fmina.d \$fa0, \$fa1, \$fa2 + 40: 01108820 fscaleb.s \$fa0, \$fa1, \$fa2 + 44: 01110820 fscaleb.d \$fa0, \$fa1, \$fa2 + 48: 01128820 fcopysign.s \$fa0, \$fa1, \$fa2 + 4c: 01130820 fcopysign.d \$fa0, \$fa1, \$fa2 + 50: 01140420 fabs.s \$fa0, \$fa1 + 54: 01140820 fabs.d \$fa0, \$fa1 + 58: 01141420 fneg.s \$fa0, \$fa1 + 5c: 01141820 fneg.d \$fa0, \$fa1 + 60: 01142420 flogb.s \$fa0, \$fa1 + 64: 01142820 flogb.d \$fa0, \$fa1 + 68: 01143420 fclass.s \$fa0, \$fa1 + 6c: 01143820 fclass.d \$fa0, \$fa1 + 70: 01144420 fsqrt.s \$fa0, \$fa1 + 74: 01144820 fsqrt.d \$fa0, \$fa1 + 78: 01145420 frecip.s \$fa0, \$fa1 + 7c: 01145820 frecip.d \$fa0, \$fa1 + 80: 01146420 frsqrt.s \$fa0, \$fa1 + 84: 01146820 frsqrt.d \$fa0, \$fa1 + 88: 01149420 fmov.s \$fa0, \$fa1 + 8c: 01149820 fmov.d \$fa0, \$fa1 + 90: 0114a4a0 movgr2fr.w \$fa0, \$a1 + 94: 0114a8a0 movgr2fr.d \$fa0, \$a1 + 98: 0114aca0 movgr2frh.w \$fa0, \$a1 + 9c: 0114b424 movfr2gr.s \$a0, \$fa1 + a0: 0114b824 movfr2gr.d \$a0, \$fa1 + a4: 0114bc24 movfrh2gr.s \$a0, \$fa1 + a8: 0114c0a0 movgr2fcsr \$fcsr0, \$a1 + ac: 0114c804 movfcsr2gr \$a0, \$fcsr0 + b0: 0114d020 movfr2cf \$fcc0, \$fa1 + b4: 0114d4a0 movcf2fr \$fa0, \$fcc5 + b8: 0114d8a0 movgr2cf \$fcc0, \$a1 + bc: 0114dca4 movcf2gr \$a0, \$fcc5 + c0: 01191820 fcvt.s.d \$fa0, \$fa1 + c4: 01192420 fcvt.d.s \$fa0, \$fa1 + c8: 011a0420 ftintrm.w.s \$fa0, \$fa1 + cc: 011a0820 ftintrm.w.d \$fa0, \$fa1 + d0: 011a2420 ftintrm.l.s \$fa0, \$fa1 + d4: 011a2820 ftintrm.l.d \$fa0, \$fa1 + d8: 011a4420 ftintrp.w.s \$fa0, \$fa1 + dc: 011a4820 ftintrp.w.d \$fa0, \$fa1 + e0: 011a6420 ftintrp.l.s \$fa0, \$fa1 + e4: 011a6820 ftintrp.l.d \$fa0, \$fa1 + e8: 011a8420 ftintrz.w.s \$fa0, \$fa1 + ec: 011a8820 ftintrz.w.d \$fa0, \$fa1 + f0: 011aa420 ftintrz.l.s \$fa0, \$fa1 + f4: 011aa820 ftintrz.l.d \$fa0, \$fa1 + f8: 011ac420 ftintrne.w.s \$fa0, \$fa1 + fc: 011ac820 ftintrne.w.d \$fa0, \$fa1 + 100: 011ae420 ftintrne.l.s \$fa0, \$fa1 + 104: 011ae820 ftintrne.l.d \$fa0, \$fa1 + 108: 011b0420 ftint.w.s \$fa0, \$fa1 + 10c: 011b0820 ftint.w.d \$fa0, \$fa1 + 110: 011b2420 ftint.l.s \$fa0, \$fa1 + 114: 011b2820 ftint.l.d \$fa0, \$fa1 + 118: 011d1020 ffint.s.w \$fa0, \$fa1 + 11c: 011d1820 ffint.s.l \$fa0, \$fa1 + 120: 011d2020 ffint.d.w \$fa0, \$fa1 + 124: 011d2820 ffint.d.l \$fa0, \$fa1 + 128: 011e4420 frint.s \$fa0, \$fa1 + 12c: 011e4820 frint.d \$fa0, \$fa1 + 130: 01147420 frecipe.s \$fa0, \$fa1 + 134: 01147820 frecipe.d \$fa0, \$fa1 + 138: 01148420 frsqrte.s \$fa0, \$fa1 + 13c: 01148820 frsqrte.d \$fa0, \$fa1 + 140: 08118820 fmadd.s \$fa0, \$fa1, \$fa2, \$fa3 + 144: 08218820 fmadd.d \$fa0, \$fa1, \$fa2, \$fa3 + 148: 08518820 fmsub.s \$fa0, \$fa1, \$fa2, \$fa3 + 14c: 08618820 fmsub.d \$fa0, \$fa1, \$fa2, \$fa3 + 150: 08918820 fnmadd.s \$fa0, \$fa1, \$fa2, \$fa3 + 154: 08a18820 fnmadd.d \$fa0, \$fa1, \$fa2, \$fa3 + 158: 08d18820 fnmsub.s \$fa0, \$fa1, \$fa2, \$fa3 + 15c: 08e18820 fnmsub.d \$fa0, \$fa1, \$fa2, \$fa3 + 160: 0c100820 fcmp.caf.s \$fcc0, \$fa1, \$fa2 + 164: 0c108820 fcmp.saf.s \$fcc0, \$fa1, \$fa2 + 168: 0c110820 fcmp.clt.s \$fcc0, \$fa1, \$fa2 + 16c: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2 + 170: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2 + 174: 0c120820 fcmp.ceq.s \$fcc0, \$fa1, \$fa2 + 178: 0c128820 fcmp.seq.s \$fcc0, \$fa1, \$fa2 + 17c: 0c130820 fcmp.cle.s \$fcc0, \$fa1, \$fa2 + 180: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2 + 184: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2 + 188: 0c140820 fcmp.cun.s \$fcc0, \$fa1, \$fa2 + 18c: 0c148820 fcmp.sun.s \$fcc0, \$fa1, \$fa2 + 190: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2 + 194: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2 + 198: 0c158820 fcmp.sult.s \$fcc0, \$fa1, \$fa2 + 19c: 0c160820 fcmp.cueq.s \$fcc0, \$fa1, \$fa2 + 1a0: 0c168820 fcmp.sueq.s \$fcc0, \$fa1, \$fa2 + 1a4: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2 + 1a8: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2 + 1ac: 0c178820 fcmp.sule.s \$fcc0, \$fa1, \$fa2 + 1b0: 0c180820 fcmp.cne.s \$fcc0, \$fa1, \$fa2 + 1b4: 0c188820 fcmp.sne.s \$fcc0, \$fa1, \$fa2 + 1b8: 0c1a0820 fcmp.cor.s \$fcc0, \$fa1, \$fa2 + 1bc: 0c1a8820 fcmp.sor.s \$fcc0, \$fa1, \$fa2 + 1c0: 0c1c0820 fcmp.cune.s \$fcc0, \$fa1, \$fa2 + 1c4: 0c1c8820 fcmp.sune.s \$fcc0, \$fa1, \$fa2 + 1c8: 0c200820 fcmp.caf.d \$fcc0, \$fa1, \$fa2 + 1cc: 0c208820 fcmp.saf.d \$fcc0, \$fa1, \$fa2 + 1d0: 0c210820 fcmp.clt.d \$fcc0, \$fa1, \$fa2 + 1d4: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2 + 1d8: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2 + 1dc: 0c220820 fcmp.ceq.d \$fcc0, \$fa1, \$fa2 + 1e0: 0c228820 fcmp.seq.d \$fcc0, \$fa1, \$fa2 + 1e4: 0c230820 fcmp.cle.d \$fcc0, \$fa1, \$fa2 + 1e8: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2 + 1ec: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2 + 1f0: 0c240820 fcmp.cun.d \$fcc0, \$fa1, \$fa2 + 1f4: 0c248820 fcmp.sun.d \$fcc0, \$fa1, \$fa2 + 1f8: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2 + 1fc: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2 + 200: 0c258820 fcmp.sult.d \$fcc0, \$fa1, \$fa2 + 204: 0c260820 fcmp.cueq.d \$fcc0, \$fa1, \$fa2 + 208: 0c268820 fcmp.sueq.d \$fcc0, \$fa1, \$fa2 + 20c: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2 + 210: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2 + 214: 0c278820 fcmp.sule.d \$fcc0, \$fa1, \$fa2 + 218: 0c280820 fcmp.cne.d \$fcc0, \$fa1, \$fa2 + 21c: 0c288820 fcmp.sne.d \$fcc0, \$fa1, \$fa2 + 220: 0c2a0820 fcmp.cor.d \$fcc0, \$fa1, \$fa2 + 224: 0c2a8820 fcmp.sor.d \$fcc0, \$fa1, \$fa2 + 228: 0c2c0820 fcmp.cune.d \$fcc0, \$fa1, \$fa2 + 22c: 0c2c8820 fcmp.sune.d \$fcc0, \$fa1, \$fa2 + 230: 0d000820 fsel \$fa0, \$fa1, \$fa2, \$fcc0 + 234: 2b00058a fld.s \$ft2, \$t0, 1 + 238: 2b40058a fst.s \$ft2, \$t0, 1 + 23c: 2b80058a fld.d \$ft2, \$t0, 1 + 240: 2bc0058a fst.d \$ft2, \$t0, 1 + 244: 48000000 bceqz \$fcc0, 0 # 0x244 + 248: 48000100 bcnez \$fcc0, 0 # 0x248 diff --git a/gas/testsuite/gas/loongarch/insn_float32.s b/gas/testsuite/gas/loongarch/insn_float32.s new file mode 100644 index 00000000000..8465633b91a --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_float32.s @@ -0,0 +1,149 @@ +fadd.s $f0,$f1,$f2 +fadd.d $f0,$f1,$f2 +fsub.s $f0,$f1,$f2 +fsub.d $f0,$f1,$f2 +fmul.s $f0,$f1,$f2 +fmul.d $f0,$f1,$f2 +fdiv.s $f0,$f1,$f2 +fdiv.d $f0,$f1,$f2 +fmax.s $f0,$f1,$f2 +fmax.d $f0,$f1,$f2 +fmin.s $f0,$f1,$f2 +fmin.d $f0,$f1,$f2 +fmaxa.s $f0,$f1,$f2 +fmaxa.d $f0,$f1,$f2 +fmina.s $f0,$f1,$f2 +fmina.d $f0,$f1,$f2 +fscaleb.s $f0,$f1,$f2 +fscaleb.d $f0,$f1,$f2 +fcopysign.s $f0,$f1,$f2 +fcopysign.d $f0,$f1,$f2 +fabs.s $f0,$f1 +fabs.d $f0,$f1 +fneg.s $f0,$f1 +fneg.d $f0,$f1 +flogb.s $f0,$f1 +flogb.d $f0,$f1 +fclass.s $f0,$f1 +fclass.d $f0,$f1 +fsqrt.s $f0,$f1 +fsqrt.d $f0,$f1 +frecip.s $f0,$f1 +frecip.d $f0,$f1 +frsqrt.s $f0,$f1 +frsqrt.d $f0,$f1 +fmov.s $f0,$f1 +fmov.d $f0,$f1 +movgr2fr.w $f0,$r5 +movgr2fr.d $f0,$r5 +movgr2frh.w $f0,$r5 +movfr2gr.s $r4,$f1 +movfr2gr.d $r4,$f1 +movfrh2gr.s $r4,$f1 +movgr2fcsr $fcsr0,$r5 +movfcsr2gr $r4,$fcsr0 +movfr2cf $fcc0,$f1 +movcf2fr $f0,$fcc5 +movgr2cf $fcc0,$r5 +movcf2gr $r4,$fcc5 +fcvt.s.d $f0,$f1 +fcvt.d.s $f0,$f1 +ftintrm.w.s $f0,$f1 +ftintrm.w.d $f0,$f1 +ftintrm.l.s $f0,$f1 +ftintrm.l.d $f0,$f1 +ftintrp.w.s $f0,$f1 +ftintrp.w.d $f0,$f1 +ftintrp.l.s $f0,$f1 +ftintrp.l.d $f0,$f1 +ftintrz.w.s $f0,$f1 +ftintrz.w.d $f0,$f1 +ftintrz.l.s $f0,$f1 +ftintrz.l.d $f0,$f1 +ftintrne.w.s $f0,$f1 +ftintrne.w.d $f0,$f1 +ftintrne.l.s $f0,$f1 +ftintrne.l.d $f0,$f1 +ftint.w.s $f0,$f1 +ftint.w.d $f0,$f1 +ftint.l.s $f0,$f1 +ftint.l.d $f0,$f1 +ffint.s.w $f0,$f1 +ffint.s.l $f0,$f1 +ffint.d.w $f0,$f1 +ffint.d.l $f0,$f1 +frint.s $f0,$f1 +frint.d $f0,$f1 +frecipe.s $f0,$f1 +frecipe.d $f0,$f1 +frsqrte.s $f0,$f1 +frsqrte.d $f0,$f1 + +# 4_opt_op +fmadd.s $f0,$f1,$f2,$f3 +fmadd.d $f0,$f1,$f2,$f3 +fmsub.s $f0,$f1,$f2,$f3 +fmsub.d $f0,$f1,$f2,$f3 +fnmadd.s $f0,$f1,$f2,$f3 +fnmadd.d $f0,$f1,$f2,$f3 +fnmsub.s $f0,$f1,$f2,$f3 +fnmsub.d $f0,$f1,$f2,$f3 +fcmp.caf.s $fcc0,$f1,$f2 +fcmp.saf.s $fcc0,$f1,$f2 +fcmp.clt.s $fcc0,$f1,$f2 +fcmp.slt.s $fcc0,$f1,$f2 +fcmp.sgt.s $fcc0,$f2,$f1 +fcmp.ceq.s $fcc0,$f1,$f2 +fcmp.seq.s $fcc0,$f1,$f2 +fcmp.cle.s $fcc0,$f1,$f2 +fcmp.sle.s $fcc0,$f1,$f2 +fcmp.sge.s $fcc0,$f2,$f1 +fcmp.cun.s $fcc0,$f1,$f2 +fcmp.sun.s $fcc0,$f1,$f2 +fcmp.cult.s $fcc0,$f1,$f2 +fcmp.cugt.s $fcc0,$f2,$f1 +fcmp.sult.s $fcc0,$f1,$f2 +fcmp.cueq.s $fcc0,$f1,$f2 +fcmp.sueq.s $fcc0,$f1,$f2 +fcmp.cule.s $fcc0,$f1,$f2 +fcmp.cuge.s $fcc0,$f2,$f1 +fcmp.sule.s $fcc0,$f1,$f2 +fcmp.cne.s $fcc0,$f1,$f2 +fcmp.sne.s $fcc0,$f1,$f2 +fcmp.cor.s $fcc0,$f1,$f2 +fcmp.sor.s $fcc0,$f1,$f2 +fcmp.cune.s $fcc0,$f1,$f2 +fcmp.sune.s $fcc0,$f1,$f2 +fcmp.caf.d $fcc0,$f1,$f2 +fcmp.saf.d $fcc0,$f1,$f2 +fcmp.clt.d $fcc0,$f1,$f2 +fcmp.slt.d $fcc0,$f1,$f2 +fcmp.sgt.d $fcc0,$f2,$f1 +fcmp.ceq.d $fcc0,$f1,$f2 +fcmp.seq.d $fcc0,$f1,$f2 +fcmp.cle.d $fcc0,$f1,$f2 +fcmp.sle.d $fcc0,$f1,$f2 +fcmp.sge.d $fcc0,$f2,$f1 +fcmp.cun.d $fcc0,$f1,$f2 +fcmp.sun.d $fcc0,$f1,$f2 +fcmp.cult.d $fcc0,$f1,$f2 +fcmp.cugt.d $fcc0,$f2,$f1 +fcmp.sult.d $fcc0,$f1,$f2 +fcmp.cueq.d $fcc0,$f1,$f2 +fcmp.sueq.d $fcc0,$f1,$f2 +fcmp.cule.d $fcc0,$f1,$f2 +fcmp.cuge.d $fcc0,$f2,$f1 +fcmp.sule.d $fcc0,$f1,$f2 +fcmp.cne.d $fcc0,$f1,$f2 +fcmp.sne.d $fcc0,$f1,$f2 +fcmp.cor.d $fcc0,$f1,$f2 +fcmp.sor.d $fcc0,$f1,$f2 +fcmp.cune.d $fcc0,$f1,$f2 +fcmp.sune.d $fcc0,$f1,$f2 +fsel $f0,$f1,$f2,$fcc0 +fld.s $f10,$r12,1 +fst.s $f10,$r12,1 +fld.d $f10,$r12,1 +fst.d $f10,$r12,1 +bceqz $fcc0,.L1 +bcnez $fcc0,.L1 diff --git a/gas/testsuite/gas/loongarch/insn_int32.d b/gas/testsuite/gas/loongarch/insn_int32.d new file mode 100644 index 00000000000..d90dbe402c4 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_int32.d @@ -0,0 +1,147 @@ +#as-new: +#objdump: -d -M no-aliases +#skip: loongarch64-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 020000a4 slti \$a0, \$a1, 0 + 4: 021ffca4 slti \$a0, \$a1, 2047 + 8: 022004a4 slti \$a0, \$a1, -2047 + c: 024000a4 sltui \$a0, \$a1, 0 + 10: 025ffca4 sltui \$a0, \$a1, 2047 + 14: 026004a4 sltui \$a0, \$a1, -2047 + 18: 028000a4 addi.w \$a0, \$a1, 0 + 1c: 029ffca4 addi.w \$a0, \$a1, 2047 + 20: 02a004a4 addi.w \$a0, \$a1, -2047 + 24: 034000a4 andi \$a0, \$a1, 0x0 + 28: 035ffca4 andi \$a0, \$a1, 0x7ff + 2c: 038000a4 ori \$a0, \$a1, 0x0 + 30: 039ffca4 ori \$a0, \$a1, 0x7ff + 34: 03c000a4 xori \$a0, \$a1, 0x0 + 38: 03dffca4 xori \$a0, \$a1, 0x7ff + 3c: 14000004 lu12i.w \$a0, 0 + 40: 14ffffe4 lu12i.w \$a0, 524287 + 44: 1c000004 pcaddu12i \$a0, 0 + 48: 1cffffe4 pcaddu12i \$a0, 524287 + 4c: 1d000024 pcaddu12i \$a0, -524287 + 50: 0004b58b alsl.w \$a7, \$t0, \$t1, 0x2 + 54: 0006b58b alsl.wu \$a7, \$t0, \$t1, 0x2 + 58: 002a0002 break 0x2 + 5c: 002a8002 dbcl 0x2 + 60: 002b0002 syscall 0x2 + 64: 0040898b slli.w \$a7, \$t0, 0x2 + 68: 0044898b srli.w \$a7, \$t0, 0x2 + 6c: 004889ac srai.w \$t0, \$t1, 0x2 + 70: 02048dac slti \$t0, \$t1, 291 + 74: 02448dac sltui \$t0, \$t1, 291 + 78: 02848dac addi.w \$t0, \$t1, 291 + 7c: 034009ac andi \$t0, \$t1, 0x2 + 80: 038009ac ori \$t0, \$t1, 0x2 + 84: 03c009ac xori \$t0, \$t1, 0x2 + 88: 1400246c lu12i.w \$t0, 291 + 8c: 1c00246c pcaddu12i \$t0, 291 + 90: 04048c0c csrrd \$t0, 0x123 + 94: 04048c2c csrwr \$t0, 0x123 + 98: 040009ac csrxchg \$t0, \$t1, 0x2 + 9c: 060009a2 cacop 0x2, \$t1, 2 + a0: 064009ac lddir \$t0, \$t1, 0x2 + a4: 06440980 ldpte \$t0, 0x2 + a8: 0649b9a2 invtlb 0x2, \$t1, \$t2 + ac: 000060a4 rdtimel.w \$a0, \$a1 + b0: 000064a4 rdtimeh.w \$a0, \$a1 + b4: 000418a4 alsl.w \$a0, \$a1, \$a2, 0x1 + b8: 000598a4 alsl.w \$a0, \$a1, \$a2, 0x4 + bc: 000618a4 alsl.wu \$a0, \$a1, \$a2, 0x1 + c0: 000798a4 alsl.wu \$a0, \$a1, \$a2, 0x4 + c4: 001018a4 add.w \$a0, \$a1, \$a2 + c8: 001118a4 sub.w \$a0, \$a1, \$a2 + cc: 001218a4 slt \$a0, \$a1, \$a2 + d0: 001298a4 sltu \$a0, \$a1, \$a2 + d4: 001418a4 nor \$a0, \$a1, \$a2 + d8: 001498a4 and \$a0, \$a1, \$a2 + dc: 001518a4 or \$a0, \$a1, \$a2 + e0: 001598a4 xor \$a0, \$a1, \$a2 + e4: 001718a4 sll.w \$a0, \$a1, \$a2 + e8: 001798a4 srl.w \$a0, \$a1, \$a2 + ec: 001818a4 sra.w \$a0, \$a1, \$a2 + f0: 001c18a4 mul.w \$a0, \$a1, \$a2 + f4: 001c98a4 mulh.w \$a0, \$a1, \$a2 + f8: 001d18a4 mulh.wu \$a0, \$a1, \$a2 + fc: 002018a4 div.w \$a0, \$a1, \$a2 + 100: 002098a4 mod.w \$a0, \$a1, \$a2 + 104: 002118a4 div.wu \$a0, \$a1, \$a2 + 108: 002198a4 mod.wu \$a0, \$a1, \$a2 + 10c: 002a0000 break 0x0 + 110: 002a7fff break 0x7fff + 114: 002a8000 dbcl 0x0 + 118: 002affff dbcl 0x7fff + 11c: 004080a4 slli.w \$a0, \$a1, 0x0 + 120: 004084a4 slli.w \$a0, \$a1, 0x1 + 124: 0040fca4 slli.w \$a0, \$a1, 0x1f + 128: 004480a4 srli.w \$a0, \$a1, 0x0 + 12c: 004484a4 srli.w \$a0, \$a1, 0x1 + 130: 0044fca4 srli.w \$a0, \$a1, 0x1f + 134: 004880a4 srai.w \$a0, \$a1, 0x0 + 138: 004884a4 srai.w \$a0, \$a1, 0x1 + 13c: 0048fca4 srai.w \$a0, \$a1, 0x1f + 140: 200000a4 ll.w \$a0, \$a1, 0 + 144: 203ffca4 ll.w \$a0, \$a1, 16380 + 148: 210000a4 sc.w \$a0, \$a1, 0 + 14c: 213ffca4 sc.w \$a0, \$a1, 16380 + 150: 280000a4 ld.b \$a0, \$a1, 0 + 154: 281ffca4 ld.b \$a0, \$a1, 2047 + 158: 282004a4 ld.b \$a0, \$a1, -2047 + 15c: 284000a4 ld.h \$a0, \$a1, 0 + 160: 285ffca4 ld.h \$a0, \$a1, 2047 + 164: 286004a4 ld.h \$a0, \$a1, -2047 + 168: 288000a4 ld.w \$a0, \$a1, 0 + 16c: 289ffca4 ld.w \$a0, \$a1, 2047 + 170: 28a004a4 ld.w \$a0, \$a1, -2047 + 174: 290000a4 st.b \$a0, \$a1, 0 + 178: 291ffca4 st.b \$a0, \$a1, 2047 + 17c: 292004a4 st.b \$a0, \$a1, -2047 + 180: 294000a4 st.h \$a0, \$a1, 0 + 184: 295ffca4 st.h \$a0, \$a1, 2047 + 188: 296004a4 st.h \$a0, \$a1, -2047 + 18c: 298000a4 st.w \$a0, \$a1, 0 + 190: 299ffca4 st.w \$a0, \$a1, 2047 + 194: 29a004a4 st.w \$a0, \$a1, -2047 + 198: 2a0000a4 ld.bu \$a0, \$a1, 0 + 19c: 2a1ffca4 ld.bu \$a0, \$a1, 2047 + 1a0: 2a2004a4 ld.bu \$a0, \$a1, -2047 + 1a4: 2a4000a4 ld.hu \$a0, \$a1, 0 + 1a8: 2a5ffca4 ld.hu \$a0, \$a1, 2047 + 1ac: 2a6004a4 ld.hu \$a0, \$a1, -2047 + 1b0: 2ac000a0 preld 0x0, \$a1, 0 + 1b4: 2adffcbf preld 0x1f, \$a1, 2047 + 1b8: 2ae004bf preld 0x1f, \$a1, -2047 + 1bc: 385714c4 sc.q \$a0, \$a1, \$a2 + 1c0: 385714c4 sc.q \$a0, \$a1, \$a2 + 1c4: 385780a4 llacq.w \$a0, \$a1 + 1c8: 385780a4 llacq.w \$a0, \$a1 + 1cc: 385784a4 screl.w \$a0, \$a1 + 1d0: 385784a4 screl.w \$a0, \$a1 + 1d4: 38720000 dbar 0x0 + 1d8: 38727fff dbar 0x7fff + 1dc: 38728000 ibar 0x0 + 1e0: 3872ffff ibar 0x7fff + +0+1e4 <.L1>: + 1e4: 03400000 andi \$zero, \$zero, 0x0 + 1e8: 53ffffff b -4 # 1e4 <.L1> + 1ec: 57fffbff bl -8 # 1e4 <.L1> + 1f0: 5bfff485 beq \$a0, \$a1, -12 # 1e4 <.L1> + 1f4: 5ffff085 bne \$a0, \$a1, -16 # 1e4 <.L1> + 1f8: 63ffec85 blt \$a0, \$a1, -20 # 1e4 <.L1> + 1fc: 63ffe8a4 blt \$a1, \$a0, -24 # 1e4 <.L1> + 200: 67ffe485 bge \$a0, \$a1, -28 # 1e4 <.L1> + 204: 67ffe0a4 bge \$a1, \$a0, -32 # 1e4 <.L1> + 208: 6bffdc85 bltu \$a0, \$a1, -36 # 1e4 <.L1> + 20c: 6bffd8a4 bltu \$a1, \$a0, -40 # 1e4 <.L1> + 210: 6fffd485 bgeu \$a0, \$a1, -44 # 1e4 <.L1> + 214: 6fffd0a4 bgeu \$a1, \$a0, -48 # 1e4 <.L1> + 218: 4c000080 jirl \$zero, \$a0, 0 diff --git a/gas/testsuite/gas/loongarch/insn_int32.s b/gas/testsuite/gas/loongarch/insn_int32.s new file mode 100644 index 00000000000..4889df1f7a7 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_int32.s @@ -0,0 +1,156 @@ +# imm_op +slti $r4,$r5,0 +slti $r4,$r5,0x7ff +slti $r4,$r5,-0x7ff +sltui $r4,$r5,0 +sltui $r4,$r5,0x7ff +sltui $r4,$r5,-0x7ff +addi.w $r4,$r5,0 +addi.w $r4,$r5,0x7ff +addi.w $r4,$r5,-0x7ff +andi $r4,$r5,0 +andi $r4,$r5,0x7ff +ori $r4,$r5,0 +ori $r4,$r5,0x7ff +xori $r4,$r5,0 +xori $r4,$r5,0x7ff +lu12i.w $r4,0 +lu12i.w $r4,0x7ffff +pcaddu12i $r4,0 +pcaddu12i $r4,0x7ffff +pcaddu12i $r4,-0x7ffff + +# imm_ins +.equ a, 0x123 +.equ b, 0xfffff00000 +.equ c, 0xfffffffffff +.equ d, 2 +.equ e,0x100 + +alsl.w $r11,$r12,$r13,d +alsl.wu $r11,$r12,$r13,d + +break d +dbcl d +syscall d + +slli.w $r11,$r12,d +srli.w $r11,$r12,d +srai.w $r12,$r13,d + +slti $r12,$r13,a +sltui $r12,$r13,a +addi.w $r12,$r13,a +andi $r12,$r13,d +ori $r12,$r13,d +xori $r12,$r13,d +lu12i.w $r12,a +pcaddu12i $r12,a + +csrrd $r12,a +csrwr $r12,a +csrxchg $r12,$r13,d +cacop d,$r13,d +lddir $r12,$r13,d +ldpte $r12,d + +invtlb d,$r13,$r14 + +# fix_op +rdtimel.w $r4,$r5 +rdtimeh.w $r4,$r5 +alsl.w $r4,$r5,$r6,1 +alsl.w $r4,$r5,$r6,4 +alsl.wu $r4,$r5,$r6,1 +alsl.wu $r4,$r5,$r6,4 +add.w $r4,$r5,$r6 +sub.w $r4,$r5,$r6 +slt $r4,$r5,$r6 +sltu $r4,$r5,$r6 +nor $r4,$r5,$r6 +and $r4,$r5,$r6 +or $r4,$r5,$r6 +xor $r4,$r5,$r6 + +# load_store +sll.w $r4,$r5,$r6 +srl.w $r4,$r5,$r6 +sra.w $r4,$r5,$r6 +mul.w $r4,$r5,$r6 +mulh.w $r4,$r5,$r6 +mulh.wu $r4,$r5,$r6 +div.w $r4,$r5,$r6 +mod.w $r4,$r5,$r6 +div.wu $r4,$r5,$r6 +mod.wu $r4,$r5,$r6 +break 0 +break 0x7fff +dbcl 0 +dbcl 0x7fff +slli.w $r4,$r5,0 +slli.w $r4,$r5,1 +slli.w $r4,$r5,0x1f +srli.w $r4,$r5,0 +srli.w $r4,$r5,1 +srli.w $r4,$r5,0x1f +srai.w $r4,$r5,0 +srai.w $r4,$r5,1 +srai.w $r4,$r5,0x1f +ll.w $r4,$r5,0 +ll.w $r4,$r5,0x3ffc +sc.w $r4,$r5,0 +sc.w $r4,$r5,0x3ffc +ld.b $r4,$r5,0 +ld.b $r4,$r5,0x7ff +ld.b $r4,$r5,-0x7ff +ld.h $r4,$r5,0 +ld.h $r4,$r5,0x7ff +ld.h $r4,$r5,-0x7ff +ld.w $r4,$r5,0 +ld.w $r4,$r5,0x7ff +ld.w $r4,$r5,-0x7ff +st.b $r4,$r5,0 +st.b $r4,$r5,0x7ff +st.b $r4,$r5,-0x7ff +st.h $r4,$r5,0 +st.h $r4,$r5,0x7ff +st.h $r4,$r5,-0x7ff +st.w $r4,$r5,0 +st.w $r4,$r5,0x7ff +st.w $r4,$r5,-0x7ff +ld.bu $r4,$r5,0 +ld.bu $r4,$r5,0x7ff +ld.bu $r4,$r5,-0x7ff +ld.hu $r4,$r5,0 +ld.hu $r4,$r5,0x7ff +ld.hu $r4,$r5,-0x7ff +preld 0,$r5,0 +preld 31,$r5,0x7ff +preld 31,$r5,-0x7ff +sc.q $r4,$r5,$r6,0 +sc.q $r4,$r5,$r6 +llacq.w $r4,$r5,0 +llacq.w $r4,$r5 +screl.w $r4,$r5,0 +screl.w $r4,$r5 +dbar 0 +dbar 0x7fff +ibar 0 +ibar 0x7fff + +# jmp_op +.L1: +nop +b .L1 +bl .L1 +beq $r4,$r5,.L1 +bne $r4,$r5,.L1 +blt $r4,$r5,.L1 +bgt $r4,$r5,.L1 +bge $r4,$r5,.L1 +ble $r4,$r5,.L1 +bltu $r4,$r5,.L1 +bgtu $r4,$r5,.L1 +bgeu $r4,$r5,.L1 +bleu $r4,$r5,.L1 +jirl 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with SMTP id AQAAf8Cx_c6pbuBloL9KAA--.2410S5; Thu, 29 Feb 2024 19:47:07 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 6/7] LoongArch: Add gas testsuit for LA64 relocations Date: Thu, 29 Feb 2024 19:46:46 +0800 Message-Id: <20240229114647.1587477-2-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114647.1587477-1-cailulu@loongson.cn> References: <20240229114647.1587477-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx_c6pbuBloL9KAA--.2410S5 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEoAABsB X-Coremail-Antispam: 1Uk129KBj93XoWxtw1xZr1UtrW8trW5tFy3WrX_yoW3Ar1xpr 13Z3ya9a1kW3W7K345Ar15Jr13Zw48CrW8Xay3Kayjkw4kJr9xAFnrJFn2y3y8Wrs0v34f Zr1xXw1IgF4DAabCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkab4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWrXVW3AwAv7VC2z280 aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jOjjgUUUUU= X-Spam-Status: No, score=-3.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the relocation of the LA64 instruction set. --- gas/testsuite/gas/loongarch/relocs_64.d | 144 ++++++++++++++++++++++++ gas/testsuite/gas/loongarch/relocs_64.s | 109 ++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/relocs_64.d create mode 100644 gas/testsuite/gas/loongarch/relocs_64.s diff --git a/gas/testsuite/gas/loongarch/relocs_64.d b/gas/testsuite/gas/loongarch/relocs_64.d new file mode 100644 index 00000000000..631137eb174 --- /dev/null +++ b/gas/testsuite/gas/loongarch/relocs_64.d @@ -0,0 +1,144 @@ +#as: -mthin-add-sub +#objdump: -dr +#skip: loongarch32-*-* + +.*: file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 4c008ca4 jirl \$a0, \$a1, 140 + 0: R_LARCH_B16 .L1 + 4: 40008880 beqz \$a0, 136 # 8c <.L1> + 4: R_LARCH_B21 .L1 + 8: 50008400 b 132 # 8c <.L1> + 8: R_LARCH_B26 .L1 + c: 14000004 lu12i.w \$a0, 0 + c: R_LARCH_ABS_HI20 .L1 + 10: 038000a4 ori \$a0, \$a1, 0x0 + 10: R_LARCH_ABS_LO12 .L1 + 14: 16000004 lu32i.d \$a0, 0 + 14: R_LARCH_ABS64_LO20 .L1 + 18: 03000085 lu52i.d \$a1, \$a0, 0 + 18: R_LARCH_ABS64_HI12 .L1 + 1c: 1a000004 pcalau12i \$a0, 0 + 1c: R_LARCH_PCALA_HI20 .L1 + 20: 02c00085 addi.d \$a1, \$a0, 0 + 20: R_LARCH_PCALA_LO12 .L1 + 24: 16000004 lu32i.d \$a0, 0 + 24: R_LARCH_PCALA64_LO20 .L1 + 28: 03000085 lu52i.d \$a1, \$a0, 0 + 28: R_LARCH_PCALA64_HI12 .L1 + 2c: 1a000004 pcalau12i \$a0, 0 + 2c: R_LARCH_GOT_PC_HI20 .L1 + 30: 28c00085 ld.d \$a1, \$a0, 0 + 30: R_LARCH_GOT_PC_LO12 .L1 + 34: 16000004 lu32i.d \$a0, 0 + 34: R_LARCH_GOT64_PC_LO20 .L1 + 38: 03000085 lu52i.d \$a1, \$a0, 0 + 38: R_LARCH_GOT64_PC_HI12 .L1 + 3c: 14000004 lu12i.w \$a0, 0 + 3c: R_LARCH_GOT_HI20 .L1 + 40: 03800084 ori \$a0, \$a0, 0x0 + 40: R_LARCH_GOT_LO12 .L1 + 44: 16000004 lu32i.d \$a0, 0 + 44: R_LARCH_GOT64_LO20 .L1 + 48: 03000085 lu52i.d \$a1, \$a0, 0 + 48: R_LARCH_GOT64_HI12 .L1 + 4c: 14000004 lu12i.w \$a0, 0 + 4c: R_LARCH_TLS_LE_HI20 TLSL1 + 50: 03800085 ori \$a1, \$a0, 0x0 + 50: R_LARCH_TLS_LE_LO12 TLSL1 + 54: 16000004 lu32i.d \$a0, 0 + 54: R_LARCH_TLS_LE64_LO20 TLSL1 + 58: 03000085 lu52i.d \$a1, \$a0, 0 + 58: R_LARCH_TLS_LE64_HI12 TLSL1 + 5c: 1a000004 pcalau12i \$a0, 0 + 5c: R_LARCH_TLS_IE_PC_HI20 TLSL1 + 60: 02c00005 li.d \$a1, 0 + 60: R_LARCH_TLS_IE_PC_LO12 TLSL1 + 64: 16000005 lu32i.d \$a1, 0 + 64: R_LARCH_TLS_IE64_PC_LO20 TLSL1 + 68: 030000a5 lu52i.d \$a1, \$a1, 0 + 68: R_LARCH_TLS_IE64_PC_HI12 TLSL1 + 6c: 14000004 lu12i.w \$a0, 0 + 6c: R_LARCH_TLS_IE_HI20 TLSL1 + 70: 03800084 ori \$a0, \$a0, 0x0 + 70: R_LARCH_TLS_IE_LO12 TLSL1 + 74: 16000004 lu32i.d \$a0, 0 + 74: R_LARCH_TLS_IE64_LO20 TLSL1 + 78: 03000084 lu52i.d \$a0, \$a0, 0 + 78: R_LARCH_TLS_IE64_HI12 TLSL1 + 7c: 1a000004 pcalau12i \$a0, 0 + 7c: R_LARCH_TLS_LD_PC_HI20 TLSL1 + 80: 14000004 lu12i.w \$a0, 0 + 80: R_LARCH_TLS_LD_HI20 TLSL1 + 84: 1a000004 pcalau12i \$a0, 0 + 84: R_LARCH_TLS_GD_PC_HI20 TLSL1 + 88: 14000004 lu12i.w \$a0, 0 + 88: R_LARCH_TLS_GD_HI20 TLSL1 + +0+8c <.L1>: + 8c: 00000000 .word 0x00000000 + 8c: R_LARCH_32_PCREL .L2 + +0+90 <.L2>: + ... + 90: R_LARCH_64_PCREL .L3 + +0+98 <.L3>: + 98: 03400000 nop + 9c: 03400000 nop + 9c: R_LARCH_ALIGN .* + a0: 03400000 nop + a4: 03400000 nop + a8: 1800000c pcaddi \$t0, 0 + a8: R_LARCH_PCREL20_S2 .L1 + ac: 1e000001 pcaddu18i \$ra, 0 + ac: R_LARCH_CALL36 a + b0: 4c000021 jirl \$ra, \$ra, 0 + b4: 1a000004 pcalau12i \$a0, 0 + b4: R_LARCH_TLS_DESC_PC_HI20 TLSL1 + b8: 02c000a5 addi.d \$a1, \$a1, 0 + b8: R_LARCH_TLS_DESC_PC_LO12 TLSL1 + bc: 16000005 lu32i.d \$a1, 0 + bc: R_LARCH_TLS_DESC64_PC_LO20 TLSL1 + c0: 030000a5 lu52i.d \$a1, \$a1, 0 + c0: R_LARCH_TLS_DESC64_PC_HI12 TLSL1 + c4: 14000004 lu12i.w \$a0, 0 + c4: R_LARCH_TLS_DESC_HI20 TLSL1 + c8: 03800084 ori \$a0, \$a0, 0x0 + c8: R_LARCH_TLS_DESC_LO12 TLSL1 + cc: 16000004 lu32i.d \$a0, 0 + cc: R_LARCH_TLS_DESC64_LO20 TLSL1 + d0: 03000084 lu52i.d \$a0, \$a0, 0 + d0: R_LARCH_TLS_DESC64_HI12 TLSL1 + d4: 28c00081 ld.d \$ra, \$a0, 0 + d4: R_LARCH_TLS_DESC_LD TLSL1 + d8: 4c000021 jirl \$ra, \$ra, 0 + d8: R_LARCH_TLS_DESC_CALL TLSL1 + dc: 14000004 lu12i.w \$a0, 0 + dc: R_LARCH_TLS_LE_HI20_R TLSL1 + dc: R_LARCH_RELAX \*ABS\* + e0: 001090a5 add.d \$a1, \$a1, \$a0 + e0: R_LARCH_TLS_LE_ADD_R TLSL1 + e0: R_LARCH_RELAX \*ABS\* + e4: 29800085 st.w \$a1, \$a0, 0 + e4: R_LARCH_TLS_LE_LO12_R TLSL1 + e4: R_LARCH_RELAX \*ABS\* + e8: 14000004 lu12i.w \$a0, 0 + e8: R_LARCH_TLS_LE_HI20_R TLSL1 + e8: R_LARCH_RELAX \*ABS\* + ec: 001090a5 add.d \$a1, \$a1, \$a0 + ec: R_LARCH_TLS_LE_ADD_R TLSL1 + ec: R_LARCH_RELAX \*ABS\* + f0: 29800085 st.w \$a1, \$a0, 0 + f0: R_LARCH_TLS_LE_LO12_R TLSL1 + f0: R_LARCH_RELAX \*ABS\* + f4: 18000004 pcaddi \$a0, 0 + f4: R_LARCH_TLS_LD_PCREL20_S2 TLSL1 + f8: 18000004 pcaddi \$a0, 0 + f8: R_LARCH_TLS_GD_PCREL20_S2 TLSL1 + fc: 18000004 pcaddi \$a0, 0 + fc: R_LARCH_TLS_DESC_PCREL20_S2 TLSL1 diff --git a/gas/testsuite/gas/loongarch/relocs_64.s b/gas/testsuite/gas/loongarch/relocs_64.s new file mode 100644 index 00000000000..1d1548f5b68 --- /dev/null +++ b/gas/testsuite/gas/loongarch/relocs_64.s @@ -0,0 +1,109 @@ +/* b16. */ +jirl $r4,$r5,%b16(.L1) + +/* b21. */ +beqz $r4,%b21(.L1) + +/* b26. */ +b %b26(.L1) + +/* lu12i.w. */ +lu12i.w $r4,%abs_hi20(.L1) + +/* ori */ +ori $r4,$r5,%abs_lo12(.L1) + +/* lu32i.d. */ +lu32i.d $r4,%abs64_lo20(.L1) + +/* lu52i.d. */ +lu52i.d $r5,$r4,%abs64_hi12(.L1) + +pcalau12i $r4,%pc_hi20(.L1) +addi.d $r5,$r4,%pc_lo12(.L1) +lu32i.d $r4,%pc64_lo20(.L1) +lu52i.d $r5,$r4,%pc64_hi12(.L1) + +pcalau12i $r4,%got_pc_hi20(.L1) +ld.d $r5,$r4,%got_pc_lo12(.L1) +lu32i.d $r4,%got64_pc_lo20(.L1) +lu52i.d $r5,$r4,%got64_pc_hi12(.L1) + +lu12i.w $r4,%got_hi20(.L1) +ori $r4,$r4,%got_lo12(.L1) +lu32i.d $r4,%got64_lo20(.L1) +lu52i.d $r5,$r4,%got64_hi12(.L1) + +/* TLS LE. */ +lu12i.w $r4,%le_hi20(TLSL1) +ori $r5,$r4,%le_lo12(TLSL1) +lu32i.d $r4,%le64_lo20(TLSL1) +lu52i.d $r5,$r4,%le64_hi12(TLSL1) + +/* Part of IE relocs. */ +pcalau12i $r4,%ie_pc_hi20(TLSL1) +addi.d $r5,$r0,%ie_pc_lo12(TLSL1) +lu32i.d $r5,%ie64_pc_lo20(TLSL1) +lu52i.d $r5,$r5,%ie64_pc_hi12(TLSL1) + +lu12i.w $r4,%ie_hi20(TLSL1) +ori $r4,$r4,%ie_lo12(TLSL1) +lu32i.d $r4,%ie64_lo20(TLSL1) +lu52i.d $r4,$r4,%ie64_hi12(TLSL1) + +/* Part of LD relocs. */ +pcalau12i $r4,%ld_pc_hi20(TLSL1) +lu12i.w $r4,%ld_hi20(TLSL1) + +/* Part of GD relocs. */ +pcalau12i $r4,%gd_pc_hi20(TLSL1) +lu12i.w $r4,%gd_hi20(TLSL1) + +/* Test insn relocs. */ +.L1: +/* 32-bit PC relative. */ +.4byte .L2-.L1 +.L2: +/* 64-bit PC relative. */ +.8byte .L3-.L2 + +.L3: +nop + +/* R_LARCH_ALIGN. */ +.align 4 + +/* R_LARCH_PCREL20_S2. */ +pcaddi $r12,.L1 + +/* R_LARCH_ADD_CALL36 */ +pcaddu18i $r1, %call36(a) +jirl $r1, $r1, 0 + +/* Part of DESC relocs. */ +pcalau12i $r4,%desc_pc_hi20(TLSL1) +addi.d $r5,$r5,%desc_pc_lo12(TLSL1) +lu32i.d $r5,%desc64_pc_lo20(TLSL1) +lu52i.d $r5,$r5,%desc64_pc_hi12(TLSL1) + +lu12i.w $r4,%desc_hi20(TLSL1) +ori $r4,$r4,%desc_lo12(TLSL1) +lu32i.d $r4,%desc64_lo20(TLSL1) +lu52i.d $r4,$r4,%desc64_hi12(TLSL1) +ld.d $r1,$r4,%desc_ld(TLSL1) +jirl $r1,$r1,%desc_call(TLSL1) + +/* New TLS Insn. */ +lu12i.w $r4,%le_hi20_r(TLSL1) +add.d $r5,$r5,$r4,%le_add_r(TLSL1) +st.w $r5,$r4,%le_lo12_r(TLSL1) + +/* New TLS Insn with addend. */ +lu12i.w $r4,%le_hi20_r(TLSL1) +add.d $r5,$r5,$r4,%le_add_r(TLSL1) +st.w $r5,$r4,%le_lo12_r(TLSL1) + +/* Part of relaxed LD/GD/DESC insn sequence. */ +pcaddi $a0,%ld_pcrel_20(TLSL1) +pcaddi $a0,%gd_pcrel_20(TLSL1) +pcaddi $a0,%desc_pcrel_20(TLSL1) From patchwork Thu Feb 29 11:46:47 2024 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2024 19:47:12 +0800 (CST) From: Lulu Cai To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, mengqinggang@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lulu Cai Subject: [PATCH v1 7/7] LoongArch: Add gas testsuit for LA32 relocations Date: Thu, 29 Feb 2024 19:46:47 +0800 Message-Id: <20240229114647.1587477-3-cailulu@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240229114647.1587477-1-cailulu@loongson.cn> References: <20240229114647.1587477-1-cailulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx_c6pbuBloL9KAA--.2410S6 X-CM-SenderInfo: xfdlz3tox6z05rqj20fqof0/1tbiAQACB2XgQGUEowAAsD X-Coremail-Antispam: 1Uk129KBj93XoWxXFWkXw4UAFWfuFW3XryruFX_yoWrAF43pr 13ZwnI9aykW342gry5Ar15Ar1fXw48Cr4xXayft3yjkw4kJr9xAFnrJrZ2y3yfurs0v34r Zrn2qw18WF4DJwcCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkab4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAF wI0_Gr1j6F4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI 0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWrXVW3AwAv7VC2z280 aVAFwI0_Cr0_Gr1UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVW7JVWDJwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jOjjgUUUUU= X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Test the relocation of the LA32 instruction set. --- gas/testsuite/gas/loongarch/relocs_32.d | 75 +++++++++++++++++++++++++ gas/testsuite/gas/loongarch/relocs_32.s | 61 ++++++++++++++++++++ 2 files changed, 136 insertions(+) create mode 100644 gas/testsuite/gas/loongarch/relocs_32.d create mode 100644 gas/testsuite/gas/loongarch/relocs_32.s diff --git a/gas/testsuite/gas/loongarch/relocs_32.d b/gas/testsuite/gas/loongarch/relocs_32.d new file mode 100644 index 00000000000..3e1bb62e263 --- /dev/null +++ b/gas/testsuite/gas/loongarch/relocs_32.d @@ -0,0 +1,75 @@ +#as: -mthin-add-sub +#objdump: -dr +#skip: loongarch64-*-* + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+ <.*>: + 0: 4c0050a4 jirl \$a0, \$a1, 80 + 0: R_LARCH_B16 .L1 + 4: 50004c00 b 76 # 50 <.L1> + 4: R_LARCH_B26 .L1 + 8: 14000004 lu12i.w \$a0, 0 + 8: R_LARCH_ABS_HI20 .L1 + c: 038000a4 ori \$a0, \$a1, 0x0 + c: R_LARCH_ABS_LO12 .L1 + 10: 1a000004 pcalau12i \$a0, 0 + 10: R_LARCH_PCALA_HI20 .L1 + 14: 02800085 addi.w \$a1, \$a0, 0 + 14: R_LARCH_PCALA_LO12 .L1 + 18: 1a000004 pcalau12i \$a0, 0 + 18: R_LARCH_GOT_PC_HI20 .L1 + 1c: 28800085 ld.w \$a1, \$a0, 0 + 1c: R_LARCH_GOT_PC_LO12 .L1 + 20: 14000004 lu12i.w \$a0, 0 + 20: R_LARCH_GOT_HI20 .L1 + 24: 03800084 ori \$a0, \$a0, 0x0 + 24: R_LARCH_GOT_LO12 .L1 + 28: 14000004 lu12i.w \$a0, 0 + 28: R_LARCH_TLS_LE_HI20 TLSL1 + 2c: 03800085 ori \$a1, \$a0, 0x0 + 2c: R_LARCH_TLS_LE_LO12 TLSL1 + 30: 1a000004 pcalau12i \$a0, 0 + 30: R_LARCH_TLS_IE_PC_HI20 TLSL1 + 34: 02c00005 li.d \$a1, 0 + 34: R_LARCH_TLS_IE_PC_LO12 TLSL1 + 38: 14000004 lu12i.w \$a0, 0 + 38: R_LARCH_TLS_IE_HI20 TLSL1 + 3c: 03800084 ori \$a0, \$a0, 0x0 + 3c: R_LARCH_TLS_IE_LO12 TLSL1 + 40: 1a000004 pcalau12i \$a0, 0 + 40: R_LARCH_TLS_LD_PC_HI20 TLSL1 + 44: 14000004 lu12i.w \$a0, 0 + 44: R_LARCH_TLS_LD_HI20 TLSL1 + 48: 1a000004 pcalau12i \$a0, 0 + 48: R_LARCH_TLS_GD_PC_HI20 TLSL1 + 4c: 14000004 lu12i.w \$a0, 0 + 4c: R_LARCH_TLS_GD_HI20 TLSL1 + +0+50 <.L1>: + 50: 00000000 .word 0x00000000 + 50: R_LARCH_32_PCREL .L2 + +0+54 <.L2>: + 54: 03400000 nop + 58: 03400000 nop + 58: R_LARCH_ALIGN .* + 5c: 03400000 nop + 60: 03400000 nop + 64: 1800000c pcaddi \$t0, 0 + 64: R_LARCH_PCREL20_S2 .L1 + 68: 1a000004 pcalau12i \$a0, 0 + 68: R_LARCH_TLS_DESC_PC_HI20 TLSL1 + 6c: 028000a5 addi.w \$a1, \$a1, 0 + 6c: R_LARCH_TLS_DESC_PC_LO12 TLSL1 + 70: 14000004 lu12i.w \$a0, 0 + 70: R_LARCH_TLS_DESC_HI20 TLSL1 + 74: 03800084 ori \$a0, \$a0, 0x0 + 74: R_LARCH_TLS_DESC_LO12 TLSL1 + 78: 28800081 ld.w \$ra, \$a0, 0 + 78: R_LARCH_TLS_DESC_LD TLSL1 + 7c: 4c000021 jirl \$ra, \$ra, 0 + 7c: R_LARCH_TLS_DESC_CALL TLSL1 diff --git a/gas/testsuite/gas/loongarch/relocs_32.s b/gas/testsuite/gas/loongarch/relocs_32.s new file mode 100644 index 00000000000..c5139a7582c --- /dev/null +++ b/gas/testsuite/gas/loongarch/relocs_32.s @@ -0,0 +1,61 @@ +/* b16. */ +jirl $r4,$r5,%b16(.L1) + +/* b26. */ +b %b26(.L1) + +/* lu12i.w. */ +lu12i.w $r4,%abs_hi20(.L1) + +/* ori */ +ori $r4,$r5,%abs_lo12(.L1) + +pcalau12i $r4,%pc_hi20(.L1) +addi.w $r5,$r4,%pc_lo12(.L1) + +pcalau12i $r4,%got_pc_hi20(.L1) +ld.w $r5,$r4,%got_pc_lo12(.L1) + +lu12i.w $r4,%got_hi20(.L1) +ori $r4,$r4,%got_lo12(.L1) + +/* TLS LE. */ +lu12i.w $r4,%le_hi20(TLSL1) +ori $r5,$r4,%le_lo12(TLSL1) + +/* Part of IE relocs. */ +pcalau12i $r4,%ie_pc_hi20(TLSL1) +addi.d $r5,$r0,%ie_pc_lo12(TLSL1) + +lu12i.w $r4,%ie_hi20(TLSL1) +ori $r4,$r4,%ie_lo12(TLSL1) + +/* Part of LD relocs. */ +pcalau12i $r4,%ld_pc_hi20(TLSL1) +lu12i.w $r4,%ld_hi20(TLSL1) + +/* Part of GD relocs. */ +pcalau12i $r4,%gd_pc_hi20(TLSL1) +lu12i.w $r4,%gd_hi20(TLSL1) + +/* Test insn relocs. */ +.L1: +/* 32-bit PC relative. */ +.4byte .L2-.L1 +.L2: +nop + +/* R_LARCH_ALIGN. */ +.align 4 + +/* R_LARCH_PCREL20_S2. */ +pcaddi $r12,.L1 + +/* Part of DESC relocs. */ +pcalau12i $r4,%desc_pc_hi20(TLSL1) +addi.w $r5,$r5,%desc_pc_lo12(TLSL1) + +lu12i.w $r4,%desc_hi20(TLSL1) +ori $r4,$r4,%desc_lo12(TLSL1) +ld.w $r1,$r4,%desc_ld(TLSL1) +jirl $r1,$r1,%desc_call(TLSL1)