From patchwork Wed Jan 3 23:31:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Samuel Tardieu X-Patchwork-Id: 83278 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C9B1638582B3 for ; Wed, 3 Jan 2024 23:31:42 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from zoidberg.rfc1149.net (zoidberg.rfc1149.net [195.154.227.159]) by sourceware.org (Postfix) with ESMTPS id CC2403858D38 for ; Wed, 3 Jan 2024 23:31:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CC2403858D38 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=rfc1149.net Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rfc1149.net ARC-Filter: OpenARC Filter v1.0.0 sourceware.org CC2403858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=195.154.227.159 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704324678; cv=none; b=hLTNI1EFiy0uqvA8Vv7sxuGntEk5JVh//HNtPaCb5h+a4DRx+u7os7CZpA1m5thOZcgp07qAN85Xygp791ja7Hs+0jXRZiUMmhYTHyCKOIc37xUE1WsWTKqW71x9XWqg5wmCIJeHXFX27nWDk/EkY3qY0eWstxZRkbGrR+y5N60= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704324678; c=relaxed/simple; bh=ae29USz6sbml0Zg85R/upEJFyYqXuOsWG+1YQ5Qy7Iw=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=FlhBYvMxYpj9FBKjas1SKbTX+PaxtMl8PAdbtWSMmd1jsaxsPDmRJ4c20FZXwuhybHL6i4+YgLQ0Fvsu6dvg6xClHr57D/mIbwZbTSgP3g+GMVcoNsw3MJFLIaBEbMDMr4D4EkdS4EXoigAFwxhbTDJL11OvTjiSsk/fk89UNxQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from 127.0.0.1 (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (Client did not present a certificate) by zoidberg.rfc1149.net (Postfix) with ESMTPSA id 924EE80024; Thu, 4 Jan 2024 00:31:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rfc1149.net; s=smtp; t=1704324674; bh=ae29USz6sbml0Zg85R/upEJFyYqXuOsWG+1YQ5Qy7Iw=; h=From:To:Cc:Subject:Date; b=M5HPSC2ynM0xRFerlEI81Y0EJCCx5tP2va7Tn5RwRa3MiyCYfQ+vHc/5HqQBeU/jd 1uSKK8yBd29cphTB++fWzQ/HCkq6E4dWzJdnJm6mxb9hLhdDvCuxaqqiKT3/jriKlF vntOQflGEZYaUnRY1RU7rKmTTMf+pIZatQCIMyjm4xGnbjLlW6cczq9oOpFtwDCiv8 RdUuAdREfiejdR2240CzHha/IU0j56LbsuQTeKymFILj2vp4aewIwR4uF0hHpNLpyS i2tV/i3A0h1uTXc7chygUD7DHWEXE1Z9LoEFJKyroEu8EllZCeJ5+ioaP22wwH1QzV vVtls83i5pSLg== From: Samuel Tardieu To: binutils@sourceware.org Cc: Samuel Tardieu Subject: [PATCH] gas/doc: fix several typos Date: Thu, 4 Jan 2024 00:31:14 +0100 Message-ID: <20240103233114.2934547-1-sam@rfc1149.net> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-Spam-Status: No, score=-14.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Signed-off-by: Samuel Tardieu --- gas/doc/as.texi | 6 +++--- gas/doc/c-i386.texi | 2 +- gas/doc/c-kvx.texi | 6 +++--- gas/doc/c-loongarch.texi | 2 +- gas/doc/c-msp430.texi | 2 +- gas/doc/c-or1k.texi | 2 +- gas/doc/c-riscv.texi | 4 ++-- gas/doc/c-s390.texi | 2 +- gas/doc/c-sparc.texi | 2 +- gas/doc/c-z80.texi | 8 ++++---- 10 files changed, 18 insertions(+), 18 deletions(-) diff --git a/gas/doc/as.texi b/gas/doc/as.texi index 52571d95dd2..c9a9e7df69b 100644 --- a/gas/doc/as.texi +++ b/gas/doc/as.texi @@ -838,7 +838,7 @@ suffix. @item --gdwarf-cie-version=@var{version} Control which version of DWARF Common Information Entries (CIEs) are produced. -When this flag is not specificed the default is version 1, though some targets +When this flag is not specified the default is version 1, though some targets can modify this default. Other possible values for @var{version} are 3 or 4. @ifset ELF @@ -5507,7 +5507,7 @@ With this version a separate directory name is allowed, although if this is used then @var{filename} should not contain any directory component, except for @var{fileno} equal to 0: in this case, @var{dirname} is expected to be the current directory and @var{filename} the currently processed file, and -the latter need not be located in the former. In addtion an MD5 hash value +the latter need not be located in the former. In addition an MD5 hash value of the contents of @var{filename} can be provided. This will be stored in the the file table as well, and can be used by tools reading the debug information to verify that the contents of the source file match the @@ -6909,7 +6909,7 @@ must be present along with an additional field like this: The @var{SymbolName} field specifies the symbol name which the section references. Alternatively a numeric @var{SectionIndex} can be provided. This -is not generally a good idea as section indicies are rarely known at assembly +is not generally a good idea as section indices are rarely known at assembly time, but the facility is provided for testing purposes. An index of zero is allowed. It indicates that the linked-to section has already been discarded. diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 21f48c93300..ecdbf62c754 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -1727,7 +1727,7 @@ syntax. @item @samp{lfs}, @samp{lgs}, and @samp{lss} similarly allow for 16- and 32-bit operand size (32- and 48-bit memory operand) in both ISAs, -while Intel64 additionally supports 64-bit operand sise (80-bit memory +while Intel64 additionally supports 64-bit operand size (80-bit memory operands). @end itemize diff --git a/gas/doc/c-kvx.texi b/gas/doc/c-kvx.texi index 74ba89f189c..c7c27599bbe 100644 --- a/gas/doc/c-kvx.texi +++ b/gas/doc/c-kvx.texi @@ -98,8 +98,8 @@ Print succinct diagnostics on one line. @table @code @cindex @code{.align} directive, KVX -@item .align ALIGNEMENT -Pad with NOPs until the next boundary with the required ALIGNEMENT. +@item .align ALIGNMENT +Pad with NOPs until the next boundary with the required ALIGNMENT. @cindex @code{.dword} directive, KVX @item .dword @@ -131,7 +131,7 @@ This directive is only supported when producing ELF files. @cindex @code{.loc} directive, KVX @item .loc FILENO LINENO -This directive is only supported when producting ELF files. +This directive is only supported when producing ELF files. @pxref{Line,,@code{.line}} for details. @cindex @code{.proc} directive, KVX diff --git a/gas/doc/c-loongarch.texi b/gas/doc/c-loongarch.texi index 4c7df63209d..113b614546c 100644 --- a/gas/doc/c-loongarch.texi +++ b/gas/doc/c-loongarch.texi @@ -1,5 +1,5 @@ @c Copyright (C) 2021-2023 Free Software Foundation, Inc. -@c This is part of the GAS anual. +@c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo @c man end diff --git a/gas/doc/c-msp430.texi b/gas/doc/c-msp430.texi index 18abe8b02ec..2a5dc3350ea 100644 --- a/gas/doc/c-msp430.texi +++ b/gas/doc/c-msp430.texi @@ -154,7 +154,7 @@ Extracts most significant word from 32-bit expression 'exp'. Extracts 3rd word from 64-bit expression 'exp'. @item hhi(exp) -Extracts 4rd word from 64-bit expression 'exp'. +Extracts 4th word from 64-bit expression 'exp'. @end table diff --git a/gas/doc/c-or1k.texi b/gas/doc/c-or1k.texi index 37871e5bd29..46f8732ab3f 100644 --- a/gas/doc/c-or1k.texi +++ b/gas/doc/c-or1k.texi @@ -49,7 +49,7 @@ of a comment that extends to the end of that line. @cindex OpenRISC registers @cindex register names, OpenRISC -The OpenRISC register file contains 32 general pupose registers. +The OpenRISC register file contains 32 general purpose registers. @itemize @bullet @item diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index bb98e4d5965..bdb5336b6ec 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -1,5 +1,5 @@ @c Copyright (C) 2016-2023 Free Software Foundation, Inc. -@c This is part of the GAS anual. +@c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo @c man end @@ -457,7 +457,7 @@ only accept s0-s1, a0-a5, fs0-fs1 and fa0-fa5. @item uimm5 @tab Unsigned 5-bit immediate for operand x. @item uimm6 @tab Unsigned 6-bit immediate for operand x. @item uimm8 @tab Unsigned 8-bit immediate for operand x. -@item symbol @tab Symbol or lable reference for operand x. +@item symbol @tab Symbol or label reference for operand x. @end multitable @end display diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi index 60a6fb8d192..f7b90003592 100644 --- a/gas/doc/c-s390.texi +++ b/gas/doc/c-s390.texi @@ -190,7 +190,7 @@ character usually hint at the type of the instruction: @item b @tab branch instruction, for example @samp{bc} for branch on condition @item c @tab compare or convert instruction, for example @samp{cr} for compare register 32-bit -@item d @tab divide instruction, for example @samp{dlr} devide logical register +@item d @tab divide instruction, for example @samp{dlr} divide logical register 64-bit to 32-bit @item i @tab insert instruction, for example @samp{ic} insert character @item l @tab load instruction, for example @samp{ltr} load and test register diff --git a/gas/doc/c-sparc.texi b/gas/doc/c-sparc.texi index 7cb768806c3..27979ecccf2 100644 --- a/gas/doc/c-sparc.texi +++ b/gas/doc/c-sparc.texi @@ -345,7 +345,7 @@ The V9 address space identifier register is referred to as @samp{%asi}. The V9 restorable windows register is referred to as @samp{%canrestore}. @item -The V9 savable windows register is referred to as @samp{%cansave}. +The V9 saveable windows register is referred to as @samp{%cansave}. @item The V9 clean windows register is referred to as @samp{%cleanwin}. diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi index e40b6ba8309..e5b7d65cd89 100644 --- a/gas/doc/c-z80.texi +++ b/gas/doc/c-z80.texi @@ -43,9 +43,9 @@ are recognized: @code{z80n}, @code{r800}. In addition to the basic instruction set, the assembler can be told to -accept some extention mnemonics. For example, +accept some extension mnemonics. For example, @code{-march=z180+sli+infc} extends @var{z180} with @var{SLI} instructions and -@var{IN F,(C)}. The following extentions are currently supported: +@var{IN F,(C)}. The following extensions are currently supported: @code{full} (all known instructions), @code{adl} (ADL CPU mode by default, eZ80 only), @code{sli} (instruction known as @var{SLI}, @var{SLL} or @var{SL1}), @@ -54,9 +54,9 @@ accept some extention mnemonics. For example, @code{xdcb} (instructions like @var{RotOp (II+d),R} and @var{BitOp n,(II+d),R}), @code{infc} (instruction @var{IN F,(C)} or @var{IN (C)}), @code{outc0} (instruction @var{OUT (C),0}). -Note that rather than extending a basic instruction set, the extention +Note that rather than extending a basic instruction set, the extension mnemonics starting with @code{-} revoke the respective functionality: -@code{-march=z80-full+xyhl} first removes all default extentions and adds +@code{-march=z80-full+xyhl} first removes all default extensions and adds support for index registers halves only. If this option is not specified then @code{-march=z80+xyhl+infc} is assumed.