From patchwork Tue Dec 19 08:42:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 82437 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7C281385DC05 for ; Tue, 19 Dec 2023 08:44:34 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by sourceware.org (Postfix) with ESMTPS id 4227F3858D38 for ; Tue, 19 Dec 2023 08:42:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4227F3858D38 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4227F3858D38 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=18.169.211.239 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702975369; cv=none; b=g+tLF0i3OfDlRLTkfpP9POclKEzXoES9oinLgeAWNZaTAP72QwOkK+9dJId1+FANHmuPNOd+Eb2ezibqL2G8FgPKL7jEw5qcpJpIrdSS+lk5VTu45G2H07BHgvVN6CPWD8bHxA2ubOgiA5sh5cDk0fIy1dtdXG3j9qBOYEOp7Us= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702975369; c=relaxed/simple; bh=L9PXN8VrVUjvk7mVjcXTGdDFgvFIKePb6zGUpC2vjuA=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=rj2T8sXQFFqkNtmxICElzf4A8tbBBtJYoZ3Dwlq+6YSDm8s3ociB5Phqr2+VR7oPEc+vXPJ/s0T1/1Sk4dwfpgA7mHDW6gpkPJyzci7jLE2136v8k0Qh1l351/ao1h9u6vIpEsvVM/PJ9U8utsezs4mq5RIDh3+AhrCyA4k+xvQ= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp63t1702975353t21d8u6v Received: from rios-cad122.hadoop.rioslab.org ( [58.60.1.26]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 19 Dec 2023 16:42:32 +0800 (CST) X-QQ-SSF: 01400000000000G0V000000A0000000 X-QQ-FEAT: RrZlkntZBfk6QYEezGTGYwbDcmD7MVIjDIa4ApwRYHEirqVDp5Ft1a3ie6f2y F3iSEK0RgJrZPFzpC322kWdw8jy4TLAIxlhNlU+ZdxpzMPO5n+nVMrDCCivefe0eamkaLfa ggEmtxwDYNJmE1zJTNap4ZaBEfy6V9COKNAMPDwPYiStwx+m978jbwz3EuML+yzpUs15FIg YefzY23r7m4SsjvCv6tSAWD8Jmw6ORn+o23O+zjhZpbKCIh9WooLQW9pml9Tgm7cKvvpXRP 9DdyrackXergvVZAiwjLThvVdQSXZxJTQ9Fq+fBityaN7eXuK9WaShbMT01qbmti/3eNmZv X9RQSF9TM134djMjZ4qfoZ2LwP8VQuf/rmPaMWUdXqVjhb7rccL56ZugGZylEsEP1KvlT2u YlMpPUGxeKs= X-QQ-GoodBg: 2 X-BIZMAIL-ID: 16979596457493187921 From: Juzhe-Zhong To: gcc-patches@gcc.gnu.org Cc: Juzhe-Zhong Subject: [Committed] RISC-V: Force scalable vector on all vsetvl tests Date: Tue, 19 Dec 2023 16:42:30 +0800 Message-Id: <20231219084231.1758550-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz7a-one-0 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Since when VLEN = 128bits and FIXED-VLMAX, vsetvli a5,zero will be optimized into vsetivli zero, 16 for SEW = 16. Such situation will cause many bogus FAILs in FIXED-VLMAX of full coverage testing. Force them all scalable vectors to supress those bogus FAILs. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_prop-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_prop-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-100.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-101.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-102.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-103.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-104.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-105.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-106.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-108.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-109.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-25.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-27.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-28.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-29.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-31.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-32.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-33.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-34.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-35.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-36.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-40.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-42.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-43.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-45.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-46.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-52.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-53.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-54.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-55.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-56.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-57.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-58.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-59.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-60.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-61.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-62.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-63.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-64.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-69.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-72.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-73.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-74.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-75.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-76.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-77.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-78.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-79.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-80.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-81.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-82.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-83.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-85.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-86.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-87.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-88.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-89.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-90.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-91.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-92.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-93.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-94.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-95.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-96.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-97.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-98.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/avl_single-99.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/dump-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/ffload-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr108270.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109399.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109547.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109615.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109743-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109743-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109743-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109743-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109748.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109773-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109773-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr109974.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111037-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111037-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111037-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111234.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111255.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111927.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr111947.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112092-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112092-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112713-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112713-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112776.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112813-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112929-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/pr112988-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-21.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-22.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvl_int.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: Force scalable vector. * gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Force scalable vector. --- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c | 2 +- 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gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c | 4 ++-- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c | 2 +- 446 files changed, 451 insertions(+), 451 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c index 7bad3fb9a3f..70eb5d77897 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c index 77adaa7d073..d98d9652d13 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c index 06cae83ef1e..799e29b5351 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c index c94c38710a4..36de289ce61 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c index 41674f4f557..00e1931252e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c index 10be734dd9b..4c43ae0cd14 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c index 2e2eb3efce2..a5b576aef88 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c index 777d9095d37..48abfd19640 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c index 0f0370d056c..844d1fc6350 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c index 43f272f267c..da69a5b9cbd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c index c1f3cfc44ba..1d1bf10b3bf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c index 374b7af1073..a3ffc3ca7a5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c index efd1e4efdaa..ea91076ad13 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c index 96dc76faa0d..e605331b65f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c index 9ada32e3d06..024087a0a22 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c index 803c6961e31..85a59f85362 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c index 19ea0f14df5..6e0798853bf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c index fdef8e37ce5..567e50a7396 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-preference=fixed-vlmax" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-preference=fixed-vlmax" } */ int d0, sj, v0, rp, zi; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c index 83f7f1da49f..4ef4c51478f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c index 01fc236114c..248e80a9e7e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c index d2c5a4b498d..04bb6812422 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c index 4be7d83104c..ba341c75538 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c index ae1208cd7aa..739c5502d69 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c index 51306fd7a63..c9c4c928ce5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c index fb3577dcb98..9c2fa0ae04f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c index 708a3bdf455..3f0a6be3daf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c index e63d52d8ef2..b21adc01684 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c index e424b4ba435..dce918e40fd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c index 95f1a955296..325bc59de38 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c index a45e52befbf..f99126cc80a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c index 3cb776eaefb..37ac5da98bb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c index 027bc387a5e..ca5ffad5912 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c index 984d5593160..33e9572398d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c index e464ceb0bd6..2c9a896fa80 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c index e32b60f05f9..135cdbffe50 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c index d15499b3bf6..7b8ec6265a1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c index ad2b34095eb..5e0906fd63e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c index 3860c6d54ff..b73ef38637c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c index 350e1d08180..a2ba5090359 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c index 4108dd30cd2..721ae138789 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c index cda2e0ea2f4..8af726590be 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c index d949933f841..d461781a173 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c index d5e5f5a8dd5..99398346b11 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c index ec59d58c258..6f8e71402d8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c index 2fd09649c0f..a2d0ecac7f8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c index cfb7d789758..c19958c05d5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c index a7e067e9b39..769673a00ca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c index 0fa72c3d314..1d422e91abb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c index d5f909168c6..386fb5b6cb0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c index 44297d11147..652d3ebd246 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c index 136dcb483ca..754f426b64a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c index 92df1783b0b..305caf369f6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c index 9afa5470b3c..3defd390f86 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c index 31363d2624d..370171b3057 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c index f4f58cd2c3b..43ee0669b6a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c index d28c12bdd49..6d63a8b25db 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c index d1daafdee86..8fdadff7a9b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c index 7db2dc55d09..1db27d854ec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c index 0c6a25170cd..092e2aa2e72 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c index 8606b10268d..9f5896bfe8f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c index 20e0e4d867f..d278db53216 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c index 51c1f8319ec..1f4d78410d8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c index 796b40fe494..926dc633429 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c index 5b79594f9fa..4dedf3674ac 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c index 5e66bc4dbb6..86c51f92875 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c index 1523d4bd7b6..8f220560265 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c index 443758d7793..5b7582b574a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c index 0ff82266bea..8b02f992f51 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c index a60674d9179..0f0feec964d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c index 11403203aa9..5c451d32df1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c index f1453487ee2..921a6d20fe8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c index 77fe05b68a7..67f3d455953 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c index aa3b93777cf..9aa0c99d848 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c index e7bdb6dd035..786d5d63f73 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c index 2451e7c8dbe..3f4ee86e330 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c index 882576e30d4..69c89a7eda0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c index dbdb025986e..645cf0669b0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c index 7b85cc7072f..c8bba03f071 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c index 6c7aeea5f34..e9fbc73026d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c index 5d0584e981f..f5a02fe21f5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c index a41065b5710..2eb6e433340 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c index 610b731aaba..6f572003984 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c index 82b82aed983..9ea60a12de3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c index 1ed03555c19..a928e467d85 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c index 731184d5e4f..d156c396045 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c index 5e7dabf45a3..5bffa37ba2d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c index fbc4d58881b..e196906f436 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c index 5433b18cfc2..0e62ad3e405 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c index 093f67f6767..290e9411266 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c index 1ccd23462ec..775f72fd83b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c index aac6b52c752..9cc630c7f68 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c index 7e77e0eff44..2a2c35a619b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c index a366a15f71b..632d464639c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c index 633c4afd4f2..369961f4d08 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c index bd407b25d54..8e82034f558 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c index 8927fb128fb..acd96f68a51 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c index c59cc008e98..e9458824338 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c index 45b00f68ba3..0c00da470da 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c index 53d4500c8cf..7360c87fc6e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c index cc4f88be888..fb7d874549f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c index c85f186518b..9198a624d9e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c index 142e43c2baa..d7975b94161 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c index ddd6766e1ef..a638d21df22 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c index 7df8f2461f8..5d9778d1435 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c index 344909ad322..5bb00de33bb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c index 1eb7546166a..718abcf7c89 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c index 0200d72c00a..5ea4757e976 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c index fe67357740e..be0787d6590 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c index 17bac422508..0cdd6568886 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c index c7a3383d02e..dd39a65f5ba 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c index 5cd0f285029..91c899c3da5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c index f071fa2548a..b513beb99c8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c index 48636f562f9..9a4217f8887 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c index 5463cd86a31..0b22c04627f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c index 5b64cfea8d3..ff0f7460731 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c index 65bff4d8ddc..bdd74d6b870 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c index 8f47258d80b..a81ed657097 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c index 92fee67c541..1c98ec50f6e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c index 3eadab38037..c39fea4c1a6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c index ae60519cad5..1ff85ad9f94 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c index eaed7f1a127..1701f6b9493 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c index a2f32dff7c1..d36d69fd051 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c index 128a62953e9..a075688253d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c index 19516eb271e..abe54e86c5e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c index 46437a1aa19..6e62419e9c3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c index 96e337179d5..7aab0e096fa 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c index 423dba78a4d..7a06d7083c6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c index fb4edb459a0..5b4bd435bf3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fdump-rtl-vsetvl-details" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fdump-rtl-vsetvl-details" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c index b2b7eafa945..5e871919e9f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c index c0e21d461e7..211a1c5b694 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c index 9e90b189bd6..6113e3658a3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c index 04eb78b91c6..d893492557c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c index 1b32f4ab24b..78c785a391a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c index 1c08b75873d..0cf6c4f8c4d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c index 691980f04e9..19044ea619f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c index cdb2c8f948e..e540e969c14 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c index ba2d57ea570..7afac6468e2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c index ced6cb8c408..9097f723dfe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c index fd75172a89a..28c6d3527e2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c index 3fa7cf3bcbe..ac65a12d710 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c index a6894749017..e9273f0638a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c index 13d7c23ec6e..d22aef6a5ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c index 21be9c08250..3189929c72f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c index 92d830ce638..381589e9a20 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c index 550c3a38eb1..b3d29074128 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c index 667effa8ba5..9ca53ab98e4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c index 94d08bce54d..82872f10050 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c index 331ebab6e3b..22645c04795 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c index 3ed73ea32b6..55419d28d11 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c index 2fa29c01dbc..a82f76b8773 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c index 0262ff1cb3c..48ba5362a93 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c index 9b5917e1505..611c35a6091 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c @@ -1,7 +1,7 @@ #include "riscv_vector.h" /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c index 618adb78577..e198892dc5c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c index c9d4950e7d8..a04568154a4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c index 2e8647ed4bf..79061f4e051 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c index bca708906e0..3945dcaf436 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c index 21cd0298e24..7266c59695f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c index 834328db017..9a02380f64f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c index e535f8dab0c..cceabd78911 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c index b4dee19fd8b..185f9710db4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c index a8c19a24fe5..48ec42d8fae 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c index 32f33948d7a..8a601c155b0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c index 4d08475271e..80dfbffd622 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c index 976d38958d7..e2bac850ae1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c index defeb86d774..784ff3c7b92 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c index 1ae8a034ea7..ade612b0a9f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c index ac943abeaf9..7ae5c5a929d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c index 731930ef9e6..1b7ce74ecef 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c index 2dfca074bf4..b6c5bcd6c93 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c index b084eea5403..bcdbe7512b4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c index c55faa5fa47..6477dafbcd3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c index a751700b2a0..79d2eb82f1d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-move-loop-invariants" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-move-loop-invariants" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c index b8aac96f9bb..642a089068a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c index 7adf9aaf997..a47699423d3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c index e4f379d4ff7..5fa6c8bd2a8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c index af110ec3ba5..e8a1fd0bd0b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c index f8568a8c898..c92e59e55b2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c index 322e2719f3e..19bee671ba3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c index d2ae43bf263..4fab8e47c32 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c index b3abad7a8bf..1daba8f2362 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c index 88dd87709ab..0ddb261dd74 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c index 90b0bb79937..33a073afcac 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c index e927829c151..273eb4353f7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c index e87dc032b9b..7fe7be6d71b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c index 98630a1ca02..3f06b6e0ce6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c index edd12855f58..87ec80e127b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c index 81c42c5a82a..9bb13021917 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c index 7a9882b77e2..7848ff2a824 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c index 7bfbaaf3713..80e9abc5261 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c index 06a8562ebab..0efd15b8348 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv_zbb -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv_zbb -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3" } */ #include diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c index 0b7b32fc3e6..64ca51bf076 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c index ac50da71726..71d2c9a66ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve64d_zvfh -mabi=ilp32d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64d_zvfh -mabi=ilp32d -O3" } */ #include "pr111037-1.c" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c index 13344ecdd3b..110e55b3cbe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c index 1a0fcf72326..76dd7cbc157 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c index ee5eec4a257..d8f2cbddccf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ #include diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c index d667dbc874b..a19d920b5c1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */ #include diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c index ab599add57f..61dcc53cd73 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c index cea19b70e20..14192be9db4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -Wno-implicit-int" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O2 -Wno-implicit-int" } */ char *a; b() { diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c index 857ab0cd1e6..77227512993 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c index 2b0844ff977..727b2db72e7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c index 76402ab6167..06e4b2dabaf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c index 04539d998cf..2cae1b4d395 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c index 853690178ac..b60853db210 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c index 5aab9c2bf09..c0a6bf2dfea 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c @@ -1,6 +1,6 @@ /* Test that we do not have ice when compile */ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv_zvl256b -mabi=ilp32d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv_zvl256b -mabi=ilp32d -O3" } */ int a, c, d, f, j; int b[7]; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c index 0435e5dbc56..c3ecbf88918 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ int printf(char *, ...); int a, l, i, p, q, t, n, o; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c index b37166b2973..27f0b180eb2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */ int a = 0; int p, q, r, x = 230; diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c index b0c40e8a0cb..bb01691c6dc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c index d1713ba803d..3b42566b41d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c index 627debf7d63..e8551ec63a9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c index 192f1f313f7..50d8d0df355 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c index 50c4fbd2a9a..44a07008617 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c index efb45ff7105..e702c5ecf42 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c index d0d9ec9fdf1..9d037f63f0b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c index b0e23b9a4c3..899df3e2a56 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c index 52f61b2afa4..f19897a1cde 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c index 82d06f9e07a..3a033bb0133 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c index 604597d6b22..2b9fbd248c1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c index a09f5043924..b5a02c021d4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c index 52f61b2afa4..f19897a1cde 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c index 9018deb917c..9c0c319cea0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c index 6b773e0946e..e293d86031d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c index 91e75b068c4..f227e5c447b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c index fe41d15cb28..df6e16ef3b2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c index d0fdc5fadb0..71a608fa2be 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c index d0e75258188..83730673524 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c index f2391145cfc..fb12365b841 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c index 464457c6284..4583504bd5a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c index 2a20b3281ec..f16f4b9c37d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c index a16c5f50634..93ec13ab48f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c index 227ceed0ffb..9b0d88ddf97 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c index 0632eacc999..ee321fc1fa0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c index dfae5319786..43b443be6cb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c index aa016485657..67855581fb2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c index 6feecdfe959..8c4c47effce 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c index e0b5fbb403c..99dbbbab71b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c index 9be774c958b..40bff0f5290 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c index 3625f04b763..857dc3afa22 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c index cae22dd5164..b067f9b41e6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c index 9fca90c2c8b..eeacb8eab32 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c index fd2ba4470e6..75ef23ffc01 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c index c3acdea23fb..b639251f2fa 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c index d8a6aa26839..bea7ede18d2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c index 739d4bcfe0c..5a361b58739 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c index f8e2c4da433..f0e0ff69387 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c index e5239be1e32..5e562fa3532 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c index 2721ebb5589..9dc954ae47b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c index ca64d4953ea..fddaeae637f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c index b38e362b880..b353b0635bb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c index e98596fa01c..80a80465674 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c index b508abd9076..d9965ca13f2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c index dd4797bd653..0e843943cf7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c index 4f31d142089..95a227bc79a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c index 20c2193c703..d6b6a2b9c10 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c index db8c23ff36d..9e01bffdd01 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c index 025a6deaea2..f9f24207874 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c index c18aa3cc1a2..ecacd4bac1c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c index 76e360519f6..fd4f6d51c00 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c index 3e5e88744fe..4436cd968ba 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c index b66df6addbf..16b2c326b34 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c index 1b33c17ee2f..12bb03d8e5e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c index 5b2b2e1e32a..0eadad1e1b8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c index 618e81285a1..8679fab8a9c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c index 6bdb2e9d182..9130d1cf9ce 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c index e61eb40b7c5..18e41b97390 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c index db4f9a1da86..394553d8dd7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c index 26f115c5cf4..048087f0477 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c index 6fb81c518b2..1a4fdb13ac4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c index 728761d21dc..924758915cc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c index 8dbcccdebe3..9e811a9fe54 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c index 1dee56d1f8b..738b53f6dc3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c index 8547d4a35a7..0cbc6a4c2be 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c index 5240fe33c2f..e7846f07798 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c index f0e1ada6286..9b2b0ae97c5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c index 830e91080dd..c0735a5cd2b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c index 81cdad2ea9d..cb907505976 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c index de84f9ea32b..a63eae77304 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c index 9054d86122d..607c8020f13 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c index 8265b5ed2e1..48f3cdf591d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c index 516153094e8..610c944efec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c index 8dbc41b8a5b..7ea12185966 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c index 3441b1f06b7..1dae7071e13 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c index da560972a0e..1e72f616665 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c index 748f54e391c..62d087de9c7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c index 164c44a7eaf..e52a55e09e5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c index 6ca0d175b9a..03418457f7e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c index 2c436d8ce0c..85686e84661 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c index bb75c509ffd..0b03e75070b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c index 30de699d32e..d72414f4cab 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c index 653aba8a198..2a55f2d0524 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c index 00a75948ba5..eb2a71045da 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c index d3676900eae..7a4b0a73679 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c index 72f49f3e53f..0dbda086df3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c index 88a565fd891..66e1b73c4d4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c index b0ca3942d42..28ffe2c687a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c index efba512269f..5a3e05e4961 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c index 01396ef1c1b..bb2ca39cf71 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c index dd0d51da834..293b1095124 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c index fbca9b00e54..ddc293b2052 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c index bc52e5a88c0..87ea3970e02 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c index 429d4942d75..d296fe60d18 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c index 2fe6605bc1b..510e0de413f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c index 3c458944894..f5a9f6a88cb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c index 2f2f0893d87..73eb9c78e30 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c index 8774155aa95..c925bcf30db 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c index 8004854327a..94325b474ec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c index 9e8f8018a86..9de3aa3da17 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c index 204fe958c45..9ed3bfd6919 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c index 0868c0102f4..ef3f76a0550 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c index 44e170bbda1..302b2f64072 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c index 80bd0081b24..1dd7933aacd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c index 9cdaa0649fa..756036eb8b9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c index 55171805a7e..a5d6c9af3f5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c index 26190478d5d..ffbe7c8e9f0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c index d5e8728b42b..0c5a1199150 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c index 19bfd58b868..b1faaeebf88 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c index 2f13d2cc62d..b80bdde8da8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c index 32a8edb0097..c0b8b4c330f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c index 897c1ab31bc..5366b8bc1af 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c index 2ba5e282f32..3a3e9bcb110 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c index d56d264d0c2..181d0e709c9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c index f3183426873..8c67890fc55 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c index 4cf5a00319e..597e066002e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c index f708e4a5732..02a08cc39a3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c index f3dbffb8ebc..b6cf5ab81b2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c index 6e2689698be..c7fec261333 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c index 6dde53e517b..a89c1d523db 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c index 903c46cbbbf..f39b32c4c71 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c index 830dfb83e6d..6f61bb63548 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c index 898dd20b0cc..b42c2b21bd7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c index 24a3f55d92b..8caeed737ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c index f311cbfc12a..d129caf93b1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c index 2e0fbc5a817..830739da199 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c index 7a0e12f0ff3..e4ff921f68c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c index f61260780f2..f8e6ed5b88c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c index 4dcbf7bd1df..225749fcbd5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c index 0e0b67c5c61..1f27a6bc87a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c index 5a5b7d57607..e91a4e405e9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c index 9e1f9c757c0..d0a920f99b0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c index 5ac8e179e73..27e78920f39 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c index 5ac73a979eb..8d37f7b96b4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c index f79559c48cd..a3817a394ca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c index a423c5dff28..369850ab02c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c index 00d2f82c2d0..a8c404dda73 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c index 69f21e5cf95..ef691ddb1a6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c index 65709cd5f42..1345fa0dbd6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c index 4bf37250345..d6cbb2bc819 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c index cacd290168e..364bd69c335 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c index 39e747bd89a..5b26167412e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c index dedadcb5351..4cbfc67738a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c index 31be96662a4..7a28e845a4e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c index 5a48b997a71..8ca376e42f2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c index 8ea534918ca..4291d8d6ae8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c index f4fa2696a1d..3e6599db4b4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c index 8526ae610d3..e767b124a99 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c index 42180a70ab4..0d5183ee314 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c index fb1258f826e..e452d85ebdd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c index bdfb964cc01..7503fbe48ad 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c index 17055f0f0bf..6b3439a1e92 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c index 1383995ac72..3a739e2942d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c index ba4b5ef7c3b..ac0204fa937 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c index 5f04c192924..4a903cfed35 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c index 8debc17248f..9fb73cf05fb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c index c8913d8267d..e44537e5542 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c index d5f27c614bd..960c9bff765 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c index c676b6b7aef..5f22e8d0e8e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c index 11f1da32200..e5f35c0f018 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c index 5ee37e99a45..b2f967b5990 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c index ed3862753ab..31ebc133f41 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c index d8f1a0ba04e..bac607bf8d6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c index 293c818729e..a620523650a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c index b0473708439..9c293dd0acb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c index 04d1930ee3e..355a0308472 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c index abfbc1b3b78..85668d06db9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX. */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c index 6528c113a75..71a0ccc611a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c index 15b10e6bac6..f6ecebeb2e1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c index 823e50a2f09..39576c17e5d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c index 1dac01c678f..f5fb770eac6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c index 05321bf68b1..63282f4558b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c index 016ad75ac42..d9cdb111956 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c index f96b8c57745..1400e67c74b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c index c20e7b87016..4824b75dba8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c index ca6b7fe0951..b7988525405 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c index 7648b8a2dc8..d3141223cf3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c index 204058a43bc..0532c7d4207 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c index 99cf3bd583e..b664c4b67eb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c index b79758527b7..04c4b886eec 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c index 29b850832f2..e2deea7414c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c index 1fc97f8b6f2..0671bce357b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c index f3b37661fbe..1bac9fd337d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c index a1587e7e20f..8dddd88999f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c index 9d40a13b06e..c6b39aafcce 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c index 00b883f2f38..8ba56806057 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c index ce30f3aac69..1404c9dc0d5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c index ce30f3aac69..1404c9dc0d5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c index f7e354314b5..609c68dfcbe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c index 28c017d6130..043f17737ae 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c index 06bb695f7d1..0bedde84005 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c index 06bb695f7d1..0bedde84005 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c index 0e76f676515..c3519cedba7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -Wno-psabi" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -Wno-psabi" } */ #include "riscv_vector.h" @@ -13,4 +13,4 @@ void f(int8_t *base, int8_t *out, size_t vl, size_t m, vbool64_t mask) { } /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c index 3c7e0ec27b6..9a553097eef 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c index b665bb84eb7..81bb251e4b1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c index fc7e1cb249e..6fe28134c95 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c index 1ea248dce88..765ac30d421 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c index 40d4af00419..992c2a143e4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c index a1954e7a09a..d218d04a757 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c index 29e05c4982b..d06203abd94 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c index 8a1bbb40fc8..fb05c116e8e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c index 5799220ec77..ee1501e0f34 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c index 87ef3acc24d..1544f02f65f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c index ff0171b3ff6..810f9f3cb25 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c index d3f4a271ccf..854568f3043 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c index 551920c6a72..c134f559b47 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c index 98df431bced..f519cd44cd5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c index e3d069ff32a..e2b84d61a11 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c index 1703c739f5e..493ef974cb2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d" } */ #include diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c index 13d09fc3fd1..a7539b52840 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c index 41639317d05..bfa798f2d7f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c index e84e32b2509..6e1e44fea2e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c index fb7abdeb968..4e6cc906a36 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c index 5fa2f2bc294..762558f73b3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c index 55cc770cfde..0b659fdbe23 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c index d07152ce781..ef7d0224f98 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c index 45727a035b4..2cd966e4241 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax -O2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax -O2" } */ struct a_struct { diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c index bbc02eab818..1b9f4d8e1b2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */ int safe_lshift_func_int32_t_s_s_left, safe_lshift_func_int32_t_s_s_right, safe_sub_func_uint64_t_u_u_ui2, safe_mul_func_uint64_t_u_u_ui2, g_79_2, diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c index 4cdd5877742..f3403645f76 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c index 96f16907950..bec3928ff2f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c index 1204f83e6bd..be509054ea5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c index 637b0a52295..3cf6b169aed 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c index e32994e5212..b9b6f266c9f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c index 0160d732fc3..65a8415207c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c index ae1db0a905f..08fd74f15f2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" @@ -15,4 +15,4 @@ void f(int8_t *base, int8_t *out, size_t vl, size_t m) { /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c index a8497210473..0143aa130ed 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c index 6cce6fe4282..fe44fb3e8a3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" @@ -11,4 +11,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c __riscv_vse32_v_i32m1(out, c, __riscv_vsetvlmax_e8mf2 ()); } -/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c index d28d6f866c4..7d1f2e13dd0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" @@ -13,4 +13,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c } } -/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c index 8baedb0fef7..de4ba0af1f2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c index 1d77efb9539..91c2a4f6920 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c index 853ffee1414..975ba97d25e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c index 1102d7ec830..bfe575e0efb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" @@ -16,4 +16,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c } } -/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ \ No newline at end of file +/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c index cc0135ffb8d..466f3a8d57e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c index 2a535b5f2a8..5acc2ac2f8a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c index 0e6b14ee3e9..b2e33827e35 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c index c32f15d8224..558690a4713 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c index 15e99537462..a679f544402 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c index caa2103da5d..d350752df53 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c index 1204f83e6bd..be509054ea5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */ #include "riscv_vector.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c index 5d1126786d3..d36560b2baf 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3" } */ +/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3" } */ #include