From patchwork Wed Sep 15 02:09:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Hongtao" X-Patchwork-Id: 45005 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AA8163857C71 for ; Wed, 15 Sep 2021 02:10:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AA8163857C71 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1631671831; bh=rk2u7u4VaKBMLrN+jKBlhSEBnVG037I6KifrFthMsuI=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=n+ON4K++0zNVaBCrFemZb49jMmsnPnSUfWnVpncwIFIz0mBeZOlbq8tOS741ufFhj 306qyvkU8sUEILCHXxG4Sy0/EEVo5WIWinzRfnZc6unAo5c+Kdt5gGGz0KMUjCGX9U m17pbcTP+XrHmwQ74H79xxg2YZQQ+irU0YRcuqkM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 0E28E3858413 for ; Wed, 15 Sep 2021 02:10:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0E28E3858413 X-IronPort-AV: E=McAfee;i="6200,9189,10107"; a="221853922" X-IronPort-AV: E=Sophos;i="5.85,292,1624345200"; d="scan'208";a="221853922" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Sep 2021 19:10:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,292,1624345200"; d="scan'208";a="583078656" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga004.jf.intel.com with ESMTP; 14 Sep 2021 19:10:00 -0700 Received: from shliclel219.sh.intel.com (shliclel219.sh.intel.com [10.239.236.219]) by scymds01.sc.intel.com with ESMTP id 18F29v9r007011; Tue, 14 Sep 2021 19:09:58 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Output vextract{i, f}{32x4, 64x2} for (vec_select:(reg:Vmode) idx) when byte_offset of idx % 16 == 0. Date: Wed, 15 Sep 2021 10:09:57 +0800 Message-Id: <20210915020957.2448031-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: "Liu, Hongtao" Reply-To: liuhongt Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi: As describled in PR, use vextract instead on valign when byte_offset % 16 == 0. Bootstrapped and regtest on x86_64-linux-gnu{-m32,}. Pushed to trunk. 2020-09-13 Hongtao Liu Peter Cordes gcc/ChangeLog: PR target/91103 * config/i386/sse.md (extract_suf): Add V8SF/V8SI/V4DF/V4DI. (*vec_extract_valign): Output vextract{i,f}{32x4,64x2} instruction when byte_offset % 16 == 0. gcc/testsuite/ChangeLog: PR target/91103 * gcc.target/i386/pr91103-1.c: Add extract tests. * gcc.target/i386/pr91103-2.c: Ditto. --- gcc/config/i386/sse.md | 21 +++++++++++++++++---- gcc/testsuite/gcc.target/i386/pr91103-1.c | 7 ++++++- gcc/testsuite/gcc.target/i386/pr91103-2.c | 4 ++++ 3 files changed, 27 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 516eb4544bc..5f96016c947 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -9031,7 +9031,8 @@ (define_mode_attr extract_type [(V16SF "avx512f") (V16SI "avx512f") (V8DF "avx512dq") (V8DI "avx512dq")]) (define_mode_attr extract_suf - [(V16SF "32x4") (V16SI "32x4") (V8DF "64x2") (V8DI "64x2")]) + [(V16SF "32x4") (V16SI "32x4") (V8DF "64x2") (V8DI "64x2") + (V8SF "32x4") (V8SI "32x4") (V4DF "64x2") (V4DI "64x2")]) (define_mode_iterator AVX512_VEC [(V8DF "TARGET_AVX512DQ") (V8DI "TARGET_AVX512DQ") V16SF V16SI]) @@ -10603,9 +10604,21 @@ (define_insn "*vec_extract_valign" (match_operand:V48_256_512_AVX512VL 1 "register_operand" "v") (parallel [(match_operand 2 "")])))] "TARGET_AVX512F - && INTVAL(operands[2]) >= 16 / GET_MODE_SIZE (mode)" - "valign\t{%2, %1, %1, %0|%0, %1, %1, %2}"; - [(set_attr "prefix" "evex") + && INTVAL(operands[2]) * GET_MODE_SIZE (mode) >= 16" +{ + int byte_offset = INTVAL (operands[2]) * GET_MODE_SIZE (mode); + if (byte_offset % 16 == 0) + { + operands[2] = GEN_INT (byte_offset / 16); + if (byte_offset / 16 == 1) + return "vextract\t{%2, %t1, %x0|%x0, %t1, %2}"; + else + return "vextract\t{%2, %1, %x0|%x0, %1, %2}"; + } + else + return "valign\t{%2, %1, %1, %0|%0, %1, %1, %2}"; +} + [(set_attr "prefix" "maybe_evex") (set_attr "mode" "")]) (define_expand "avx512f_shufps512_mask" diff --git a/gcc/testsuite/gcc.target/i386/pr91103-1.c b/gcc/testsuite/gcc.target/i386/pr91103-1.c index 11caaa8bd1b..2d78a6da0f3 100644 --- a/gcc/testsuite/gcc.target/i386/pr91103-1.c +++ b/gcc/testsuite/gcc.target/i386/pr91103-1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512vl -O2" } */ -/* { dg-final { scan-assembler-times "valign\[dq\]" 16 } } */ +/* { dg-final { scan-assembler-times "valign\[dq\]" 8 } } */ +/* { dg-final { scan-assembler-times "vextract" 12 } } */ typedef float v8sf __attribute__((vector_size(32))); typedef float v16sf __attribute__((vector_size(64))); @@ -23,9 +24,13 @@ EXTRACT (v8sf, float, 4); EXTRACT (v8sf, float, 7); EXTRACT (v8si, int, 4); EXTRACT (v8si, int, 7); +EXTRACT (v16sf, float, 4); EXTRACT (v16sf, float, 8); +EXTRACT (v16sf, float, 12); EXTRACT (v16sf, float, 15); +EXTRACT (v16si, int, 4); EXTRACT (v16si, int, 8); +EXTRACT (v16si, int, 12); EXTRACT (v16si, int, 15); EXTRACT (v4df, double, 2); EXTRACT (v4df, double, 3); diff --git a/gcc/testsuite/gcc.target/i386/pr91103-2.c b/gcc/testsuite/gcc.target/i386/pr91103-2.c index 010e4775723..a928d87f99a 100644 --- a/gcc/testsuite/gcc.target/i386/pr91103-2.c +++ b/gcc/testsuite/gcc.target/i386/pr91103-2.c @@ -61,9 +61,13 @@ RUNCHECK (f2, v8sf, float, 4); RUNCHECK (f2, v8sf, float, 7); RUNCHECK (di2, v8si, int, 4); RUNCHECK (di2, v8si, int, 7); +RUNCHECK (f1, v16sf, float, 4); RUNCHECK (f1, v16sf, float, 8); +RUNCHECK (f1, v16sf, float, 12); RUNCHECK (f1, v16sf, float, 15); +RUNCHECK (di1, v16si, int, 4); RUNCHECK (di1, v16si, int, 8); +RUNCHECK (di1, v16si, int, 12); RUNCHECK (di1, v16si, int, 15); RUNCHECK (d2, v4df, double, 2); RUNCHECK (d2, v4df, double, 3);