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Fri, 8 Dec 2023 16:03:34 +0000 (GMT) From: Jens Remus To: binutils@sourceware.org Cc: Jens Remus , Andreas Krebbel , Nick Clifton Subject: [PATCH 1/2] s390: Fix build when using EXEEXT_FOR_BUILD Date: Fri, 8 Dec 2023 17:03:29 +0100 Message-Id: <20231208160330.1387610-2-jremus@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231208160330.1387610-1-jremus@linux.ibm.com> References: <20231208160330.1387610-1-jremus@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: f1D8spgLVSTBky3UlpOlS6eatxA38_Q_ X-Proofpoint-ORIG-GUID: XtN1hRelt3sS870BEKQQICt3BJ-0Elax X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-08_11,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 phishscore=0 priorityscore=1501 mlxlogscore=999 adultscore=0 suspectscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312080132 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Suffix the s390-mkopc build utility executable file name with EXEEXT_FOR_BUILD. Otherwise it cannot be located when building with EXEEXT_FOR_BUILD. Use pattern used for other architecture build utilities and compile and link s390-mkopc in two steps. While at it also specify the dependencies of s390-mkopc.c. opcodes/ * Makefile.am: Add target to build s390-mkopc.o. Correct target to build s390-mkopc$(EXEEXT_FOR_BUILD). * Makefile.in: Regenerate. Signed-off-by: Jens Remus Reviewed-by: Andreas Krebbel --- opcodes/Makefile.am | 7 +++++-- opcodes/Makefile.in | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 5804dd1ab38..ea264989509 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -570,8 +570,11 @@ opc2c$(EXEEXT_FOR_BUILD): opc2c.o $(BUILD_LIBS_DEPS) opc2c.o: opc2c.c $(INCDIR)/libiberty.h $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c -s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.c - $(AM_V_CCLD)$(COMPILE_FOR_BUILD) -o s390-mkopc $(srcdir)/s390-mkopc.c +s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.o + $(AM_V_CCLD)$(LINK_FOR_BUILD) s390-mkopc.o + +s390-mkopc.o: s390-mkopc.c $(INCDIR)/opcode/s390.h + $(COMPILE_FOR_BUILD) -c $(srcdir)/s390-mkopc.c s390-opc.tab: s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.txt $(AM_V_GEN)./s390-mkopc$(EXEEXT_FOR_BUILD) < $(srcdir)/s390-opc.txt > s390-opc.tab diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index e2c6e5a4374..7586b54fbd8 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -1548,8 +1548,11 @@ opc2c$(EXEEXT_FOR_BUILD): opc2c.o $(BUILD_LIBS_DEPS) opc2c.o: opc2c.c $(INCDIR)/libiberty.h $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c -s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.c - $(AM_V_CCLD)$(COMPILE_FOR_BUILD) -o s390-mkopc $(srcdir)/s390-mkopc.c +s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.o + $(AM_V_CCLD)$(LINK_FOR_BUILD) s390-mkopc.o + +s390-mkopc.o: s390-mkopc.c $(INCDIR)/opcode/s390.h + $(COMPILE_FOR_BUILD) -c $(srcdir)/s390-mkopc.c s390-opc.tab: s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.txt $(AM_V_GEN)./s390-mkopc$(EXEEXT_FOR_BUILD) < $(srcdir)/s390-opc.txt > s390-opc.tab From patchwork Fri Dec 8 16:03:30 2023 Content-Type: text/plain; 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Fri, 8 Dec 2023 16:03:35 +0000 (GMT) From: Jens Remus To: binutils@sourceware.org Cc: Jens Remus , Andreas Krebbel , Nick Clifton Subject: [PATCH 2/2] s390: Optionally print instruction description in disassembly Date: Fri, 8 Dec 2023 17:03:30 +0100 Message-Id: <20231208160330.1387610-3-jremus@linux.ibm.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231208160330.1387610-1-jremus@linux.ibm.com> References: <20231208160330.1387610-1-jremus@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 5NOEhu84wE4pAdT8xB3hC4T8xcX4OT-e X-Proofpoint-ORIG-GUID: prJ-3-CpqZCIczXMxZYy_SG3x4FYTWjS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-08_11,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 mlxscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312080132 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org Print instruction description as comment in disassembly with s390 architecture specific option "insndesc": - For objdump it can be enabled with option "-M insndesc" - In gdb it can be enabled with "set disassembler-options insndesc" Since comments are not column aligned the output can enhanced for readability by postprocessing using a filter such as "expand": ... | expand -t 8,16,24,32,40,80 Or when using in combination with objdump option --visualize-jumps: ... | expand | sed -e 's/ *#/\t#/' | expand -t 1,80 Note that the instruction descriptions add about 128 KB to s390-opc.o: s390-opc.o without instruction descriptions: 216368 bytes s390-opc.o with instruction descriptions : 348432 bytes binutils/ * NEWS: Mention new s390-specific disassembler option "insndesc". include/ * opcode/s390.h (struct s390_opcode): Add field to hold instruction description. opcodes/ * s390-mkopc.c: Copy instruction description from s390-opc.txt into generated operation code table s390-opc.tab. * s390-opc.c (s390_opformats): Provide NULL as description in .insn pseudo-mnemonics opcode table. * s390-dis.c: Add s390 specific disassembler option "insndesc" and optionally print the instruction description as comment in the disassembly when it is specified. Signed-off-by: Jens Remus Reviewed-by: Andreas Krebbel --- binutils/NEWS | 5 ++++ include/opcode/s390.h | 5 +++- opcodes/s390-dis.c | 13 ++++++++- opcodes/s390-mkopc.c | 18 ++++++++----- opcodes/s390-opc.c | 62 +++++++++++++++++++++---------------------- 5 files changed, 63 insertions(+), 40 deletions(-) diff --git a/binutils/NEWS b/binutils/NEWS index 73df7053be4..35b84e62b95 100644 --- a/binutils/NEWS +++ b/binutils/NEWS @@ -19,6 +19,11 @@ * objdump --visualize-jumps is now supported on s390 architecture. +* The s390 disassembly now optionally includes the instruction description as + comment with the s390-specific disassembler option "insndesc": + - For objdump it can be enabled with "objdump -M insndesc ...". + - In gdb it can be enabled with "set disassembler-options insndesc". + Changes in 2.41: * The MIPS port now supports the Sony Interactive Entertainment Allegrex diff --git a/include/opcode/s390.h b/include/opcode/s390.h index d540e1dfd00..319bfe2d629 100644 --- a/include/opcode/s390.h +++ b/include/opcode/s390.h @@ -81,7 +81,7 @@ enum s390_opcode_cpu_val struct s390_opcode { - /* The opcode name. */ + /* The opcode name (mnemonic). */ const char * name; /* The opcode itself. Those bits which will be filled in with @@ -110,6 +110,9 @@ struct s390_opcode /* Instruction specific flags. */ unsigned int flags; + + /* Instruction description. */ + const char * description; }; /* The table itself is sorted by major opcode number, and is otherwise diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c index 8c8a98c4e24..fca965fbb5d 100644 --- a/opcodes/s390-dis.c +++ b/opcodes/s390-dis.c @@ -31,6 +31,7 @@ static int opc_index[256]; static int current_arch_mask = 0; static int option_use_insn_len_bits_p = 0; +static int option_print_insn_desc = 0; typedef struct { @@ -43,7 +44,8 @@ static const s390_options_t options[] = { "esa" , N_("Disassemble in ESA architecture mode") }, { "zarch", N_("Disassemble in z/Architecture mode") }, { "insnlength", N_("Print unknown instructions according to " - "length from first two bits") } + "length from first two bits") }, + { "insndesc", N_("Print instruction description as comment") }, }; /* Set up index table for first opcode byte. */ @@ -63,6 +65,7 @@ disassemble_init_s390 (struct disassemble_info *info) current_arch_mask = 1 << S390_OPCODE_ZARCH; option_use_insn_len_bits_p = 0; + option_print_insn_desc = 0; for (p = info->disassembler_options; p != NULL; ) { @@ -72,6 +75,8 @@ disassemble_init_s390 (struct disassemble_info *info) current_arch_mask = 1 << S390_OPCODE_ZARCH; else if (startswith (p, "insnlength")) option_use_insn_len_bits_p = 1; + else if (startswith (p, "insndesc")) + option_print_insn_desc = 1; else /* xgettext:c-format */ opcodes_error_handler (_("unknown S/390 disassembler option: %s"), p); @@ -311,6 +316,12 @@ s390_print_insn_with_opcode (bfd_vma memaddr, else separator = ','; } + + /* Optional: instruction name. */ + if (option_print_insn_desc && opcode->description + && opcode->description[0] != '\0') + info->fprintf_styled_func (info->stream, dis_style_comment_start, "\t# %s", + opcode->description); } /* Check whether opcode A's mask is more specific than that of B. */ diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index 5f921ee0628..80ffe42978c 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -32,6 +32,7 @@ struct op_struct int mode_bits; int min_cpu; int flags; + char description[80]; unsigned long long sort_value; int no_nibbles; @@ -53,7 +54,7 @@ createTable (void) static void insertOpcode (char *opcode, char *mnemonic, char *format, - int min_cpu, int mode_bits, int flags) + int min_cpu, int mode_bits, int flags, char* description) { char *str; unsigned long long sort_value; @@ -98,6 +99,7 @@ insertOpcode (char *opcode, char *mnemonic, char *format, op_array[ix].min_cpu = min_cpu; op_array[ix].mode_bits = mode_bits; op_array[ix].flags = flags; + strcpy(op_array[ix].description, description); no_ops++; } @@ -159,7 +161,7 @@ const struct s390_cond_ext_format s390_crb_extensions[NUM_CRB_EXTENSIONS] = static void insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, - int min_cpu, int mode_bits, int flags) + int min_cpu, int mode_bits, int flags, char *description) { char *tag; char prefix[15]; @@ -172,7 +174,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, if (!(tag = strpbrk (mnemonic, "*$"))) { - insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits, flags); + insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits, flags, description); return; } @@ -252,7 +254,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, opcode[mask_start] = ext_table[i].nibble; strcat (new_mnemonic, ext_table[i].extension); strcat (new_mnemonic, suffix); - insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags); + insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags, description); } return; @@ -273,7 +275,8 @@ static const char file_header[] = " instruction which matches.\n" " MODE_BITS - zarch or esa\n" " MIN_CPU - number of the min cpu level required\n" - " FLAGS - instruction flags. */\n\n" + " FLAGS - instruction flags.\n" + " DESCRIPTION - description of the instruction. */\n\n" "const struct s390_opcode s390_opcodes[] =\n {\n"; /* `dumpTable': write opcode table. */ @@ -299,7 +302,8 @@ dumpTable (void) op_array[ix].format, op_array[ix].format); printf ("%i, ", op_array[ix].mode_bits); printf ("%i, ", op_array[ix].min_cpu); - printf ("%i}", op_array[ix].flags); + printf ("%i, ", op_array[ix].flags); + printf ("\"%s\" }", op_array[ix].description); if (ix < no_ops-1) printf (",\n"); else @@ -452,7 +456,7 @@ main (void) str++; } while (*str != 0); } - insertExpandedMnemonic (opcode, mnemonic, format, min_cpu, mode_bits, flag_bits); + insertExpandedMnemonic (opcode, mnemonic, format, min_cpu, mode_bits, flag_bits, description); } dumpTable (); diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index cbfdb3df0b7..e44621a7479 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -774,37 +774,37 @@ unused_s390_operands_static_asserts (void) const struct s390_opcode s390_opformats[] = { - { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 ,0 }, - { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 ,0 }, - { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 ,0 }, - { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 ,0 }, - { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0 ,0 }, - { "ris", OP8(0x00LL), MASK_RIS_RURDI, INSTR_RIS_RURDI, 3, 6 ,0 }, - { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 ,0 }, - { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 ,0 }, - { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 ,0 }, - { "rrs", OP8(0x00LL), MASK_RRS_RRRDU, INSTR_RRS_RRRDU, 3, 6 ,0 }, - { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 ,0 }, - { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 ,0 }, - { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 ,0 }, - { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3 ,0 }, - { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 ,0 }, - { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 ,0 }, - { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR, 3, 0 ,0 }, - { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3 ,0 }, - { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 ,0 }, - { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 ,0 }, - { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3 ,0 }, - { "sil", OP8(0x00LL), MASK_SIL_RDI, INSTR_SIL_RDI, 3, 6 ,0 }, - { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0 ,0 }, - { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 ,0 }, - { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 3, 0 ,0 }, - { "vrv", OP8(0x00LL), MASK_VRV_VVXRDU, INSTR_VRV_VVXRDU, 3, 9 ,0 }, - { "vri", OP8(0x00LL), MASK_VRI_VVUUU, INSTR_VRI_VVUUU, 3, 9 ,0 }, - { "vrx", OP8(0x00LL), MASK_VRX_VRRDU, INSTR_VRX_VRRDU, 3, 9 ,0 }, - { "vrs", OP8(0x00LL), MASK_VRS_RVRDU, INSTR_VRS_RVRDU, 3, 9 ,0 }, - { "vrr", OP8(0x00LL), MASK_VRR_VVV0UUU, INSTR_VRR_VVV0UUU, 3, 9 ,0 }, - { "vsi", OP8(0x00LL), MASK_VSI_URDV, INSTR_VSI_URDV, 3, 10 ,0 }, + { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0, 0, NULL }, + { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0, 0, NULL }, + { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0, 0, NULL }, + { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0, 0, NULL }, + { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0, 0, NULL }, + { "ris", OP8(0x00LL), MASK_RIS_RURDI, INSTR_RIS_RURDI, 3, 6, 0, NULL }, + { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0, 0, NULL }, + { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0, 0, NULL }, + { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0, 0, NULL }, + { "rrs", OP8(0x00LL), MASK_RRS_RRRDU, INSTR_RRS_RRRDU, 3, 6, 0, NULL }, + { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0, 0, NULL }, + { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0, 0, NULL }, + { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0, 0, NULL }, + { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3, 0, NULL }, + { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0, 0, NULL }, + { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0, 0, NULL }, + { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR, 3, 0, 0, NULL }, + { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3, 0, NULL }, + { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0, 0, NULL }, + { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0, 0, NULL }, + { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3, 0, NULL }, + { "sil", OP8(0x00LL), MASK_SIL_RDI, INSTR_SIL_RDI, 3, 6, 0, NULL }, + { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0, 0, NULL }, + { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0, 0, NULL }, + { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 3, 0, 0, NULL }, + { "vrv", OP8(0x00LL), MASK_VRV_VVXRDU, INSTR_VRV_VVXRDU, 3, 9, 0, NULL }, + { "vri", OP8(0x00LL), MASK_VRI_VVUUU, INSTR_VRI_VVUUU, 3, 9, 0, NULL }, + { "vrx", OP8(0x00LL), MASK_VRX_VRRDU, INSTR_VRX_VRRDU, 3, 9, 0, NULL }, + { "vrs", OP8(0x00LL), MASK_VRS_RVRDU, INSTR_VRS_RVRDU, 3, 9, 0, NULL }, + { "vrr", OP8(0x00LL), MASK_VRR_VVV0UUU, INSTR_VRR_VVV0UUU, 3, 9, 0, NULL }, + { "vsi", OP8(0x00LL), MASK_VSI_URDV, INSTR_VSI_URDV, 3, 10, 0, NULL }, }; const int s390_num_opformats =