From patchwork Tue Nov 28 02:32:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 80852 X-Patchwork-Delegate: kito.cheng@gmail.com Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2167F3847713 for ; Tue, 28 Nov 2023 02:33:37 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from zg8tmtu5ljg5lje1ms4xmtka.icoremail.net (zg8tmtu5ljg5lje1ms4xmtka.icoremail.net [159.89.151.119]) by sourceware.org (Postfix) with ESMTP id 4D5383858C36 for ; Tue, 28 Nov 2023 02:33:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4D5383858C36 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4D5383858C36 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=159.89.151.119 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138802; cv=none; b=GUv24AkOOnQIwX0RNcLeB9ofsdbjpWFKdXx1QMZGxdPdKkhcu+GSXTPvbhPZuMr7lwxGys4HNMXU+x/tBf8ehi1p5hOPPqCROBzkXI07rybaf1um7gXiaeFGM1F0IY/REWS3ZtuLRoE0MEHX1+ME+0hEvP6Fb57c8zJ5jhQHaU8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138802; c=relaxed/simple; bh=aCJFlpJvezlrTDQIGsg0Jlj8OSiBPE1HXdnzUPpU7Y0=; h=From:To:Subject:Date:Message-Id; b=UBxusljQwhLcNGWzLQkTeJSkf41GjAsxYxud4F9Nj+usNiJoyA6ZF1uYqtE8u2Ltj48tnuWdCUpJQSlVkaIuC418VLNp3zpLmtCprKBFS4HoUZGLAgllCxGBGjuBm8XbatCDVBNfU7jTFTLFMjupjlgO7vTw5rKCjvVjEipfVO4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgA3H4E0UWVl1pkBAA--.18663S4; Tue, 28 Nov 2023 10:32:21 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, zengxiao@eswincomputing.com, Fei Gao Subject: [PATCH 1/4] [RISC-V] prefer Zicond primitive semantics to SFB Date: Tue, 28 Nov 2023 02:32:24 +0000 Message-Id: <20231128023227.36200-1-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 X-CM-TRANSID: TAJkCgA3H4E0UWVl1pkBAA--.18663S4 X-Coremail-Antispam: 1UD129KBjvJXoW3Ar4xCr45GrW8Xr4kur18uFg_yoW7ZFy8pr WDCw4akFy8AF93G34ftFy7Jr1Y9r1xGFyY9r97Wr1DZFZ8G34fKFn2kr1aqrnxAFs3Ar1a 9FZ29FyY9ayUJaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkI14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26r xl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVCm-wCF 04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r 18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vI r41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr 1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvE x4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7VUbXdbUUUUUU== X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, RCVD_IN_VALIDITY_RPBL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Move Zicond md files ahead of SFB to recognize Zicond first. Take the following case for example. CFLAGS: -mtune=sifive-7-series -march=rv64gc_zicond -mabi=lp64d long primitiveSemantics_00(long a, long b) { return a == 0 ? 0 : b; } before patch: primitiveSemantics_00: bne a0,zero,1f # movcc mv a1,zero 1: mv a0,a1 ret after patch: primitiveSemantics_00: czero.eqz a0,a1,a0 ret Co-authored-by: Xiao Zeng gcc/ChangeLog: * config/riscv/riscv.md (*movcc):move to sfb.md * config/riscv/sfb.md: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond-sfb-primitiveSemantics.c: New test. --- gcc/config/riscv/riscv.md | 19 +------ gcc/config/riscv/sfb.md | 37 ++++++++++++++ .../riscv/zicond-sfb-primitiveSemantics.c | 50 +++++++++++++++++++ 3 files changed, 88 insertions(+), 18 deletions(-) create mode 100644 gcc/config/riscv/sfb.md create mode 100644 gcc/testsuite/gcc.target/riscv/zicond-sfb-primitiveSemantics.c diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 935eeb7fd8e..d020988446f 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2711,24 +2711,6 @@ DONE; }) -;; Patterns for implementations that optimize short forward branches. - -(define_insn "*movcc" - [(set (match_operand:GPR 0 "register_operand" "=r,r") - (if_then_else:GPR - (match_operator 5 "ordered_comparison_operator" - [(match_operand:X 1 "register_operand" "r,r") - (match_operand:X 2 "reg_or_0_operand" "rJ,rJ")]) - (match_operand:GPR 3 "register_operand" "0,0") - (match_operand:GPR 4 "sfb_alu_operand" "rJ,IL")))] - "TARGET_SFB_ALU" - "@ - b%C5\t%1,%z2,1f\t# movcc\;mv\t%0,%z4\n1: - b%C5\t%1,%z2,1f\t# movcc\;li\t%0,%4\n1:" - [(set_attr "length" "8") - (set_attr "type" "sfb_alu") - (set_attr "mode" "")]) - ;; Used to implement built-in functions. (define_expand "condjump" [(set (pc) @@ -3748,5 +3730,6 @@ (include "generic-ooo.md") (include "vector.md") (include "zicond.md") +(include "sfb.md") (include "zc.md") (include "corev.md") diff --git a/gcc/config/riscv/sfb.md b/gcc/config/riscv/sfb.md new file mode 100644 index 00000000000..52af4b17d46 --- /dev/null +++ b/gcc/config/riscv/sfb.md @@ -0,0 +1,37 @@ +;; Machine description for short forward branches(SFB). +;; Copyright (C) 2023 Free Software Foundation, Inc. + +;; This file is part of GCC. + +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. + +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + + +;; Patterns for implementations that optimize short forward branches. + +(define_insn "*movcc" + [(set (match_operand:GPR 0 "register_operand" "=r,r") + (if_then_else:GPR + (match_operator 5 "ordered_comparison_operator" + [(match_operand:X 1 "register_operand" "r,r") + (match_operand:X 2 "reg_or_0_operand" "rJ,rJ")]) + (match_operand:GPR 3 "register_operand" "0,0") + (match_operand:GPR 4 "sfb_alu_operand" "rJ,IL")))] + "TARGET_SFB_ALU" + "@ + b%C5\t%1,%z2,1f\t# movcc\;mv\t%0,%z4\n1: + b%C5\t%1,%z2,1f\t# movcc\;li\t%0,%4\n1:" + [(set_attr "length" "8") + (set_attr "type" "sfb_alu") + (set_attr "mode" "")]) diff --git a/gcc/testsuite/gcc.target/riscv/zicond-sfb-primitiveSemantics.c b/gcc/testsuite/gcc.target/riscv/zicond-sfb-primitiveSemantics.c new file mode 100644 index 00000000000..2c60656d5eb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond-sfb-primitiveSemantics.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=sifive-7-series -march=rv64gc_zicond -mabi=lp64d" { target { rv64 } } } */ +/* { dg-options "-mtune=sifive-7-series -march=rv32gc_zicond -mabi=ilp32f" { target { rv32 } } } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-Og"} } */ + +long primitiveSemantics_00(long a, long b) { return a == 0 ? 0 : b; } + +long primitiveSemantics_01(long a, long b) { return a != 0 ? 0 : b; } + +long primitiveSemantics_02(long a, long b) { return a == 0 ? b : 0; } + +long primitiveSemantics_03(long a, long b) { return a != 0 ? b : 0; } + +long primitiveSemantics_04(long a, long b) { + if (a) + b = 0; + return b; +} + +long primitiveSemantics_05(long a, long b) { + if (!a) + b = 0; + return b; +} + +int primitiveSemantics_06(int a, int b) { return a == 0 ? 0 : b; } + +int primitiveSemantics_07(int a, int b) { return a != 0 ? 0 : b; } + +int primitiveSemantics_08(int a, int b) { return a == 0 ? b : 0; } + +int primitiveSemantics_09(int a, int b) { return a != 0 ? b : 0; } + +int primitiveSemantics_10(int a, int b) { + if (a) + b = 0; + return b; +} + +int primitiveSemantics_11(int a, int b) { + if (!a) + b = 0; + return b; +} + +/* { dg-final { scan-assembler-times {\mczero\.eqz\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mczero\.nez\M} 6 } } */ +/* { dg-final { scan-assembler-not {\mbeq\M} } } */ +/* { dg-final { scan-assembler-not {\mbne\M} } } */ +/* { dg-final { scan-assembler-not {\mmovcc\M} } } */ From patchwork Tue Nov 28 02:32:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 80855 X-Patchwork-Delegate: jlaw@ventanamicro.com Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C92B4385E021 for ; Tue, 28 Nov 2023 02:34:11 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from azure-sdnproxy.icoremail.net (azure-sdnproxy.icoremail.net [207.46.229.174]) by sourceware.org (Postfix) with ESMTP id 98DF8385829F for ; Tue, 28 Nov 2023 02:33:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 98DF8385829F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 98DF8385829F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=207.46.229.174 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138804; cv=none; b=LvmtTf7JProB8BHF9sRpOhMoTjD167WT99wzZrRg999ZXJ4Fneq6LPGVbboOsj5ROdABb1PEmonohz0QYd1RfYeHBcAMUGw0XrmyONNn8TmdZ7dU/4UM6ii2Nt+KUApMe9F9yaTMQV8IX/a1RVW3+SE1QeHob35zR6mZqc6vMUI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138804; c=relaxed/simple; bh=DFyqv+TlXWpxDi7qLK0jTNoQ2p/OuWaOXkSf/KkXB2Q=; h=From:To:Subject:Date:Message-Id; b=moox1btp95UubYB2E25xmmY6N3bov28Gv15pUzqYUq6yeUwEXuTmrAKfoaK7P2OeevvqKbQ4HVfUjs75TYlIIZKLdoryJTFMm9XSM2gaOWQuuBKgCnnjC1TcyMspbtrap6Np6Dx6yb0jXcqr9fSofpcsAua/JmQ7bBc3Tmh1Aug= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgA3H4E0UWVl1pkBAA--.18663S5; Tue, 28 Nov 2023 10:32:23 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, zengxiao@eswincomputing.com, Fei Gao Subject: [PATCH 2/4] [ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns Date: Tue, 28 Nov 2023 02:32:25 +0000 Message-Id: <20231128023227.36200-2-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231128023227.36200-1-gaofei@eswincomputing.com> References: <20231128023227.36200-1-gaofei@eswincomputing.com> X-CM-TRANSID: TAJkCgA3H4E0UWVl1pkBAA--.18663S5 X-Coremail-Antispam: 1UD129KBjvAXoWfJw1DCFWkGF1rKw1xAFy8uFg_yoW8WF15Ao WfZrZ8tF40gr13WF1xGr4Y9r1jqa1UZr98Cr4Yvr1Y9rWqyrySgw4rWa1DZa48Wr4S9ry7 Aanaqr1Iy3y5Arnxn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYC7AC8VAFwI0_Gr0_Xr1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r18M28IrcIa0x kI8VCY1x0267AKxVWUCVW8JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s0D M2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjx v20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1l F7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVCm-wCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JUyKZAUUUUU= X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, LIKELY_SPAM_BODY, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org op=[PLUS, MINUS, IOR, XOR, ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT] SIGN_EXTEND, ZERO_EXTEND and SUBREG has been considered to support SImode in 64-bit machine. Conditional op, if zero rd = (rc == 0) ? (rs1 op rs2) : rs1 --> czero.nez rd, rs2, rc op rd, rs1, rd Conditional op, if non-zero rd = (rc != 0) ? (rs1 op rs2) : rs1 --> czero.eqz rd, rs2, rc op rd, rs1, rd Co-authored-by: Xiao Zeng gcc/ChangeLog: * ifcvt.cc (noce_try_cond_zero_arith):handler for condtional zero based ifcvt (noce_emit_czero): helper for noce_try_cond_zero_arith (noce_cond_zero_binary_op_supported): check supported OPs for condtional zero based ifcvt (get_base_reg): get base reg of a subreg or the reg itself (noce_bbs_ok_for_cond_zero_arith): check if BBs are OK for condtional zero based ifcvt (noce_process_if_block): add noce_try_cond_zero_arith gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond_ifcvt_opt.c: New test. --- gcc/ifcvt.cc | 210 ++++++ .../gcc.target/riscv/zicond_ifcvt_opt.c | 682 ++++++++++++++++++ 2 files changed, 892 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index a0af553b9ff..8f6a0e7f5fe 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -787,6 +787,7 @@ static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **); static bool noce_try_minmax (struct noce_if_info *); static bool noce_try_abs (struct noce_if_info *); static bool noce_try_sign_mask (struct noce_if_info *); +static int noce_try_cond_zero_arith (struct noce_if_info *); /* Return the comparison code for reversed condition for IF_INFO, or UNKNOWN if reversing the condition is not possible. */ @@ -1831,6 +1832,40 @@ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code, return NULL_RTX; } +/* Emit a conditional zero, returning TARGET or NULL_RTX upon failure. + IF_INFO describes the if-conversion scenario under consideration. + CZERO_CODE selects the condition (EQ/NE). + NON_ZERO_OP is the nonzero operand of the conditional move + TARGET is the desired output register. */ + +static rtx +noce_emit_czero (struct noce_if_info *if_info, enum rtx_code czero_code, + rtx non_zero_op, rtx target) +{ + machine_mode mode = GET_MODE (target); + rtx cond_op0 = XEXP (if_info->cond, 0); + rtx czero_cond + = gen_rtx_fmt_ee (czero_code, GET_MODE (cond_op0), cond_op0, const0_rtx); + rtx if_then_else + = gen_rtx_IF_THEN_ELSE (mode, czero_cond, const0_rtx, non_zero_op); + rtx set = gen_rtx_SET (target, if_then_else); + + start_sequence (); + rtx_insn *insn = emit_insn (set); + + if (recog_memoized (insn) >= 0) + { + rtx_insn *seq = get_insns (); + end_sequence (); + emit_insn (seq); + + return target; + } + + end_sequence (); + return NULL_RTX; +} + /* Try only simple constants and registers here. More complex cases are handled in noce_try_cmove_arith after noce_try_store_flag_arith has had a go at it. */ @@ -2880,6 +2915,178 @@ noce_try_sign_mask (struct noce_if_info *if_info) return true; } +/* Check if OP is supported by conditional zero based if conversion, + returning TRUE if satisfied otherwise FALSE. + + OP is the operation to check. */ + +static bool +noce_cond_zero_binary_op_supported (rtx op) +{ + enum rtx_code opcode = GET_CODE (op); + + /* Strip SIGN_EXTEND or ZERO_EXTEND if any. */ + if (opcode == SIGN_EXTEND || opcode == ZERO_EXTEND) + opcode = GET_CODE (XEXP (op, 0)); + + if (opcode == PLUS || opcode == MINUS || opcode == IOR || opcode == XOR + || opcode == ASHIFT || opcode == ASHIFTRT || opcode == LSHIFTRT + || opcode == ROTATE || opcode == ROTATERT) + return true; + + return false; +} + +/* Helper function to return REG itself or inner expression of a SUBREG, + otherwise NULL_RTX for other RTX_CODE. */ + +static rtx +get_base_reg (rtx exp) +{ + if (REG_P (exp)) + return exp; + else if (SUBREG_P (exp)) + return SUBREG_REG (exp); + + return NULL_RTX; +} + +/* Check if IF-BB and THEN-BB satisfy the condition for conditional zero + based if conversion, returning TRUE if satisfied otherwise FALSE. + + IF_INFO describes the if-conversion scenario under consideration. + COMMON_PTR points to the common REG of canonicalized IF_INFO->A and + IF_INFO->B. + CZERO_CODE_PTR points to the comparison code to use in czero RTX. + A_PTR points to the A expression of canonicalized IF_INFO->A. + TO_REPLACE points to the RTX to be replaced by czero RTX destnation. */ + +static bool +noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, + enum rtx_code *czero_code_ptr, rtx *a_ptr, + rtx **to_replace) +{ + rtx common = NULL_RTX; + rtx cond = if_info->cond; + rtx a = copy_rtx (if_info->a); + rtx b = copy_rtx (if_info->b); + rtx bin_op1 = NULL_RTX; + enum rtx_code czero_code = UNKNOWN; + bool reverse = false; + rtx op0, op1, bin_exp; + + if (!noce_simple_bbs (if_info)) + return false; + + /* COND must be EQ or NE comparision of a reg and 0. */ + if (GET_CODE (cond) != NE && GET_CODE (cond) != EQ) + return false; + if (!REG_P (XEXP (cond, 0)) || !rtx_equal_p (XEXP (cond, 1), const0_rtx)) + return false; + + /* Canonicalize x = y : (y op z) to x = (y op z) : y. */ + if (REG_P (a) && noce_cond_zero_binary_op_supported (b)) + { + std::swap (a, b); + reverse = !reverse; + } + + /* Check if x = (y op z) : y is supported by czero based ifcvt. */ + if (!(noce_cond_zero_binary_op_supported (a) && REG_P (b))) + return false; + + /* Strip sign_extend if any. */ + if (GET_CODE (a) == SIGN_EXTEND || GET_CODE (a) == ZERO_EXTEND) + bin_exp = XEXP (a, 0); + else + bin_exp = a; + + /* Canonicalize x = (z op y) : y to x = (y op z) : y */ + op1 = get_base_reg (XEXP (bin_exp, 1)); + if (op1 && rtx_equal_p (op1, b) && COMMUTATIVE_ARITH_P (bin_exp)) + std::swap (XEXP (bin_exp, 0), XEXP (bin_exp, 1)); + + op0 = get_base_reg (XEXP (bin_exp, 0)); + if (op0 && rtx_equal_p (op0, b)) + { + common = b; + bin_op1 = XEXP (bin_exp, 1); + czero_code = reverse + ? noce_reversed_cond_code (if_info) + : GET_CODE (cond); + } + else + return false; + + if (czero_code == UNKNOWN) + return false; + + if (CONST_INT_P (bin_op1) || REG_P (bin_op1)) + *to_replace = &XEXP (bin_exp, 1); + else if (SUBREG_P (bin_op1)) + *to_replace = &SUBREG_REG (XEXP (bin_exp, 1)); + else + return false; + + *common_ptr = common; + *czero_code_ptr = czero_code; + *a_ptr = a; + + return true; +} + +/* Try to covert if-then-else with conditional zero, + returning TURE on success or FALSE on failure. + IF_INFO describes the if-conversion scenario under consideration. */ + +static int +noce_try_cond_zero_arith (struct noce_if_info *if_info) +{ + rtx target, a; + rtx_insn *seq; + machine_mode mode = GET_MODE (if_info->x); + rtx common = NULL_RTX; + enum rtx_code czero_code = UNKNOWN; + rtx non_zero_op = NULL_RTX; + rtx *to_replace = NULL; + + if (!noce_bbs_ok_for_cond_zero_arith (if_info, &common, &czero_code, &a, + &to_replace)) + return false; + + /* Disallow CONST_INT currently for simplicity*/ + if (to_replace == NULL || !REG_P (*to_replace)) + return false; + + non_zero_op = *to_replace; + + start_sequence (); + + /* If x is used in both input and out like x = c ? x + z : x, + use a new reg to avoid modifying x */ + if (common && rtx_equal_p (common, if_info->x)) + target = gen_reg_rtx (mode); + else + target = if_info->x; + + target = noce_emit_czero (if_info, czero_code, non_zero_op, target); + if (!target || !to_replace) + { + end_sequence (); + return false; + } + + *to_replace = target; + emit_insn (gen_rtx_SET (if_info->x, a)); + + seq = end_ifcvt_sequence (if_info); + if (!seq || !targetm.noce_conversion_profitable_p (seq, if_info)) + return false; + + emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a)); + if_info->transform_name = "noce_try_cond_zero_arith"; + return true; +} /* Optimize away "if (x & C) x |= C" and similar bit manipulation transformations. */ @@ -3975,6 +4182,9 @@ noce_process_if_block (struct noce_if_info *if_info) goto success; if (noce_try_store_flag_mask (if_info)) goto success; + if (HAVE_conditional_move + && noce_try_cond_zero_arith (if_info)) + goto success; if (HAVE_conditional_move && noce_try_cmove_arith (if_info)) goto success; diff --git a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c new file mode 100644 index 00000000000..9357f26d978 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c @@ -0,0 +1,682 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc_zbb_zicond -mabi=lp64d -O2 " } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ + +long +test_ADD_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y + z; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x (long x, long z, long c) +{ + if (c) + x = x + z; + + return x; +} + +long +test_ADD_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y + z; + return x; +} + +long +test_ADD_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x + z; + return x; +} + +long +test_ADD_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y + z; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x + z; + + return x; +} + +long +test_ADD_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y + z; + return x; +} + +long +test_ADD_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x + z; + return x; +} + +long +test_SUB_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y - z; + else + x = y; + return x; +} + +long +test_SUB_ceqz_x (long x, long z, long c) +{ + if (c) + x = x - z; + + return x; +} + +long +test_SUB_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y - z; + return x; +} + +long +test_SUB_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x - z; + return x; +} + +long +test_SUB_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y - z; + else + x = y; + return x; +} + +long +test_SUB_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x - z; + + return x; +} + +long +test_SUB_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y - z; + return x; +} + +long +test_SUB_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x - z; + return x; +} + +long +test_IOR_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y | z; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x (long x, long z, long c) +{ + if (c) + x = x | z; + + return x; +} + +long +test_IOR_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y | z; + return x; +} + +long +test_IOR_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x | z; + return x; +} + +long +test_IOR_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y | z; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x | z; + + return x; +} + +long +test_IOR_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y | z; + return x; +} + +long +test_IOR_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x | z; + return x; +} + +long +test_XOR_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y ^ z; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x (long x, long z, long c) +{ + if (c) + x = x ^ z; + + return x; +} + +long +test_XOR_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y ^ z; + return x; +} + +long +test_XOR_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x ^ z; + return x; +} + +long +test_XOR_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y ^ z; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x ^ z; + + return x; +} + +long +test_XOR_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y ^ z; + return x; +} + +long +test_XOR_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x ^ z; + return x; +} + +long +test_ADD_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z + y; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z + x; + + return x; +} + +long +test_ADD_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z + y; + return x; +} + +long +test_ADD_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z + x; + return x; +} + +long +test_ADD_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z + y; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z + x; + + return x; +} + +long +test_ADD_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z + y; + return x; +} + +long +test_ADD_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z + x; + return x; +} + +long +test_IOR_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z | y; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z | x; + + return x; +} + +long +test_IOR_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z | y; + return x; +} + +long +test_IOR_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z | x; + return x; +} + +long +test_IOR_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z | y; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z | x; + + return x; +} + +long +test_IOR_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z | y; + return x; +} + +long +test_IOR_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z | x; + return x; +} + +long +test_XOR_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z ^ y; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z ^ x; + + return x; +} + +long +test_XOR_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z ^ y; + return x; +} + +long +test_XOR_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z ^ x; + return x; +} + +long +test_XOR_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z ^ y; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z ^ x; + + return x; +} + +long +test_XOR_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z ^ y; + return x; +} + +long +test_XOR_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z ^ x; + return x; +} + +long +test_ShiftLeft_eqz (long x, long y, long z, long c) +{ + if (c) + x = y << z; + else + x = y; + return x; +} + +long +test_ShiftR_eqz (long x, long y, long z, long c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned long +test_ShiftR_logical_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned long +test_RotateL_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = (y << z) | (y >> (64 - z)); + else + x = y; + return x; +} + +unsigned long +test_RotateR_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = (y >> z) | (y << (64 - z)); + else + x = y; + return x; +} + +int +test_ADD_ceqz_int (int x, int y, int z, int c) +{ + if (c) + x = y + z; + else + x = y; + return x; +} + +int +test_ShiftLeft_eqz_int (int x, int y, int z, int c) +{ + if (c) + x = y << z; + else + x = y; + return x; +} + +int +test_ShiftR_eqz_int (int x, int y, int z, int c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned int +test_ShiftR_logical_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned int +test_RotateL_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = (y << z) | (y >> (32 - z)); + else + x = y; + return x; +} + +unsigned int +test_RotateR_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = (y >> z) | (y << (32 - z)); + else + x = y; + return x; +} + +/* { dg-final { scan-assembler-times {czero\.eqz} 39 } } */ +/* { dg-final { scan-assembler-times {czero\.nez} 28 } } */ From patchwork Tue Nov 28 02:32:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 80853 X-Patchwork-Delegate: jlaw@ventanamicro.com Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E6EA5384CBBF for ; Tue, 28 Nov 2023 02:33:40 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from zg8tmty3ljk5ljewns4xndka.icoremail.net (zg8tmty3ljk5ljewns4xndka.icoremail.net [167.99.105.149]) by sourceware.org (Postfix) with ESMTP id E156F3858012 for ; Tue, 28 Nov 2023 02:33:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E156F3858012 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E156F3858012 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=167.99.105.149 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138804; cv=none; b=gVJDGPKBHGoJ2/k41ayCDVn1nGiuznXr5JYbDp4foh9B+CCj9dC2EJcakYWx+IzpDOZGMPw2kHPSJKegA+1Rfbwkr41TmomIMWv6pAe9L+dX1SP6yoo6UgCDTDpprRKgPJgTsM7Wc0Awzzck0q9+bwQN5zg7U1VZns20ABT7n4E= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138804; c=relaxed/simple; bh=fBOqiAucXLaCTDc4NRffkpMBpTI9xfR4jl1qjxgXfWI=; h=From:To:Subject:Date:Message-Id; b=wj/TyZB3p4HhD2A3YnNK5pwMGyji/0Cc+NCj0xDO5VSXZztzcnIKJ1AVzFNDOiuO5H/pwCRkvUJjdJ/7eS+XIzdSkYxqRoNmWAG2liGUcBRdwRqoqA+VO3dgtu+ePY1h1nJrd4X6E+18y+BD4WM3jXY1SCOfCpTA9Zlp65WTTgc= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgA3H4E0UWVl1pkBAA--.18663S6; Tue, 28 Nov 2023 10:32:25 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, zengxiao@eswincomputing.com, Fei Gao Subject: [PATCH 3/4] [ifcvt] optimize x=c ? (y op const_int) : y by RISC-V Zicond like insns Date: Tue, 28 Nov 2023 02:32:26 +0000 Message-Id: <20231128023227.36200-3-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231128023227.36200-1-gaofei@eswincomputing.com> References: <20231128023227.36200-1-gaofei@eswincomputing.com> X-CM-TRANSID: TAJkCgA3H4E0UWVl1pkBAA--.18663S6 X-Coremail-Antispam: 1UD129KBjvJXoWfGFy3XryUAr48uw48Jr43KFg_yoWkZr1kpF W3X34qkrs5JFyfXr48Gry3Jwn8CrWaqw1vq3s3Jry3GwnrJFZ5KrW0yw1Yvr97WFs3XF17 Aa98JF4vgrW7Ga7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBI14x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jryl82xGYIkIc2 x26xkF7I0E14v26r4j6ryUM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_tr0E3s1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJw A2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc2xSY4AK6svPMxAIw28Icx kI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2Iq xVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42 IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY 6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aV CY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUj8nY7UUUUU== X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org op=[PLUS, MINUS, IOR, XOR, ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT] Co-authored-by: Xiao Zeng gcc/ChangeLog: * ifcvt.cc (noce_cond_zero_shift_op_supported): check if OP is shift like operation (noce_cond_zero_binary_op_supported): restructure & call noce_cond_zero_shift_op_supported (noce_bbs_ok_for_cond_zero_arith): add bin_exp_ptr interface (noce_try_cond_zero_arith): add support for x=c ? (y op const_int) gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond_ifcvt_opt.c: add TCs for x=c ? (y op const_int) : y --- gcc/ifcvt.cc | 53 +- .../gcc.target/riscv/zicond_ifcvt_opt.c | 675 +++++++++++++++++- 2 files changed, 716 insertions(+), 12 deletions(-) diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 8f6a0e7f5fe..4cc6a125ff0 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -2920,6 +2920,16 @@ noce_try_sign_mask (struct noce_if_info *if_info) OP is the operation to check. */ +static bool +noce_cond_zero_shift_op_supported (enum rtx_code op) +{ + if (op == ASHIFT || op == ASHIFTRT || op == LSHIFTRT || op == ROTATE + || op == ROTATERT) + return true; + + return false; +} + static bool noce_cond_zero_binary_op_supported (rtx op) { @@ -2930,8 +2940,7 @@ noce_cond_zero_binary_op_supported (rtx op) opcode = GET_CODE (XEXP (op, 0)); if (opcode == PLUS || opcode == MINUS || opcode == IOR || opcode == XOR - || opcode == ASHIFT || opcode == ASHIFTRT || opcode == LSHIFTRT - || opcode == ROTATE || opcode == ROTATERT) + || noce_cond_zero_shift_op_supported (opcode)) return true; return false; @@ -2963,6 +2972,7 @@ get_base_reg (rtx exp) static bool noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, + rtx *bin_exp_ptr, enum rtx_code *czero_code_ptr, rtx *a_ptr, rtx **to_replace) { @@ -3029,6 +3039,7 @@ noce_bbs_ok_for_cond_zero_arith (struct noce_if_info *if_info, rtx *common_ptr, return false; *common_ptr = common; + *bin_exp_ptr = bin_exp; *czero_code_ptr = czero_code; *a_ptr = a; @@ -3047,20 +3058,28 @@ noce_try_cond_zero_arith (struct noce_if_info *if_info) machine_mode mode = GET_MODE (if_info->x); rtx common = NULL_RTX; enum rtx_code czero_code = UNKNOWN; + rtx bin_exp = NULL_RTX; + enum rtx_code bin_code = UNKNOWN; + rtx bin_op0 = NULL_RTX; rtx non_zero_op = NULL_RTX; rtx *to_replace = NULL; - if (!noce_bbs_ok_for_cond_zero_arith (if_info, &common, &czero_code, &a, - &to_replace)) + if (!noce_bbs_ok_for_cond_zero_arith (if_info, &common, &bin_exp, &czero_code, + &a, &to_replace)) return false; - /* Disallow CONST_INT currently for simplicity*/ - if (to_replace == NULL || !REG_P (*to_replace)) - return false; + start_sequence (); - non_zero_op = *to_replace; + bin_code = GET_CODE (bin_exp); + bin_op0 = XEXP (bin_exp, 0); - start_sequence (); + if (CONST_INT_P (*to_replace)) + { + non_zero_op = gen_reg_rtx (mode); + noce_emit_move_insn (non_zero_op, *to_replace); + } + else + non_zero_op = *to_replace; /* If x is used in both input and out like x = c ? x + z : x, use a new reg to avoid modifying x */ @@ -3076,7 +3095,21 @@ noce_try_cond_zero_arith (struct noce_if_info *if_info) return false; } - *to_replace = target; + if (CONST_INT_P (*to_replace)) + { + if (noce_cond_zero_shift_op_supported (bin_code)) + { + *to_replace = gen_rtx_SUBREG (E_QImode, target, 0); + if (GET_CODE (a) == ZERO_EXTEND && bin_code == LSHIFTRT) + PUT_CODE (a, SIGN_EXTEND); + } + else if (SUBREG_P (bin_op0)) + *to_replace = gen_rtx_SUBREG (GET_MODE (bin_op0), target, 0); + else + *to_replace = target; + } + else + *to_replace = target; emit_insn (gen_rtx_SET (if_info->x, a)); seq = end_ifcvt_sequence (if_info); diff --git a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c index 9357f26d978..c6b0518968b 100644 --- a/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c +++ b/gcc/testsuite/gcc.target/riscv/zicond_ifcvt_opt.c @@ -678,5 +678,676 @@ test_RotateR_eqz_int (unsigned int x, unsigned int y, unsigned int z, return x; } -/* { dg-final { scan-assembler-times {czero\.eqz} 39 } } */ -/* { dg-final { scan-assembler-times {czero\.nez} 28 } } */ +long +test_ADD_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y + 11; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_imm (long x, long c) +{ + if (c) + x = x + 11; + + return x; +} + +long +test_ADD_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y + 11; + return x; +} + +long +test_ADD_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x + 11; + return x; +} + +long +test_ADD_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y + 11; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x + 11; + + return x; +} + +long +test_ADD_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y + 11; + return x; +} + +long +test_ADD_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x + 11; + return x; +} + +long +test_SUB_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y - 11; + else + x = y; + return x; +} + +long +test_SUB_ceqz_x_imm (long x, long c) +{ + if (c) + x = x - 11; + + return x; +} + +long +test_SUB_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y - 11; + return x; +} + +long +test_SUB_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x - 11; + return x; +} + +long +test_SUB_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y - 11; + else + x = y; + return x; +} + +long +test_SUB_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x - 11; + + return x; +} + +long +test_SUB_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y - 11; + return x; +} + +long +test_SUB_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x - 11; + return x; +} + +long +test_IOR_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y | 11; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_imm (long x, long c) +{ + if (c) + x = x | 11; + + return x; +} + +long +test_IOR_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y | 11; + return x; +} + +long +test_IOR_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x | 11; + return x; +} + +long +test_IOR_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y | 11; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x | 11; + + return x; +} + +long +test_IOR_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y | 11; + return x; +} + +long +test_IOR_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x | 11; + return x; +} + +long +test_XOR_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y ^ 11; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_imm (long x, long c) +{ + if (c) + x = x ^ 11; + + return x; +} + +long +test_XOR_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y ^ 11; + return x; +} + +long +test_XOR_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x ^ 11; + return x; +} + +long +test_XOR_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y ^ 11; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x ^ 11; + + return x; +} + +long +test_XOR_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y ^ 11; + return x; +} + +long +test_XOR_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x ^ 11; + return x; +} + +long +test_ADD_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 + y; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 + x; + + return x; +} + +long +test_ADD_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 + y; + return x; +} + +long +test_ADD_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 + x; + return x; +} + +long +test_ADD_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 + y; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 + x; + + return x; +} + +long +test_ADD_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 + y; + return x; +} + +long +test_ADD_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 + x; + return x; +} + +long +test_IOR_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 | y; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 | x; + + return x; +} + +long +test_IOR_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 | y; + return x; +} + +long +test_IOR_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 | x; + return x; +} + +long +test_IOR_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 | y; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 | x; + + return x; +} + +long +test_IOR_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 | y; + return x; +} + +long +test_IOR_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 | x; + return x; +} + +long +test_XOR_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 ^ y; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 ^ x; + + return x; +} + +long +test_XOR_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 ^ y; + return x; +} + +long +test_XOR_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 ^ x; + return x; +} + +long +test_XOR_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 ^ y; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 ^ x; + + return x; +} + +long +test_XOR_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 ^ y; + return x; +} + +long +test_XOR_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 ^ x; + return x; +} + +long +test_ShiftLeft_eqz_imm (long x, long y, long c) +{ + if (c) + x = y << 11; + else + x = y; + return x; +} + +long +test_ShiftR_eqz_imm (long x, long y, long c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned long +test_ShiftR_logical_eqz_imm (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned long +test_RotateL_eqz_imm (unsigned long x, unsigned long y, unsigned long c) +{ + if (c) + x = (y << 11) | (y >> (64 - 11)); + else + x = y; + return x; +} + +unsigned long +test_RotateR_eqz_imm (unsigned long x, unsigned long y, unsigned long c) +{ + if (c) + x = (y >> 11) | (y << (64 - 11)); + else + x = y; + return x; +} + +int +test_ADD_ceqz_imm_int (int x, int y, int c) +{ + if (c) + x = y + 11; + else + x = y; + return x; +} + +int +test_ShiftLeft_eqz_imm_int (int x, int y, int c) +{ + if (c) + x = y << 11; + else + x = y; + return x; +} + +int +test_ShiftR_eqz_imm_int (int x, int y, int c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned int +test_ShiftR_logical_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned int +test_RotateL_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = (y << 11) | (y >> (32 - 11)); + else + x = y; + return x; +} + +unsigned int +test_RotateR_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = (y >> 11) | (y << (32 - 11)); + else + x = y; + return x; +} + +/* { dg-final { scan-assembler-times {czero\.eqz} 78 } } */ +/* { dg-final { scan-assembler-times {czero\.nez} 56 } } */ From patchwork Tue Nov 28 02:32:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fei Gao X-Patchwork-Id: 80854 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D244A385AE6C for ; Tue, 28 Nov 2023 02:33:45 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from zg8tndyumtaxlji0oc4xnzya.icoremail.net (zg8tndyumtaxlji0oc4xnzya.icoremail.net [46.101.248.176]) by sourceware.org (Postfix) with ESMTP id 17B41385DC13 for ; Tue, 28 Nov 2023 02:33:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 17B41385DC13 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 17B41385DC13 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=46.101.248.176 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138807; cv=none; b=m4wemdidQWZejNh5LRQYp+vg6HMzTWBdo2zFvXIKcPTB49AyLJ8tHSBhiFz5lvpDfqPobL4A2LNR/qlCuqS/jz5/9WxHST9C/d3MeTSODKsViXESCvYnKWzdrAUnO0lQcOXGeKkoXqimK9oSy1fc4NiWa4Sn0VfkVfNxSak5gSA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701138807; c=relaxed/simple; bh=y3ASOncKEJTzacvEP3V6dQv+XnHta3GH+rPLRA5MJN4=; h=From:To:Subject:Date:Message-Id; b=nH9T/HC3ZT25GM7K7VZob7Ep0Er3a+9RkN4B/X+/27rH/Vv9yZ3q3TWxvOhhTTrAwXI5cRDbA/FdAYCgm0Uo6dON2JLty+a5zOT7m/pgBkrZQG9yjadIA5D1E/Jf6SgGZjohPOWDX/rxJJEzmjXNdIImFkPWoRrdcjFvNPOKaoo= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [10.12.130.31]) by app1 (Coremail) with SMTP id TAJkCgA3H4E0UWVl1pkBAA--.18663S7; Tue, 28 Nov 2023 10:32:26 +0800 (CST) From: Fei Gao To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, zengxiao@eswincomputing.com, Fei Gao Subject: [PATCH 4/4] [V2] [ifcvt] prefer SFB to Zicond for x=c ? (y op CONST) : y. Date: Tue, 28 Nov 2023 02:32:27 +0000 Message-Id: <20231128023227.36200-4-gaofei@eswincomputing.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231128023227.36200-1-gaofei@eswincomputing.com> References: <20231128023227.36200-1-gaofei@eswincomputing.com> X-CM-TRANSID: TAJkCgA3H4E0UWVl1pkBAA--.18663S7 X-Coremail-Antispam: 1UD129KBjvAXoW3tw1UuFWUZr4rZr47uw48Zwb_yoW8ZrWxCo WfZr98tF4vgr17Wr18Gr4YvF1jqF45Z34DKF4Yvr15XrWqyF4Sgw4rWa1Dta4rKFWS9ry7 AFsaqw1xK395Arsxn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYC7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r1rM28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr 1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s0D M2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjx v20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1l F7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkIecxEwVCm-wCF04k20x vY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I 3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIx AIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAI cVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2js IEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JU4q2_UUUUU= X-CM-SenderInfo: xjdrwv3l6h245lqf0zpsxwx03jof0z/ X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, LIKELY_SPAM_BODY, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org In x=c ? (y op CONST) : y cases, Zicond based czero ifcvt generates more true dependency in code sequence than SFB based movcc. So exit noce_try_cond_zero_arith in such cases to have a better code sequence generated by noce_try_cmove_arith. Take the following case for example. CFLAGS: -mtune=sifive-7-series -march=rv64gc_zbb_zicond -mabi=lp64d -O2 unsigned int test_RotateR_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) { if (c) x = (y >> 11) | (y << (32 - 11)); else x = y; return x; } before patch: li a5,11 czero.eqz a2,a5,a2 rorw a0,a1,a2 ret after patch: roriw a0,a1,11 bne a2,zero,1f # movcc mv a0,a1 1: ret Co-authored-by: Xiao Zeng gcc/ChangeLog: * config/riscv/riscv.cc (riscv_have_sfb): hook implementation (TARGET_HAVE_SFB): define hook in riscv * doc/tm.texi: add TARGET_HAVE_SFB * doc/tm.texi.in: add TARGET_HAVE_SFB * ifcvt.cc (noce_try_cond_zero_arith): prefer SFB for x=c ? (y op CONST) : y * target.def:add TARGET_HAVE_SFB gcc/testsuite/ChangeLog: * gcc.target/riscv/zicond_sfb_ifcvt_opt.c: New test. --- gcc/config/riscv/riscv.cc | 12 + gcc/doc/tm.texi | 4 + gcc/doc/tm.texi.in | 2 + gcc/ifcvt.cc | 4 +- gcc/target.def | 7 + .../gcc.target/riscv/zicond_sfb_ifcvt_opt.c | 1354 +++++++++++++++++ 6 files changed, 1382 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zicond_sfb_ifcvt_opt.c diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index d0efb939bf2..91fb4ebd653 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -10191,6 +10191,14 @@ riscv_vectorize_related_mode (machine_mode vector_mode, scalar_mode element_mode return default_vectorize_related_mode (vector_mode, element_mode, nunits); } +/* Implement TARGET_HAVE_SFB. */ + +bool +riscv_have_sfb (void) +{ + return TARGET_SFB_ALU; +} + /* Implement TARGET_VECTORIZE_VEC_PERM_CONST. */ static bool @@ -10536,6 +10544,10 @@ extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset) #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_ENDIAN) #endif +#undef TARGET_HAVE_SFB +#define TARGET_HAVE_SFB \ + riscv_have_sfb + #undef TARGET_VECTOR_MODE_SUPPORTED_P #define TARGET_VECTOR_MODE_SUPPORTED_P riscv_vector_mode_supported_p diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 645559ea084..9b4e3f71569 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -12149,6 +12149,10 @@ This target hook is required only when the target has several different modes and they have different conditional execution capability, such as ARM. @end deftypefn +@deftypefn {Target Hook} bool TARGET_HAVE_SFB (void) +This target hook returns true if the target supports Short Forward Branch. +@end deftypefn + @deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (rtx_insn **@var{prep_seq}, rtx_insn **@var{gen_seq}, rtx_code @var{code}, tree @var{op0}, tree @var{op1}) This function prepares to emit a comparison insn for the first compare in a sequence of conditional comparisions. It returns an appropriate comparison diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 4ddc8507ed9..6dac432605f 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -7843,6 +7843,8 @@ lists. @hook TARGET_HAVE_CONDITIONAL_EXECUTION +@hook TARGET_HAVE_SFB + @hook TARGET_GEN_CCMP_FIRST @hook TARGET_GEN_CCMP_NEXT diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 4cc6a125ff0..c0f42a7ab1f 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3068,10 +3068,12 @@ noce_try_cond_zero_arith (struct noce_if_info *if_info) &a, &to_replace)) return false; - start_sequence (); + if (targetm.have_sfb () && CONST_INT_P (*to_replace)) + return false; bin_code = GET_CODE (bin_exp); bin_op0 = XEXP (bin_exp, 0); + start_sequence (); if (CONST_INT_P (*to_replace)) { diff --git a/gcc/target.def b/gcc/target.def index 475c55c22c1..6d9b71e165b 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -2726,6 +2726,13 @@ modes and they have different conditional execution capability, such as ARM.", bool, (void), default_have_conditional_execution) +/* Return true if the target supports SFB. */ +DEFHOOK +(have_sfb, + "This target hook returns true if the target supports Short Forward Branch.", + bool, (void), + hook_bool_void_false) + DEFHOOK (gen_ccmp_first, "This function prepares to emit a comparison insn for the first compare in a\n\ diff --git a/gcc/testsuite/gcc.target/riscv/zicond_sfb_ifcvt_opt.c b/gcc/testsuite/gcc.target/riscv/zicond_sfb_ifcvt_opt.c new file mode 100644 index 00000000000..a9cad788956 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/zicond_sfb_ifcvt_opt.c @@ -0,0 +1,1354 @@ +/* { dg-do compile } */ +/* { dg-options "-mtune=sifive-7-series -march=rv64gc_zbb_zicond -mabi=lp64d -O2 " } */ +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } */ + +long +test_ADD_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y + z; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x (long x, long z, long c) +{ + if (c) + x = x + z; + + return x; +} + +long +test_ADD_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y + z; + return x; +} + +long +test_ADD_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x + z; + return x; +} + +long +test_ADD_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y + z; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x + z; + + return x; +} + +long +test_ADD_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y + z; + return x; +} + +long +test_ADD_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x + z; + return x; +} + +long +test_SUB_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y - z; + else + x = y; + return x; +} + +long +test_SUB_ceqz_x (long x, long z, long c) +{ + if (c) + x = x - z; + + return x; +} + +long +test_SUB_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y - z; + return x; +} + +long +test_SUB_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x - z; + return x; +} + +long +test_SUB_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y - z; + else + x = y; + return x; +} + +long +test_SUB_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x - z; + + return x; +} + +long +test_SUB_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y - z; + return x; +} + +long +test_SUB_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x - z; + return x; +} + +long +test_IOR_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y | z; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x (long x, long z, long c) +{ + if (c) + x = x | z; + + return x; +} + +long +test_IOR_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y | z; + return x; +} + +long +test_IOR_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x | z; + return x; +} + +long +test_IOR_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y | z; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x | z; + + return x; +} + +long +test_IOR_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y | z; + return x; +} + +long +test_IOR_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x | z; + return x; +} + +long +test_XOR_ceqz (long x, long y, long z, long c) +{ + if (c) + x = y ^ z; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x (long x, long z, long c) +{ + if (c) + x = x ^ z; + + return x; +} + +long +test_XOR_nez (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = y ^ z; + return x; +} + +long +test_XOR_nez_x (long x, long z, long c) +{ + if (c) + { + } + else + x = x ^ z; + return x; +} + +long +test_XOR_nez_2 (long x, long y, long z, long c) +{ + if (!c) + x = y ^ z; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2 (long x, long z, long c) +{ + if (!c) + x = x ^ z; + + return x; +} + +long +test_XOR_eqz_2 (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = y ^ z; + return x; +} + +long +test_XOR_eqz_x_2 (long x, long z, long c) +{ + if (!c) + { + } + else + x = x ^ z; + return x; +} + +long +test_ADD_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z + y; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z + x; + + return x; +} + +long +test_ADD_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z + y; + return x; +} + +long +test_ADD_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z + x; + return x; +} + +long +test_ADD_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z + y; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z + x; + + return x; +} + +long +test_ADD_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z + y; + return x; +} + +long +test_ADD_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z + x; + return x; +} + +long +test_IOR_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z | y; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z | x; + + return x; +} + +long +test_IOR_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z | y; + return x; +} + +long +test_IOR_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z | x; + return x; +} + +long +test_IOR_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z | y; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z | x; + + return x; +} + +long +test_IOR_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z | y; + return x; +} + +long +test_IOR_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z | x; + return x; +} + +long +test_XOR_ceqz_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = z ^ y; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + x = z ^ x; + + return x; +} + +long +test_XOR_nez_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (c) + x = y; + else + x = z ^ y; + return x; +} + +long +test_XOR_nez_x_reverse_bin_oprands (long x, long z, long c) +{ + if (c) + { + } + else + x = z ^ x; + return x; +} + +long +test_XOR_nez_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = z ^ y; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + x = z ^ x; + + return x; +} + +long +test_XOR_eqz_2_reverse_bin_oprands (long x, long y, long z, long c) +{ + if (!c) + x = y; + else + x = z ^ y; + return x; +} + +long +test_XOR_eqz_x_2_reverse_bin_oprands (long x, long z, long c) +{ + if (!c) + { + } + else + x = z ^ x; + return x; +} + +long +test_ShiftLeft_eqz (long x, long y, long z, long c) +{ + if (c) + x = y << z; + else + x = y; + return x; +} + +long +test_ShiftR_eqz (long x, long y, long z, long c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned long +test_ShiftR_logical_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned long +test_RotateL_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = (y << z) | (y >> (64 - z)); + else + x = y; + return x; +} + +unsigned long +test_RotateR_eqz (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = (y >> z) | (y << (64 - z)); + else + x = y; + return x; +} + +int +test_ADD_ceqz_int (int x, int y, int z, int c) +{ + if (c) + x = y + z; + else + x = y; + return x; +} + +int +test_ShiftLeft_eqz_int (int x, int y, int z, int c) +{ + if (c) + x = y << z; + else + x = y; + return x; +} + +int +test_ShiftR_eqz_int (int x, int y, int z, int c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned int +test_ShiftR_logical_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = y >> z; + else + x = y; + return x; +} + +unsigned int +test_RotateL_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = (y << z) | (y >> (32 - z)); + else + x = y; + return x; +} + +unsigned int +test_RotateR_eqz_int (unsigned int x, unsigned int y, unsigned int z, + unsigned int c) +{ + if (c) + x = (y >> z) | (y << (32 - z)); + else + x = y; + return x; +} + +long +test_ADD_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y + 11; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_imm (long x, long c) +{ + if (c) + x = x + 11; + + return x; +} + +long +test_ADD_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y + 11; + return x; +} + +long +test_ADD_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x + 11; + return x; +} + +long +test_ADD_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y + 11; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x + 11; + + return x; +} + +long +test_ADD_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y + 11; + return x; +} + +long +test_ADD_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x + 11; + return x; +} + +long +test_SUB_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y - 11; + else + x = y; + return x; +} + +long +test_SUB_ceqz_x_imm (long x, long c) +{ + if (c) + x = x - 11; + + return x; +} + +long +test_SUB_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y - 11; + return x; +} + +long +test_SUB_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x - 11; + return x; +} + +long +test_SUB_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y - 11; + else + x = y; + return x; +} + +long +test_SUB_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x - 11; + + return x; +} + +long +test_SUB_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y - 11; + return x; +} + +long +test_SUB_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x - 11; + return x; +} + +long +test_IOR_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y | 11; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_imm (long x, long c) +{ + if (c) + x = x | 11; + + return x; +} + +long +test_IOR_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y | 11; + return x; +} + +long +test_IOR_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x | 11; + return x; +} + +long +test_IOR_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y | 11; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x | 11; + + return x; +} + +long +test_IOR_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y | 11; + return x; +} + +long +test_IOR_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x | 11; + return x; +} + +long +test_XOR_ceqz_imm (long x, long y, long c) +{ + if (c) + x = y ^ 11; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_imm (long x, long c) +{ + if (c) + x = x ^ 11; + + return x; +} + +long +test_XOR_nez_imm (long x, long y, long c) +{ + if (c) + x = y; + else + x = y ^ 11; + return x; +} + +long +test_XOR_nez_x_imm (long x, long c) +{ + if (c) + { + } + else + x = x ^ 11; + return x; +} + +long +test_XOR_nez_2_imm (long x, long y, long c) +{ + if (!c) + x = y ^ 11; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_imm (long x, long c) +{ + if (!c) + x = x ^ 11; + + return x; +} + +long +test_XOR_eqz_2_imm (long x, long y, long c) +{ + if (!c) + x = y; + else + x = y ^ 11; + return x; +} + +long +test_XOR_eqz_x_2_imm (long x, long c) +{ + if (!c) + { + } + else + x = x ^ 11; + return x; +} + +long +test_ADD_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 + y; + else + x = y; + return x; +} + +long +test_ADD_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 + x; + + return x; +} + +long +test_ADD_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 + y; + return x; +} + +long +test_ADD_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 + x; + return x; +} + +long +test_ADD_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 + y; + else + x = y; + return x; +} + +long +test_ADD_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 + x; + + return x; +} + +long +test_ADD_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 + y; + return x; +} + +long +test_ADD_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 + x; + return x; +} + +long +test_IOR_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 | y; + else + x = y; + return x; +} + +long +test_IOR_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 | x; + + return x; +} + +long +test_IOR_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 | y; + return x; +} + +long +test_IOR_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 | x; + return x; +} + +long +test_IOR_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 | y; + else + x = y; + return x; +} + +long +test_IOR_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 | x; + + return x; +} + +long +test_IOR_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 | y; + return x; +} + +long +test_IOR_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 | x; + return x; +} + +long +test_XOR_ceqz_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = 11 ^ y; + else + x = y; + return x; +} + +long +test_XOR_ceqz_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + x = 11 ^ x; + + return x; +} + +long +test_XOR_nez_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (c) + x = y; + else + x = 11 ^ y; + return x; +} + +long +test_XOR_nez_x_imm_reverse_bin_oprands (long x, long c) +{ + if (c) + { + } + else + x = 11 ^ x; + return x; +} + +long +test_XOR_nez_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = 11 ^ y; + else + x = y; + return x; +} + +long +test_XOR_nez_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + x = 11 ^ x; + + return x; +} + +long +test_XOR_eqz_2_imm_reverse_bin_oprands (long x, long y, long c) +{ + if (!c) + x = y; + else + x = 11 ^ y; + return x; +} + +long +test_XOR_eqz_x_2_imm_reverse_bin_oprands (long x, long c) +{ + if (!c) + { + } + else + x = 11 ^ x; + return x; +} + +long +test_ShiftLeft_eqz_imm (long x, long y, long c) +{ + if (c) + x = y << 11; + else + x = y; + return x; +} + +long +test_ShiftR_eqz_imm (long x, long y, long c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned long +test_ShiftR_logical_eqz_imm (unsigned long x, unsigned long y, unsigned long z, + unsigned long c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned long +test_RotateL_eqz_imm (unsigned long x, unsigned long y, unsigned long c) +{ + if (c) + x = (y << 11) | (y >> (64 - 11)); + else + x = y; + return x; +} + +unsigned long +test_RotateR_eqz_imm (unsigned long x, unsigned long y, unsigned long c) +{ + if (c) + x = (y >> 11) | (y << (64 - 11)); + else + x = y; + return x; +} + +int +test_ADD_ceqz_imm_int (int x, int y, int c) +{ + if (c) + x = y + 11; + else + x = y; + return x; +} + +int +test_ShiftLeft_eqz_imm_int (int x, int y, int c) +{ + if (c) + x = y << 11; + else + x = y; + return x; +} + +int +test_ShiftR_eqz_imm_int (int x, int y, int c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned int +test_ShiftR_logical_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = y >> 11; + else + x = y; + return x; +} + +unsigned int +test_RotateL_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = (y << 11) | (y >> (32 - 11)); + else + x = y; + return x; +} + +unsigned int +test_RotateR_eqz_imm_int (unsigned int x, unsigned int y, unsigned int c) +{ + if (c) + x = (y >> 11) | (y << (32 - 11)); + else + x = y; + return x; +} + +/* { dg-final { scan-assembler-times {czero\.eqz} 39 } } */ +/* { dg-final { scan-assembler-times {czero\.nez} 28 } } */ +/* { dg-final { scan-assembler-times {movcc} 67 } } */