From patchwork Tue Oct 17 15:45:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Cui, Lili" X-Patchwork-Id: 78041 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B6E8038582B0 for ; Tue, 17 Oct 2023 15:45:45 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id 0DF7A3858C54 for ; Tue, 17 Oct 2023 15:45:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0DF7A3858C54 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 0DF7A3858C54 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=134.134.136.24 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697557528; cv=none; b=bdfGXzkF82VDRabKPommF/ACs9yRij8FB6tAZ74yi0fsSmxWqh4tQEsWGkEKLCiLHl7cGjGDky11ADi1yMoWc1mv+hgrrgO8lFCxQBpMmLQmIPAt36MWSJd7eRtwBOfqSIEEm9gGb2VrVDQ6UdYF40vFahXj1ABG9pJ9/V4cqlQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697557528; c=relaxed/simple; bh=fujNSvkII4U4AStEx7xevGjlBssP+dDvyhKvtVVsTBs=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=jCoRvXolANH1XLZtfDeL8BQrmUWSpF4lvreKiRm4Dc3mLVpI828chddde37BC3BJz2PHxMJutQOoTCBmUhudKh6Yx56I2DikNtj6gZictTD1WCWeOOBw6wtO5TX39+CeALeNLydwcnxuJI7yypBEMXgCVAmbHePgSmCzXBYcmn8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697557523; x=1729093523; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=fujNSvkII4U4AStEx7xevGjlBssP+dDvyhKvtVVsTBs=; b=hRycEaSUlSMav6JTn0gH+dQA4CejoNYgryB6/oH4M56gPfl9kD16i3g7 QQnfnyDAhcUB2//6YPUSe32VdVk+7cEsz0SXeUT1mYWnUDgVwokeP8pbL MGDLOqM67sk/wBM/4XWI6AF3anYKtmcmTP1aoCKsX4VjqVnAr5YNMpBhX udsrAsoB3chq28T1xbtpNHbcc/bjevf8mxJpK496PSChKvM0nqhIdWZDO ezRrvu2pRtJls5dkjk425z4vAPlgF/AYQ5S5LaikYzZ7nlkVjtAuK8GlP hHPEzW0ubqbcyBh/EL/iwDGgvTbjH4EVF/f/I8qv7Sku0W98AGPYbd4U5 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="388671736" X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="388671736" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 08:45:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="4134882" Received: from scymds03.sc.intel.com ([10.148.94.166]) by fmviesa001.fm.intel.com with ESMTP; 17 Oct 2023 08:45:10 -0700 Received: from shgcc101.sh.intel.com (shgcc101.sh.intel.com [10.239.85.97]) by scymds03.sc.intel.com (Postfix) with ESMTP id CF94D53; Tue, 17 Oct 2023 08:45:02 -0700 (PDT) From: "Cui, Lili" To: binutils@sourceware.org Cc: jbeulich@suse.com, hongjiu.lu@intel.com Subject: [PATCH v2 2/8] Support APX GPR32 with extend evex prefix Date: Tue, 17 Oct 2023 15:45:00 +0000 Message-Id: <20231017154500.4070336-1-lili.cui@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org This patch adds non-ND, non-NF forms of EVEX promotion insn. EVEX extension of legacy instructions: All promoted legacy instructions are placed in EVEX map 4, which is currently reserved. EVEX extension of EVEX instructions: All existing EVEX instructions are extended by APX using the extended EVEX prefix, so that they can access all 32 GPRs. EVEX extension of VEX instructions: Promoting a VEX instruction into the EVEX space does not change the map id, the opcode, or the operand encoding of the VEX instruction. gas/ChangeLog: * config/tc-i386.c (cpu_flags_not_or_check): Add a new function for APX cpu flag checking. (cpu_flags_match): handle cpu_flags_not_or_check. (install_template): Add AMX_TILE and APX combine. (is_any_apx_evex_encoding): Test apx evex encoding. (build_apx_evex_prefix): Enabe APX evex prefix. (md_assemble): Handle apx with evex encoding. (check_EgprOperands): Add nodgpr check for apx. (process_suffix): Handle apx map4 prefix. (check_register): Assign i.vec_encoding for APX evex instructions. * testsuite/gas/i386/x86-64-evex.d: Adjust test cases. * gas/testsuite/gas/i386/x86-64-inval-movbe.s: Ditto. * gas/testsuite/gas/i386/x86-64-inval-movbe.l: Ditto. opcodes/ChangeLog: * i386-dis-evex-len.h: Handle EVEX_LEN_0F38F2, EVEX_LEN_0F38F3. * i386-dis-evex-mod.h: Handle MOD_EVEX_MAP4_65, MOD_EVEX_MAP4_66_PREFIX_0, MOD_EVEX_MAP4_8A_W_0, MOD_EVEX_MAP4_DA_PREFIX_1, MOD_EVEX_MAP4_DB_PREFIX_1, MOD_EVEX_MAP4_DC_PREFIX_1, MOD_EVEX_MAP4_DD_PREFIX_1, MOD_EVEX_MAP4_DE_PREFIX_1, MOD_EVEX_MAP4_DF_PREFIX_1, MOD_EVEX_MAP4_F8_PREFIX_1, MOD_EVEX_MAP4_F8_PREFIX_2, MOD_EVEX_MAP4_F8_PREFIX_3, MOD_EVEX_MAP4_F9, MOD_EVEX_MAP4_8B. * i386-dis-evex-prefix.h: Handle PREFIX_EVEX_MAP4_60, PREFIX_EVEX_MAP4_61, PREFIX_EVEX_MAP4_66, PREFIX_EVEX_MAP4_8B_M_0, PREFIX_EVEX_MAP4_D8, PREFIX_EVEX_MAP4_DA, PREFIX_EVEX_MAP4_DB, PREFIX_EVEX_MAP4_DC, PREFIX_EVEX_MAP4_DD, PREFIX_EVEX_MAP4_DE, PREFIX_EVEX_MAP4_DF, PREFIX_EVEX_MAP4_F0, PREFIX_EVEX_MAP4_F1, PREFIX_EVEX_MAP4_F2, PREFIX_EVEX_MAP4_F8, PREFIX_EVEX_MAP4_FC. * i386-dis-evex-reg.h: Handle REG_EVEX_MAP4_D8_PREFIX_1, REG_EVEX_0F38F3_L_0. * i386-dis-evex.h: Add EVEX_MAP4_ for legacy insn promote to apx to use gpr32 * i386-dis.c (REG enum): Add REG_EVEX_MAP4_D8_PREFIX_1. (MOD enum): Add MOD_EVEX_MAP4_65, MOD_EVEX_MAP4_66_PREFIX_0, MOD_EVEX_MAP4_8A_W_0, MOD_EVEX_MAP4_8B, MOD_EVEX_MAP4_DA_PREFIX_1, MOD_EVEX_MAP4_DB_PREFIX_1, MOD_EVEX_MAP4_DC_PREFIX_1, MOD_EVEX_MAP4_DD_PREFIX_1, MOD_EVEX_MAP4_DE_PREFIX_1, MOD_EVEX_MAP4_DF_PREFIX_1, MOD_EVEX_MAP4_F8_PREFIX_1, MOD_EVEX_MAP4_F8_PREFIX_2, MOD_EVEX_MAP4_F8_PREFIX_3, MOD_EVEX_MAP4_F9, REG_EVEX_0F38F3_L_0. (PREFIX enum): Add PREFIX_EVEX_MAP4_60, PREFIX_EVEX_MAP4_61, PREFIX_EVEX_MAP4_66, PREFIX_EVEX_MAP4_8B_M_0, PREFIX_EVEX_MAP4_D8, PREFIX_EVEX_MAP4_DA, PREFIX_EVEX_MAP4_DB, PREFIX_EVEX_MAP4_DC, PREFIX_EVEX_MAP4_DD, PREFIX_EVEX_MAP4_DE, PREFIX_EVEX_MAP4_DF, PREFIX_EVEX_MAP4_F0, PREFIX_EVEX_MAP4_F1, PREFIX_EVEX_MAP4_F2, PREFIX_EVEX_MAP4_F8, PREFIX_EVEX_MAP4_FC. (EVEX_LEN_enum): Add EVEX_LEN_0F38F2, EVEX_LEN_0F38F3. (EVEX_X86_enum): Add X86_64_EVEX_0F90, X86_64_EVEX_0F91, X86_64_EVEX_0F92, X86_64_EVEX_0F93, X86_64_EVEX_0F3849, X86_64_EVEX_0F384B, X86_64_EVEX_0F38E0, X86_64_EVEX_0F38E1, X86_64_EVEX_0F38E2, X86_64_EVEX_0F38E3, X86_64_EVEX_0F38E4, X86_64_EVEX_0F38E5, X86_64_EVEX_0F38E6, X86_64_EVEX_0F38E7, X86_64_EVEX_0F38E8, X86_64_EVEX_0F38E9, X86_64_EVEX_0F38EA, X86_64_EVEX_0F38EB, X86_64_EVEX_0F38EC, X86_64_EVEX_0F38ED, X86_64_EVEX_0F38EE, X86_64_EVEX_0F38EF, X86_64_EVEX_0F38F2, X86_64_EVEX_0F38F3, X86_64_EVEX_0F38F5, X86_64_EVEX_0F38F6, X86_64_EVEX_0F38F7, X86_64_EVEX_0F3AF0. (struct instr_info): Deleted bool r. (putop): Ditto. (PREFIX_DATA_AND_NP_ONLY): New define. (X86_64_EVEX_FROM_VEX_TABLE): Diito. (get_valid_dis386): Decode insn erex in extend evex prefix. Handle EVEX_MAP4 (print_insn): Handle PREFIX_DATA_AND_NP_ONLY. (print_register): Handle apx instructions decode. (OP_E_memory): Diito. (OP_G): Diito. (OP_XMM): Diito. (DistinctDest_Fixup): Diito. * i386-gen.c (process_i386_opcode_modifier): * i386-opc.h (SPACE_EVEXMAP4): Add legacy insn promote to evex. * i386-opc.tbl: Handle some legacy and vex insns don't support gpr32. And add some legacy insn (map2 / 3) promote to evex. --- gas/config/tc-i386.c | 127 +++++++++++++++--- gas/testsuite/gas/i386/x86-64-evex.d | 2 +- gas/testsuite/gas/i386/x86-64-inval-movbe.l | 31 ++--- gas/testsuite/gas/i386/x86-64-inval-movbe.s | 1 + opcodes/i386-dis-evex-len.h | 10 ++ opcodes/i386-dis-evex-mod.h | 42 ++++++ opcodes/i386-dis-evex-prefix.h | 71 ++++++++++ opcodes/i386-dis-evex-reg.h | 14 ++ opcodes/i386-dis-evex-x86-64.h | 140 ++++++++++++++++++++ opcodes/i386-dis-evex.h | 94 ++++++------- opcodes/i386-dis.c | 140 +++++++++++++++++--- opcodes/i386-gen.c | 2 + opcodes/i386-opc.h | 2 + opcodes/i386-opc.tbl | 86 +++++++++++- 14 files changed, 660 insertions(+), 102 deletions(-) create mode 100644 opcodes/i386-dis-evex-x86-64.h diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 3d917c34d15..398909a6a30 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1796,6 +1796,36 @@ cpu_flags_equal (const union i386_cpu_flags *x, } } +static INLINE int +cpu_flags_not_or_check (const union i386_cpu_flags *x, + const union i386_cpu_flags *y) +{ + switch (ARRAY_SIZE(x->array)) + { + case 5: + if ((~x->array[4] | y->array[4]) != 0xffffffff) + return 0; + /* Fall through. */ + case 4: + if ((~x->array[3] | y->array[3]) != 0xffffffff) + return 0; + /* Fall through. */ + case 3: + if ((~x->array[2] | y->array[2]) != 0xffffffff) + return 0; + /* Fall through. */ + case 2: + if ((~x->array[1] | y->array[1]) != 0xffffffff) + return 0; + /* Fall through. */ + case 1: + return ((~x->array[1] | y->array[1]) == 0Xffffffff); + break; + default: + abort (); + } +} + static INLINE int cpu_flags_check_cpu64 (const insn_template *t) { @@ -1989,6 +2019,12 @@ cpu_flags_match (const insn_template *t) && (!x.bitfield.cpugfni || cpu.bitfield.cpugfni)) match |= CPU_FLAGS_ARCH_MATCH; } + else if (x.bitfield.cpuapx_f) + { + /* All cpu in x need to be enabled in cpu_arch_flags. */ + if (cpu_flags_not_or_check (&x, &cpu_arch_flags)) + match |= CPU_FLAGS_ARCH_MATCH; + } else match |= CPU_FLAGS_ARCH_MATCH; } @@ -3712,16 +3748,16 @@ install_template (const insn_template *t) /* Dual VEX/EVEX templates need stripping one of the possible variants. */ if (t->opcode_modifier.vex && t->opcode_modifier.evex) - { - if ((is_cpu (t, CpuAVX) || is_cpu (t, CpuAVX2)) - && is_cpu (t, CpuAVX512F)) + { + if ((is_cpu (t, CpuAVX) || is_cpu (t, CpuAVX2) || is_cpu (t, CpuAMX_TILE)) + && (is_cpu (t, CpuAVX512F) || is_cpu (t, CpuAPX_F))) { if (need_evex_encoding ()) { i.tm.opcode_modifier.vex = 0; i.tm.cpu.bitfield.cpuavx = 0; if (is_cpu (&i.tm, CpuAVX2)) - i.tm.cpu.bitfield.isa = 0; + i.tm.cpu.bitfield.isa = 0; } else { @@ -3729,7 +3765,7 @@ install_template (const insn_template *t) i.tm.cpu.bitfield.cpuavx512f = 0; } } - } + } /* Note that for pseudo prefixes this produces a length of 1. But for them the length isn't interesting at all. */ @@ -3919,6 +3955,14 @@ is_any_vex_encoding (const insn_template *t) return t->opcode_modifier.vex || is_evex_encoding (t); } +static INLINE bool +is_any_apx_evex_encoding (void) +{ + return i.rex2 || i.tm.opcode_space == SPACE_EVEXMAP4 + || (i.vex.register_specifier + && i.vex.register_specifier->reg_flags & RegRex2); +} + static INLINE bool is_any_apx_rex2_encoding (void) { @@ -4195,6 +4239,27 @@ build_rex2_prefix (void) | (i.rex2 << 4) | i.rex); } +/* Build the EVEX prefix (4-byte) for evex insn + | 62h | + | `R`X`B`R' | B'mmm | + | W | v`v`v`v | `x' | pp | + | z| L'L | b | `v | aaa | +*/ +static void +build_apx_evex_prefix (void) +{ + build_evex_prefix (); + if (i.rex2 & REX_R) + i.vex.bytes[1] &= 0xef; + if (i.vex.register_specifier + && register_number (i.vex.register_specifier) > 0xf) + i.vex.bytes[3] &= 0xf7; + if (i.rex2 & REX_B) + i.vex.bytes[1] |= 0x08; + if (i.rex2 & REX_X) + i.vex.bytes[2] &= 0xfb; +} + static void process_immext (void) { @@ -5642,19 +5707,42 @@ md_assemble (char *line) } /* Check for explicit REX2 prefix. */ - if (i.rex2 || i.rex2_encoding) + if (i.rex2_encoding) { as_bad (_("REX2 prefix invalid with `%s'"), insn_name (&i.tm)); return; } - if (i.tm.opcode_modifier.vex) + if (is_any_apx_evex_encoding ()) + { + if (i.tm.opcode_space == SPACE_EVEXMAP4 && (i.prefix[DATA_PREFIX] != 0)) + { + i.tm.opcode_modifier.opcodeprefix = PREFIX_0X66; + i.prefix[DATA_PREFIX] = 0; + } + + build_apx_evex_prefix (); + + /* Encode the NDD bit of the instruction promoted from the legacy + space. */ + if (i.vex.register_specifier && i.tm.opcode_space == SPACE_EVEXMAP4) + i.vex.bytes[3] |= 0x10; + + /* Encode the NF bit of the instruction promoted from legacy and vex + space. */ + if (i.has_nf) + i.vex.bytes[3] |= 0x04; + } + else if (i.tm.opcode_modifier.vex) build_vex_prefix (t); else build_evex_prefix (); /* The individual REX.RXBW bits got consumed. */ i.rex &= REX_OPCODE; + + /* The rex2 bits got consumed. */ + i.rex2 = 0; } /* Handle conversion of 'int $3' --> special int3 insn. */ @@ -5681,16 +5769,17 @@ md_assemble (char *line) instruction already has a prefix, we need to convert old registers to new ones. */ - if ((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte - && (i.op[0].regs->reg_flags & RegRex64) != 0) - || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte - && (i.op[1].regs->reg_flags & RegRex64) != 0) - || (((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte) - || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte)) - && (i.rex != 0 || i.rex2 != 0))) + if (!is_any_vex_encoding (&i.tm) + && ((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte + && (i.op[0].regs->reg_flags & RegRex64) != 0) + || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte + && (i.op[1].regs->reg_flags & RegRex64) != 0) + || (((i.types[0].bitfield.class == Reg && i.types[0].bitfield.byte) + || (i.types[1].bitfield.class == Reg && i.types[1].bitfield.byte)) + && (i.rex != 0 || i.rex2 != 0)))) { int x; - if (!i.rex2) + if (!is_any_apx_rex2_encoding ()) i.rex |= REX_OPCODE; for (x = 0; x < 2; x++) { @@ -7061,7 +7150,7 @@ VEX_check_encoding (const insn_template *t) static int check_EgprOperands (const insn_template *t) { - if (t->opcode_modifier.noegpr) + if (t->opcode_modifier.noegpr && !need_evex_encoding()) { for (unsigned int op = 0; op < i.operands; op++) { @@ -8049,7 +8138,8 @@ process_suffix (void) if (i.suffix != QWORD_MNEM_SUFFIX && i.tm.opcode_modifier.mnemonicsize != IGNORESIZE && !i.tm.opcode_modifier.floatmf - && !is_any_vex_encoding (&i.tm) + && (!is_any_vex_encoding (&i.tm) + || i.tm.opcode_space == SPACE_EVEXMAP4) && ((i.suffix == LONG_MNEM_SUFFIX) == (flag_code == CODE_16BIT) || (flag_code == CODE_64BIT && i.tm.opcode_modifier.jump == JUMP_BYTE))) @@ -14260,6 +14350,9 @@ static bool check_register (const reg_entry *r) if (r->reg_flags & RegRex2) { + if (is_evex_encoding (current_templates->start)) + i.vec_encoding = vex_encoding_evex; + if (!cpu_arch_flags.bitfield.cpuapx_f || flag_code != CODE_64BIT) return false; diff --git a/gas/testsuite/gas/i386/x86-64-evex.d b/gas/testsuite/gas/i386/x86-64-evex.d index 041747db892..5d974c312da 100644 --- a/gas/testsuite/gas/i386/x86-64-evex.d +++ b/gas/testsuite/gas/i386/x86-64-evex.d @@ -17,6 +17,6 @@ Disassembly of section .text: +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ss %rax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sd %eax,\{rd-bad\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sd %rax,\{rd-sae\},%xmm5,%xmm6 - +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,\(bad\) + +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%r16d +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,\(bad\) #pass diff --git a/gas/testsuite/gas/i386/x86-64-inval-movbe.l b/gas/testsuite/gas/i386/x86-64-inval-movbe.l index 1c8ceb55c11..44ddfe4f034 100644 --- a/gas/testsuite/gas/i386/x86-64-inval-movbe.l +++ b/gas/testsuite/gas/i386/x86-64-inval-movbe.l @@ -1,29 +1,30 @@ .*: Assembler messages: -.*:4: Error: .* .*:5: Error: .* .*:6: Error: .* .*:7: Error: .* .*:8: Error: .* -.*:11: Error: .* +.*:9: Error: .* .*:12: Error: .* .*:13: Error: .* .*:14: Error: .* .*:15: Error: .* +.*:16: Error: .* GAS LISTING .* [ ]*1[ ]+\# Check illegal movbe in 64bit mode\. [ ]*2[ ]+\.text -[ ]*3[ ]+foo: -[ ]*4[ ]+movbe \(%rcx\),%bl -[ ]*5[ ]+movbe %ecx,%ebx -[ ]*6[ ]+movbe %bx,%rcx -[ ]*7[ ]+movbe %rbx,%rcx -[ ]*8[ ]+movbe %bl,\(%rcx\) -[ ]*9[ ]+ -[ ]*10[ ]+\.intel_syntax noprefix -[ ]*11[ ]+movbe bl, byte ptr \[rcx\] -[ ]*12[ ]+movbe ebx, ecx -[ ]*13[ ]+movbe rcx, bx -[ ]*14[ ]+movbe rcx, rbx -[ ]*15[ ]+movbe byte ptr \[rcx\], bl +[ ]*3[ ]+\.arch \.noapx_f +[ ]*4[ ]+foo: +[ ]*5[ ]+movbe \(%rcx\),%bl +[ ]*6[ ]+movbe %ecx,%ebx +[ ]*7[ ]+movbe %bx,%rcx +[ ]*8[ ]+movbe %rbx,%rcx +[ ]*9[ ]+movbe %bl,\(%rcx\) +[ ]*10[ ]+ +[ ]*11[ ]+\.intel_syntax noprefix +[ ]*12[ ]+movbe bl, byte ptr \[rcx\] +[ ]*13[ ]+movbe ebx, ecx +[ ]*14[ ]+movbe rcx, bx +[ ]*15[ ]+movbe rcx, rbx +[ ]*16[ ]+movbe byte ptr \[rcx\], bl diff --git a/gas/testsuite/gas/i386/x86-64-inval-movbe.s b/gas/testsuite/gas/i386/x86-64-inval-movbe.s index 38f09b14d64..380a9191b6a 100644 --- a/gas/testsuite/gas/i386/x86-64-inval-movbe.s +++ b/gas/testsuite/gas/i386/x86-64-inval-movbe.s @@ -1,5 +1,6 @@ # Check illegal movbe in 64bit mode. .text + .arch .noapx_f foo: movbe (%rcx),%bl movbe %ecx,%ebx diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h index a02609c50f2..1933a045822 100644 --- a/opcodes/i386-dis-evex-len.h +++ b/opcodes/i386-dis-evex-len.h @@ -62,6 +62,16 @@ static const struct dis386 evex_len_table[][3] = { { REG_TABLE (REG_EVEX_0F38C7_L_2) }, }, + /* EVEX_LEN_0F38F2 */ + { + { "andnS", { Gdq, VexGdq, Edq }, 0 }, + }, + + /* EVEX_LEN_0F38F3 */ + { + { REG_TABLE(REG_EVEX_0F38F3_L_0) }, + }, + /* EVEX_LEN_0F3A00 */ { { Bad_Opcode }, diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h index f9f912c5094..a60c19add3c 100644 --- a/opcodes/i386-dis-evex-mod.h +++ b/opcodes/i386-dis-evex-mod.h @@ -1 +1,43 @@ /* Nothing at present. */ + /* MOD_EVEX_MAP4_DA_PREFIX_1 */ + { + { Bad_Opcode }, + { "encodekey128", { Gd, Ed }, 0 }, + }, + /* MOD_EVEX_MAP4_DB_PREFIX_1 */ + { + { Bad_Opcode }, + { "encodekey256", { Gd, Ed }, 0 }, + }, + /* MOD_EVEX_MAP4_DC_PREFIX_1 */ + { + { "aesenc128kl", { XM, M }, 0 }, + }, + /* MOD_EVEX_MAP4_DD_PREFIX_1 */ + { + { "aesdec128kl", { XM, M }, 0 }, + }, + /* MOD_EVEX_MAP4_DE_PREFIX_1 */ + { + { "aesenc256kl", { XM, M }, 0 }, + }, + /* MOD_EVEX_MAP4_DF_PREFIX_1 */ + { + { "aesdec256kl", { XM, M }, 0 }, + }, + /* MOD_EVEX_MAP4_F8_PREFIX_1 */ + { + { "enqcmds", { Gva, M }, 0 }, + }, + /* MOD_EVEX_MAP4_F8_PREFIX_2 */ + { + { "movdir64b", { Gva, M }, 0 }, + }, + /* MOD_EVEX_MAP4_F8_PREFIX_3 */ + { + { "enqcmd", { Gva, M }, 0 }, + }, + /* MOD_EVEX_MAP4_F9 */ + { + { "movdiri", { Edq, Gdq }, 0 }, + }, diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 28da54922c7..a78d1e88a5d 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -338,6 +338,77 @@ { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 }, { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 }, }, + /* PREFIX_EVEX_MAP4_66 */ + { + { "wrssK", { M, Gdq }, 0 }, + { "adoxS", { Gdq, Edq }, 0 }, + { "adcxS", { Gdq, Edq }, 0 }, + }, + /* PREFIX_EVEX_MAP4_D8 */ + { + { "sha1nexte", { XM, EXxmm }, 0 }, + { REG_TABLE (REG_EVEX_MAP4_D8_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DA */ + { + { "sha1msg2", { XM, EXxmm }, 0 }, + { MOD_TABLE (MOD_EVEX_MAP4_DA_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DB */ + { + { "sha256rnds2", { XM, EXxmm, XMM0 }, 0 }, + { MOD_TABLE (MOD_EVEX_MAP4_DB_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DC */ + { + { "sha256msg1", { XM, EXxmm }, 0 }, + { MOD_TABLE (MOD_EVEX_MAP4_DC_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DD */ + { + { "sha256msg2", { XM, EXxmm }, 0 }, + { MOD_TABLE (MOD_EVEX_MAP4_DD_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DE */ + { + { Bad_Opcode }, + { MOD_TABLE (MOD_EVEX_MAP4_DE_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_DF */ + { + { Bad_Opcode }, + { MOD_TABLE (MOD_EVEX_MAP4_DF_PREFIX_1) }, + }, + /* PREFIX_EVEX_MAP4_F0 */ + { + { "crc32A", { Gdq, Eb }, 0 }, + { "invept", { Gm, Mo }, 0 }, + }, + /* PREFIX_EVEX_MAP4_F1 */ + { + { "crc32Q", { Gdq, Ev }, 0 }, + { "invvpid", { Gm, Mo }, 0 }, + { "crc32Q", { Gdq, Ev }, 0 }, + }, + /* PREFIX_EVEX_MAP4_F2 */ + { + { Bad_Opcode }, + { "invpcid", { Gm, M }, 0 }, + }, + /* PREFIX_EVEX_MAP4_F8 */ + { + { Bad_Opcode }, + { MOD_TABLE (MOD_EVEX_MAP4_F8_PREFIX_1) }, + { MOD_TABLE (MOD_EVEX_MAP4_F8_PREFIX_2) }, + { MOD_TABLE (MOD_EVEX_MAP4_F8_PREFIX_3) }, + }, + /* PREFIX_EVEX_MAP4_FC */ + { + { "aadd", { Mdq, Gdq }, 0 }, + { "axor", { Mdq, Gdq }, 0 }, + { "aand", { Mdq, Gdq }, 0 }, + { "aor", { Mdq, Gdq }, 0 }, + }, /* PREFIX_EVEX_MAP5_10 */ { { Bad_Opcode }, diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h index 2885063628b..c3b4f083346 100644 --- a/opcodes/i386-dis-evex-reg.h +++ b/opcodes/i386-dis-evex-reg.h @@ -49,3 +49,17 @@ { "vscatterpf0qp%XW", { MVexVSIBQWpX }, PREFIX_DATA }, { "vscatterpf1qp%XW", { MVexVSIBQWpX }, PREFIX_DATA }, }, + /* REG_EVEX_0F38F3_L_0 */ + { + { Bad_Opcode }, + { "blsrS", { VexGdq, Edq }, 0 }, + { "blsmskS", { VexGdq, Edq }, 0 }, + { "blsiS", { VexGdq, Edq }, 0 }, + }, + /* REG_EVEX_MAP4_D8_PREFIX_1 */ + { + { "aesencwide128kl", { M }, 0 }, + { "aesdecwide128kl", { M }, 0 }, + { "aesencwide256kl", { M }, 0 }, + { "aesdecwide256kl", { M }, 0 }, + }, diff --git a/opcodes/i386-dis-evex-x86-64.h b/opcodes/i386-dis-evex-x86-64.h new file mode 100644 index 00000000000..1121223d877 --- /dev/null +++ b/opcodes/i386-dis-evex-x86-64.h @@ -0,0 +1,140 @@ + /* X86_64_EVEX_0F90 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F90) }, + }, + /* X86_64_EVEX_0F91 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F91) }, + }, + /* X86_64_EVEX_0F92 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F92) }, + }, + /* X86_64_EVEX_0F93 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F93) }, + }, + /* X86_64_EVEX_0F3849 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64) }, + }, + /* X86_64_EVEX_0F384B */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64) }, + }, + /* X86_64_EVEX_0F38E0 */ + { + { Bad_Opcode }, + { "cmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E1 */ + { + { Bad_Opcode }, + { "cmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E2 */ + { + { Bad_Opcode }, + { "cmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E3 */ + { + { Bad_Opcode }, + { "cmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E4 */ + { + { Bad_Opcode }, + { "cmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E5 */ + { + { Bad_Opcode }, + { "cmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E6 */ + { + { Bad_Opcode }, + { "cmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E7 */ + { + { Bad_Opcode }, + { "cmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E8 */ + { + { Bad_Opcode }, + { "cmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38E9 */ + { + { Bad_Opcode }, + { "cmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38EA */ + { + { Bad_Opcode }, + { "cmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38EB */ + { + { Bad_Opcode }, + { "cmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38EC */ + { + { Bad_Opcode }, + { "cmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38ED */ + { + { Bad_Opcode }, + { "cmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38EE */ + { + { Bad_Opcode }, + { "cmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38EF */ + { + { Bad_Opcode }, + { "cmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, + }, + /* X86_64_EVEX_0F38F2 */ + { + { Bad_Opcode }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38F2) }, + }, + /* X86_64_EVEX_0F38F3 */ + { + { Bad_Opcode }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38F3) }, + }, + /* X86_64_EVEX_0F38F5 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F38F5) }, + }, + /* X86_64_EVEX_0F38F6 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F38F6) }, + }, + /* X86_64_EVEX_0F38F7 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F38F7) }, + }, + /* X86_64_EVEX_0F3AF0 */ + { + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F3AF0) }, + }, diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index 7ad1edbe72d..c43b95abae6 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -164,10 +164,10 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 90 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F90) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F91) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F92) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F93) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -375,9 +375,9 @@ static const struct dis386 evex_table[][256] = { { "vpsllv%DQ", { XM, Vex, EXx }, PREFIX_DATA }, /* 48 */ { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F3849) }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F384B) }, { "vrcp14p%XW", { XM, EXx }, PREFIX_DATA }, { "vrcp14s%XW", { XMScalar, VexScalar, EXdq }, PREFIX_DATA }, { "vrsqrt14p%XW", { XM, EXx }, 0 }, @@ -545,32 +545,32 @@ static const struct dis386 evex_table[][256] = { { "%XEvaesdecY", { XM, Vex, EXx }, PREFIX_DATA }, { "%XEvaesdeclastY", { XM, Vex, EXx }, PREFIX_DATA }, /* E0 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E0) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E1) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E2) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E3) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E4) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E5) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E6) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E7) }, /* E8 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E8) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38E9) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38EA) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38EB) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38EC) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38ED) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38EE) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38EF) }, /* F0 */ { Bad_Opcode }, { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F2) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F3) }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F5) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F6) }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F38F7) }, /* F8 */ { Bad_Opcode }, { Bad_Opcode }, @@ -854,7 +854,7 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* F0 */ - { Bad_Opcode }, + { X86_64_EVEX_FROM_VEX_TABLE (X86_64_EVEX_0F3AF0) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -983,13 +983,13 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 60 */ + { "movbeS", { Gv, Ev }, PREFIX_DATA_AND_NP_ONLY }, + { "movbeS", { Ev, Gv }, PREFIX_DATA_AND_NP_ONLY }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { "wrussK", { M, Gdq }, PREFIX_DATA }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_66) }, { Bad_Opcode }, /* 68 */ { Bad_Opcode }, @@ -1113,19 +1113,19 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, + { "sha1rnds4", { XM, EXxmm, Ib }, 0 }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, /* D8 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_D8) }, + { "sha1msg1", { XM, EXxmm }, 0 }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DA) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DB) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DC) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DD) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DE) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_DF) }, /* E0 */ { Bad_Opcode }, { Bad_Opcode }, @@ -1145,20 +1145,20 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* F0 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_F0) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_F1) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_F2) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, /* F8 */ + { PREFIX_TABLE (PREFIX_EVEX_MAP4_F8) }, + { MOD_TABLE (MOD_EVEX_MAP4_F9) }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_MAP4_FC) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 9cb8b29029d..b3a18f19657 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -132,6 +132,13 @@ enum x86_64_isa intel64 }; +enum evex_type +{ + evex_default = 0, + evex_from_legacy, + evex_from_vex, +}; + struct instr_info { enum address_mode address_mode; @@ -211,7 +218,6 @@ struct instr_info int ll; bool w; bool evex; - bool r; bool v; bool zeroing; bool b; @@ -219,6 +225,8 @@ struct instr_info } vex; + enum evex_type evex_type; + /* Remember if the current op is a jump instruction. */ bool op_is_jump; @@ -301,6 +309,7 @@ struct dis_private { #define PREFIX_ADDR 0x400 #define PREFIX_FWAIT 0x800 #define PREFIX_REX2 0x1000 +#define PREFIX_DATA_AND_NP_ONLY 0x2000 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) to ADDR (exclusive) are valid. Returns true for success, false @@ -794,6 +803,7 @@ enum USE_RM_TABLE, USE_PREFIX_TABLE, USE_X86_64_TABLE, + USE_X86_64_EVEX_FROM_VEX_TABLE, USE_3BYTE_TABLE, USE_XOP_8F_TABLE, USE_VEX_C4_TABLE, @@ -812,6 +822,8 @@ enum #define RM_TABLE(I) DIS386 (USE_RM_TABLE, (I)) #define PREFIX_TABLE(I) DIS386 (USE_PREFIX_TABLE, (I)) #define X86_64_TABLE(I) DIS386 (USE_X86_64_TABLE, (I)) +#define X86_64_EVEX_FROM_VEX_TABLE(I) \ + DIS386 (USE_X86_64_EVEX_FROM_VEX_TABLE, (I)) #define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I)) #define XOP_8F_TABLE() DIS386 (USE_XOP_8F_TABLE, 0) #define VEX_C4_TABLE() DIS386 (USE_VEX_C4_TABLE, 0) @@ -871,7 +883,9 @@ enum REG_EVEX_0F72, REG_EVEX_0F73, REG_EVEX_0F38C6_L_2, - REG_EVEX_0F38C7_L_2 + REG_EVEX_0F38C7_L_2, + REG_EVEX_0F38F3_L_0, + REG_EVEX_MAP4_D8_PREFIX_1 }; enum @@ -911,6 +925,17 @@ enum MOD_0F38DC_PREFIX_1, MOD_VEX_0F3849_X86_64_L_0_W_0, + + MOD_EVEX_MAP4_DA_PREFIX_1, + MOD_EVEX_MAP4_DB_PREFIX_1, + MOD_EVEX_MAP4_DC_PREFIX_1, + MOD_EVEX_MAP4_DD_PREFIX_1, + MOD_EVEX_MAP4_DE_PREFIX_1, + MOD_EVEX_MAP4_DF_PREFIX_1, + MOD_EVEX_MAP4_F8_PREFIX_1, + MOD_EVEX_MAP4_F8_PREFIX_2, + MOD_EVEX_MAP4_F8_PREFIX_3, + MOD_EVEX_MAP4_F9, }; enum @@ -1146,6 +1171,20 @@ enum PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3AC2, + PREFIX_EVEX_MAP4_66, + PREFIX_EVEX_MAP4_D8, + PREFIX_EVEX_MAP4_DA, + PREFIX_EVEX_MAP4_DB, + PREFIX_EVEX_MAP4_DC, + PREFIX_EVEX_MAP4_DD, + PREFIX_EVEX_MAP4_DE, + PREFIX_EVEX_MAP4_DF, + PREFIX_EVEX_MAP4_F0, + PREFIX_EVEX_MAP4_F1, + PREFIX_EVEX_MAP4_F2, + PREFIX_EVEX_MAP4_F8, + PREFIX_EVEX_MAP4_FC, + PREFIX_EVEX_MAP5_10, PREFIX_EVEX_MAP5_11, PREFIX_EVEX_MAP5_1D, @@ -1256,6 +1295,35 @@ enum X86_64_VEX_0F38ED, X86_64_VEX_0F38EE, X86_64_VEX_0F38EF, + + X86_64_EVEX_0F90, + X86_64_EVEX_0F91, + X86_64_EVEX_0F92, + X86_64_EVEX_0F93, + X86_64_EVEX_0F3849, + X86_64_EVEX_0F384B, + X86_64_EVEX_0F38E0, + X86_64_EVEX_0F38E1, + X86_64_EVEX_0F38E2, + X86_64_EVEX_0F38E3, + X86_64_EVEX_0F38E4, + X86_64_EVEX_0F38E5, + X86_64_EVEX_0F38E6, + X86_64_EVEX_0F38E7, + X86_64_EVEX_0F38E8, + X86_64_EVEX_0F38E9, + X86_64_EVEX_0F38EA, + X86_64_EVEX_0F38EB, + X86_64_EVEX_0F38EC, + X86_64_EVEX_0F38ED, + X86_64_EVEX_0F38EE, + X86_64_EVEX_0F38EF, + X86_64_EVEX_0F38F2, + X86_64_EVEX_0F38F3, + X86_64_EVEX_0F38F5, + X86_64_EVEX_0F38F6, + X86_64_EVEX_0F38F7, + X86_64_EVEX_0F3AF0, }; enum @@ -1286,6 +1354,7 @@ enum EVEX_MAP4, EVEX_MAP5, EVEX_MAP6, + EVEX_MAP7, }; enum @@ -1438,6 +1507,8 @@ enum EVEX_LEN_0F385B, EVEX_LEN_0F38C6, EVEX_LEN_0F38C7, + EVEX_LEN_0F38F2, + EVEX_LEN_0F38F3, EVEX_LEN_0F3A00, EVEX_LEN_0F3A01, EVEX_LEN_0F3A18, @@ -4478,6 +4549,8 @@ static const struct dis386 x86_64_table[][2] = { { Bad_Opcode }, { "cmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA }, }, + +#include "i386-dis-evex-x86-64.h" }; static const struct dis386 three_byte_table[][256] = { @@ -8668,6 +8741,9 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins) dp = &prefix_table[dp->op[1].bytemode][vindex]; break; + case USE_X86_64_EVEX_FROM_VEX_TABLE: + ins->evex_type = evex_from_vex; + /* Fall through. */ case USE_X86_64_TABLE: vindex = ins->address_mode == mode_64bit ? 1 : 0; dp = &x86_64_table[dp->op[1].bytemode][vindex]; @@ -8905,9 +8981,13 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins) if (!fetch_code (ins->info, ins->codep + 4)) return &err_opcode; /* The first byte after 0x62. */ + if (*ins->codep & 0x8) + ins->rex2 |= REX_B; + if (!(*ins->codep & 0x10)) + ins->rex2 |= REX_R; + ins->rex = ~(*ins->codep >> 5) & 0x7; - ins->vex.r = *ins->codep & 0x10; - switch ((*ins->codep & 0xf)) + switch ((*ins->codep & 0x7)) { default: return &bad_opcode; @@ -8920,12 +9000,19 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins) case 0x3: vex_table_index = EVEX_0F3A; break; + case 0x4: + vex_table_index = EVEX_MAP4; + ins->evex_type = evex_from_legacy; + break; case 0x5: vex_table_index = EVEX_MAP5; break; case 0x6: vex_table_index = EVEX_MAP6; break; + case 0x7: + vex_table_index = EVEX_MAP7; + break; } /* The second byte after 0x62. */ @@ -8936,9 +9023,8 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins) ins->vex.register_specifier = (~(*ins->codep >> 3)) & 0xf; - /* The U bit. */ if (!(*ins->codep & 0x4)) - return &bad_opcode; + ins->rex2 |= REX_X; switch ((*ins->codep & 0x3)) { @@ -8968,9 +9054,12 @@ get_valid_dis386 (const struct dis386 *dp, instr_info *ins) if (ins->address_mode != mode_64bit) { + if (ins->evex_type != evex_default + || (ins->rex2 & (REX_B | REX_X))) + return &bad_opcode; /* In 16/32-bit mode silently ignore following bits. */ ins->rex &= ~REX_B; - ins->vex.r = true; + ins->rex2 &= ~REX_R; } ins->need_vex = 4; @@ -9386,6 +9475,13 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) dp = get_valid_dis386 (dp, &ins); if (dp == &err_opcode) goto fetch_error_out; + + /* For APX instructions promoted from legacy maps 0/1, prefix + 0x66 is interpreted as the operand size override. */ + if (ins.evex_type == evex_from_legacy + && ins.vex.prefix == DATA_PREFIX_OPCODE) + sizeflag ^= DFLAG; + if (dp != NULL && putop (&ins, dp->name, sizeflag) == 0) { if (!get_sib (&ins, sizeflag)) @@ -9566,6 +9662,19 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) if (ins.last_repnz_prefix >= 0) ins.all_prefixes[ins.last_repnz_prefix] = 0xf2; break; + + case PREFIX_DATA_AND_NP_ONLY: + if (ins.vex.prefix & ~DATA_PREFIX_OPCODE) + { + i386_dis_printf (info, dis_style_text, "(bad)"); + ret = ins.end_codep - priv.the_buffer; + goto out; + } + break; + + default: + break; + } /* Check if the REX prefix is used. */ @@ -10274,7 +10383,7 @@ putop (instr_info *ins, const char *in_template, int sizeflag) { case 'X': if (!ins->vex.evex || ins->vex.b || ins->vex.ll >= 2 - || !ins->vex.r + || (ins->rex2 & REX_R) || (ins->modrm.mod == 3 && (ins->rex & REX_X)) || !ins->vex.v || ins->vex.mask_register_specifier) break; @@ -11168,7 +11277,7 @@ print_register (instr_info *ins, unsigned int reg, unsigned int rexmask, case b_swap_mode: if (reg & 4) USED_REX (0); - if (ins->rex) + if (ins->rex || ins->rex2) names = att_names8rex; else names = att_names8; @@ -11385,7 +11494,7 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag) add += (ins->rex2 & REX_B) ? 16 : 0; - if (ins->vex.evex) + if (ins->vex.evex && ins->evex_type == evex_default) { /* Zeroing-masking is invalid for memory destinations. Set the flag @@ -11732,7 +11841,7 @@ OP_E_memory (instr_info *ins, int bytemode, int sizeflag) if (ins->rex & REX_R) modrm_reg += 8; - if (!ins->vex.r) + if (ins->rex2 & REX_R) modrm_reg += 16; if (vindex == modrm_reg) oappend (ins, "/(bad)"); @@ -11934,10 +12043,7 @@ OP_indirE (instr_info *ins, int bytemode, int sizeflag) static bool OP_G (instr_info *ins, int bytemode, int sizeflag) { - if (ins->vex.evex && !ins->vex.r && ins->address_mode == mode_64bit) - oappend (ins, "(bad)"); - else - print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag); + print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag); return true; } @@ -12567,7 +12673,7 @@ OP_XMM (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED) reg += 8; if (ins->vex.evex) { - if (!ins->vex.r) + if (ins->rex2 & REX_R) reg += 16; } @@ -13574,7 +13680,7 @@ DistinctDest_Fixup (instr_info *ins, int bytemode, int sizeflag) /* Calc destination register number. */ if (ins->rex & REX_R) modrm_reg += 8; - if (!ins->vex.r) + if (ins->rex2 & REX_R) modrm_reg += 16; /* Calc src1 register number. */ diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 589f9682699..3ab2362a3cc 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -1050,6 +1050,7 @@ process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space, SPACE(0F), SPACE(0F38), SPACE(0F3A), + SPACE(EVEXMAP4), SPACE(EVEXMAP5), SPACE(EVEXMAP6), SPACE(XOP08), @@ -1153,6 +1154,7 @@ process_i386_opcode_modifier (FILE *table, char *mod, unsigned int space, is_evex_encoding. */ if (modifiers[Vex].value || ((space > SPACE_0F || has_special_handle) + && !(space == SPACE_EVEXMAP4) && !modifiers[EVex].value && !modifiers[Disp8MemShift].value && !modifiers[Broadcast].value diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index c8082971f81..d7d28bf3d93 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -972,6 +972,7 @@ typedef struct insn_template 1: 0F opcode prefix / space. 2: 0F38 opcode prefix / space. 3: 0F3A opcode prefix / space. + 4: EVEXMAP4 opcode prefix / space. 5: EVEXMAP5 opcode prefix / space. 6: EVEXMAP6 opcode prefix / space. 8: XOP 08 opcode space. @@ -982,6 +983,7 @@ typedef struct insn_template #define SPACE_0F 1 #define SPACE_0F38 2 #define SPACE_0F3A 3 +#define SPACE_EVEXMAP4 4 #define SPACE_EVEXMAP5 5 #define SPACE_EVEXMAP6 6 #define SPACE_XOP08 8 diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 17be21fdf0e..9d5d30901c8 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -109,6 +109,7 @@ #define SpaceXOP09 OpcodeSpace=SPACE_XOP09 #define SpaceXOP0A OpcodeSpace=SPACE_XOP0A +#define EVexMap4 OpcodeSpace=SPACE_EVEXMAP4 #define EVexMap5 OpcodeSpace=SPACE_EVEXMAP5 #define EVexMap6 OpcodeSpace=SPACE_EVEXMAP6 @@ -136,6 +137,8 @@ #define Vsz256 Vsz=VSZ256 #define Vsz512 Vsz=VSZ512 +#define APX_F APX_F|x64 + // The EVEX purpose of StaticRounding appears only together with SAE. Re-use // the bit to mark commutative VEX encodings where swapping the source // operands may allow to switch from 3-byte to 2-byte VEX encoding. @@ -189,6 +192,7 @@ mov, 0xf24, i386|No64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf, { Te // Move after swapping the bytes movbe, 0x0f38f0, Movbe, D|Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +movbe, 0x60, Movbe|APX_F, D|Modrm|CheckOperandSize|No_bSuf|No_sSuf|EVex128|EVexMap4, { Reg16|Reg32|Reg64|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // Move with sign extend. movsb, 0xfbe, i386, Modrm|No_bSuf|No_sSuf, { Reg8|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } @@ -302,6 +306,9 @@ sbb, 0x18, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg sbb, 0x83/3, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } sbb, 0x1c, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword } sbb, 0x80/3, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +sbb, 0x18, APX_F, D|W|CheckOperandSize|Modrm|EVex128|EVexMap4|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +sbb, 0x83/3, APX_F, Modrm|EVex128|EVexMap4|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +sbb, 0x80/3, APX_F, W|Modrm|EVex128|EVexMap4|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } cmp, 0x38, 0, D|W|CheckOperandSize|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } cmp, 0x83/7, 0, Modrm|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } @@ -334,9 +341,14 @@ adc, 0x10, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg adc, 0x83/2, 0, Modrm|No_bSuf|No_sSuf|HLEPrefixLock, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } adc, 0x14, 0, W|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Acc|Byte|Word|Dword|Qword } adc, 0x80/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +adc, 0x10, APX_F, D|W|CheckOperandSize|Modrm|EVex128|EVexMap4|No_sSuf, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +adc, 0x83/2, APX_F, Modrm|EVex128|EVexMap4|No_bSuf|No_sSuf, { Imm8S, Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex } +adc, 0x80/2, APX_F, W|Modrm|EVex128|EVexMap4|No_sSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } neg, 0xf6/3, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } + not, 0xf6/2, 0, W|Modrm|No_sSuf|HLEPrefixLock, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +not, 0xf6/2, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } aaa, 0x37, No64, NoSuf, {} aas, 0x3f, No64, NoSuf, {} @@ -397,11 +409,19 @@ rcl, 0xd0/2, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword| rcl, 0xc0/2, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcl, 0xd2/2, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcl, 0xd0/2, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcl, 0xd0/2, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcl, 0xc0/2, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcl, 0xd2/2, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcl, 0xd0/2, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcr, 0xd0/3, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcr, 0xc0/3, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcr, 0xd2/3, 0, W|Modrm|No_sSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } rcr, 0xd0/3, 0, W|Modrm|No_sSuf, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcr, 0xd0/3, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcr, 0xc0/3, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcr, 0xd2/3, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { ShiftCount, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } +rcr, 0xd0/3, APX_F, W|Modrm|No_sSuf|EVex128|EVexMap4, { Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } sal, 0xd0/4, 0, W|Modrm|No_sSuf, { Imm1, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } sal, 0xc0/4, i186, W|Modrm|No_sSuf, { Imm8, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } @@ -1314,13 +1334,16 @@ getsec, 0xf37, SMX, NoSuf, {} invept, 0x660f3880, EPT|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 } invept, 0x660f3880, EPT|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 } +invept, 0xf3f0, APX_F|EPT, Modrm|NoSuf|EVex128|EVexMap4, { Oword|Unspecified|BaseIndex, Reg64 } invvpid, 0x660f3881, EPT|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 } invvpid, 0x660f3881, EPT|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 } +invvpid, 0xf3f1, APX_F|EPT, Modrm|NoSuf|EVex128|EVexMap4, { Oword|Unspecified|BaseIndex, Reg64 } // INVPCID instruction invpcid, 0x660f3882, INVPCID|No64, Modrm|IgnoreSize|NoSuf, { Oword|Unspecified|BaseIndex, Reg32 } invpcid, 0x660f3882, INVPCID|x64, Modrm|NoSuf|NoRex64, { Oword|Unspecified|BaseIndex, Reg64 } +invpcid, 0xf3f2, APX_F|INVPCID, Modrm|NoSuf|EVex128|EVexMap4, { Oword|Unspecified|BaseIndex, Reg64 } // SSSE3 instructions. @@ -1420,7 +1443,9 @@ pcmpestrm, 0x660f3a60, SSE4_2|x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { I pcmpistri, 0x660f3a63, , Modrm||NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM } pcmpistrm, 0x660f3a62, , Modrm||NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM } crc32, 0xf20f38f0, SSE4_2, W|Modrm|No_sSuf|No_qSuf, { Reg8|Reg16|Reg32|Unspecified|BaseIndex, Reg32 } +crc32, 0xf0, APX_F, W|Modrm|No_sSuf|No_qSuf|EVex128|EVexMap4, { Reg8|Reg16|Reg32|Unspecified|BaseIndex, Reg32 } crc32, 0xf20f38f0, SSE4_2|x64, W|Modrm|No_wSuf|No_lSuf|No_sSuf, { Reg8|Reg64|Unspecified|BaseIndex, Reg64 } +crc32, 0xf0, APX_F, W|Modrm|No_wSuf|No_lSuf|No_sSuf|EVex128|EVexMap4, { Reg8|Reg64|Unspecified|BaseIndex, Reg64 } // xsave/xrstor New Instructions. @@ -1832,13 +1857,21 @@ xtest, 0xf01d6, HLE|RTM, NoSuf, {} // BMI2 instructions. bzhi, 0xf5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +bzhi, 0xf5, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } mulx, 0xf2f6, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } +mulx, 0xf2f6, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } pdep, 0xf2f5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } +pdep, 0xf2f5, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } pext, 0xf3f5, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } +pext, 0xf3f5, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } rorx, 0xf2f0, BMI2, Modrm|CheckOperandSize|Vex128|Space0F3A|No_bSuf|No_wSuf|No_sSuf, { Imm8|Imm8S, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, Reg32|Reg64 } +rorx, 0xf2f0, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F3A|No_bSuf|No_wSuf|No_sSuf, { Imm8|Imm8S, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, Reg32|Reg64 } sarx, 0xf3f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +sarx, 0xf3f7, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } shlx, 0x66f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +shlx, 0x66f7, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } shrx, 0xf2f7, BMI2, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +shrx, 0xf2f7, BMI2|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } // FMA4 instructions @@ -1909,10 +1942,15 @@ lwpins, 0x12/0, LWP, Modrm|SpaceXOP0A|NoSuf|VexVVVV|Vex, { Imm32|Imm32S, Reg32|U // BMI instructions andn, 0xf2, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } +andn, 0xf2, BMI|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 } bextr, 0xf7, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +bextr, 0xf7, BMI|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|SwapSources|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } blsi, 0xf3/3, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +blsi, 0xf3/3, BMI|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } blsmsk, 0xf3/2, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +blsmsk, 0xf3/2, BMI|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } blsr, 0xf3/1, BMI, Modrm|CheckOperandSize|Vex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +blsr, 0xf3/1, BMI|APX_F, Modrm|CheckOperandSize|EVex128|Space0F38|VexVVVV|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } tzcnt, 0xf30fbc, BMI, Modrm|CheckOperandSize|No_bSuf|No_sSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // TBM instructions @@ -2017,7 +2055,9 @@ xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {} // Multy-precision Add Carry, rdseed instructions. adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +adcx, 0x6666, ADX|APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVex128|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } +adox, 0xf366, ADX|APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVex128|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 } rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 } // SMAP instructions. @@ -2041,13 +2081,20 @@ bndldx, 0x0f1a, MPX, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex, RegBND } // SHA instructions. sha1rnds4, 0xf3acc, SHA, Modrm|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM } +sha1rnds4, 0xd4, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM } sha1nexte, 0xf38c8, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha1nexte, 0xd8, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } sha1msg1, 0xf38c9, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha1msg1, 0xd9, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } sha1msg2, 0xf38ca, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha1msg2, 0xda, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } sha256rnds2, 0xf38cb, SHA, Modrm|NoSuf, { Acc|Xmmword, RegXMM|Unspecified|BaseIndex, RegXMM } sha256rnds2, 0xf38cb, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha256rnds2, 0xdb, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } sha256msg1, 0xf38cc, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha256msg1, 0xdc, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } sha256msg2, 0xf38cd, SHA, Modrm|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sha256msg2, 0xdd, SHA|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { RegXMM|Unspecified|BaseIndex, RegXMM } // SHA512 instructions. @@ -2107,8 +2154,11 @@ kxnor, 0x46, , Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { kxor, 0x47, , Modrm|Vex256|Space0F|VexVVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask } kmov, 0x90, , Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask||Unspecified|BaseIndex, RegMask } +kmov, 0x90, |APX_F, Modrm|EVex128|Space0F|VexW0|NoSuf, { RegMask||Unspecified|BaseIndex, RegMask } kmov, 0x91, , Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, |Unspecified|BaseIndex } +kmov, 0x91, |APX_F, Modrm|EVex128|Space0F|VexW0|NoSuf, { RegMask, |Unspecified|BaseIndex } kmov, 0x92, , D|Modrm|Vex128|Space0F|VexW0|NoSuf, { Reg32, RegMask } +kmov, 0x92, |APX_F, D|Modrm|EVex128|Space0F|VexW0|NoSuf, { Reg32, RegMask } knot, 0x44, , Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask } kortest, 0x98, , Modrm|Vex128|Space0F|VexW0|NoSuf, { RegMask, RegMask } @@ -2584,8 +2634,11 @@ kadd, 0x4a, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1|| kand, 0x41, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1||NoSuf, { RegMask, RegMask, RegMask } kandn, 0x42, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1||NoSuf|Optimize, { RegMask, RegMask, RegMask } kmov, 0x90, AVX512BW, Modrm|Vex128|Space0F|VexW1||NoSuf, { RegMask||Unspecified|BaseIndex, RegMask } +kmov, 0x90, AVX512BW|APX_F, Modrm|EVex128|Space0F|VexW1||NoSuf, { RegMask||Unspecified|BaseIndex, RegMask } kmov, 0x91, AVX512BW, Modrm|Vex128|Space0F|VexW1||NoSuf, { RegMask, |Unspecified|BaseIndex } +kmov, 0x91, AVX512BW|APX_F, Modrm|EVex128|Space0F|VexW1||NoSuf, { RegMask, |Unspecified|BaseIndex } kmov, 0xf292, AVX512BW, D|Modrm|Vex128|Space0F|||NoSuf, { , RegMask } +kmov, 0xf292, AVX512BW|APX_F, D|Modrm|EVex128|Space0F|||NoSuf, { , RegMask } knot, 0x44, AVX512BW, Modrm|Vex128|Space0F|VexW1||NoSuf, { RegMask, RegMask } kor, 0x45, AVX512BW, Modrm|Vex256|Space0F|VexVVVV|VexW1||NoSuf, { RegMask, RegMask, RegMask } kortest, 0x98, AVX512BW, Modrm|Vex128|Space0F|VexW1||NoSuf, { RegMask, RegMask } @@ -2984,9 +3037,13 @@ rdsspq, 0xf30f1e/1, SHSTK|x64, Modrm|NoSuf, { Reg64 } saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {} rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex } wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex } +wrssd, 0x66, SHSTK|APX_F, Modrm|IgnoreSize|NoSuf|EVex128|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex } wrssq, 0x0f38f6, SHSTK|x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex } +wrssq, 0x66, APX_F|SHSTK, Modrm|NoSuf|Size64|EVex128|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex } wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex } +wrussd, 0x6665, SHSTK|APX_F, Modrm|IgnoreSize|NoSuf|EVex128|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex } wrussq, 0x660f38f5, SHSTK|x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex } +wrussq, 0x6665, SHSTK|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex } setssbsy, 0xf30f01e8, SHSTK, NoSuf, {} clrssbsy, 0xf30fae/6, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex } endbr64, 0xf30f1efa, IBT, NoSuf, {} @@ -3034,7 +3091,9 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex } // MOVDIR[I,64B] instructions. movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +movdiri, 0xf9, MOVDIRI|APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVex128|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +movdir64b, 0x66f8, MOVDIR64B|APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 } // MOVEDIR instructions end. @@ -3063,7 +3122,9 @@ vcvtneps2bf16, 0xf372, AVX_NE_CONVERT, Modrm||Space0F38|VexW0|NoSu // ENQCMD instructions. enqcmd, 0xf20f38f8, ENQCMD, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +enqcmd, 0xf2f8, ENQCMD|APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 } enqcmds, 0xf30f38f8, ENQCMD, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 } +enqcmds, 0xf3f8, ENQCMD|APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 } // ENQCMD instructions end. @@ -3124,8 +3185,8 @@ xresldtrk, 0xf20f01e9, TSXLDTRK, NoSuf, {} // AMX instructions. -ldtilecfg, 0x49/0, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex } -sttilecfg, 0x6649/0, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex } +ldtilecfg, 0x49/0, AMX_TILE|APX_F, Modrm|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex } +sttilecfg, 0x6649/0, AMX_TILE|APX_F, Modrm|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex } tcmmimfp16ps, 0x666c, AMX_COMPLEX|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM } tcmmrlfp16ps, 0x6c, AMX_COMPLEX|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM } @@ -3137,9 +3198,9 @@ tdpbuud, 0x5e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|No tdpbusd, 0x665e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM } tdpbsud, 0xf35e, AMX_INT8|x64, Modrm|Vex128|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf, { RegTMM, RegTMM, RegTMM } -tileloadd, 0xf24b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM } -tileloaddt1, 0x664b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM } -tilestored, 0xf34b, AMX_TILE|x64, Sibmem|Vex128|Space0F38|VexW0|NoSuf, { RegTMM, Unspecified|BaseIndex } +tileloadd, 0xf24b, AMX_TILE|APX_F, Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM } +tileloaddt1, 0x664b, AMX_TILE|APX_F, Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM } +tilestored, 0xf34b, AMX_TILE|APX_F, Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { RegTMM, Unspecified|BaseIndex } tilerelease, 0x49c0, AMX_TILE|x64, Vex128|Space0F38|VexW0|NoSuf, {} @@ -3151,15 +3212,25 @@ tilezero, 0xf249, AMX_TILE|x64, Modrm|Vex128|Space0F38|VexW0|NoSuf, { RegTMM } loadiwkey, 0xf30f38dc, KL, Load|Modrm|NoSuf, { RegXMM, RegXMM } encodekey128, 0xf30f38fa, KL, Modrm|NoSuf, { Reg32, Reg32 } +encodekey128, 0xf3da, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Reg32, Reg32 } encodekey256, 0xf30f38fb, KL, Modrm|NoSuf, { Reg32, Reg32 } +encodekey256, 0xf3db, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Reg32, Reg32 } aesenc128kl, 0xf30f38dc, KL, Modrm|NoSuf, { Unspecified|BaseIndex, RegXMM } +aesenc128kl, 0xf3dc, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, RegXMM } aesdec128kl, 0xf30f38dd, KL, Modrm|NoSuf, { Unspecified|BaseIndex, RegXMM } +aesdec128kl, 0xf3dd, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, RegXMM } aesenc256kl, 0xf30f38de, KL, Modrm|NoSuf, { Unspecified|BaseIndex, RegXMM } +aesenc256kl, 0xf3de, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, RegXMM } aesdec256kl, 0xf30f38df, KL, Modrm|NoSuf, { Unspecified|BaseIndex, RegXMM } +aesdec256kl, 0xf3df, KL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex, RegXMM } aesencwide128kl, 0xf30f38d8/0, WideKL, Modrm|NoSuf, { Unspecified|BaseIndex } +aesencwide128kl, 0xf3d8/0, WideKL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex } aesdecwide128kl, 0xf30f38d8/1, WideKL, Modrm|NoSuf, { Unspecified|BaseIndex } +aesdecwide128kl, 0xf3d8/1, WideKL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex } aesencwide256kl, 0xf30f38d8/2, WideKL, Modrm|NoSuf, { Unspecified|BaseIndex } +aesencwide256kl, 0xf3d8/2, WideKL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex } aesdecwide256kl, 0xf30f38d8/3, WideKL, Modrm|NoSuf, { Unspecified|BaseIndex } +aesdecwide256kl, 0xf3d8/3, WideKL|APX_F, Modrm|NoSuf|EVex128|EVexMap4, { Unspecified|BaseIndex } // KEYLOCKER instructions end. @@ -3308,6 +3379,7 @@ prefetchit1, 0xf18/6, PREFETCHI|x64, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex // CMPCCXADD instructions. cmpxadd, 0x66e, CMPCCXADD|x64, Modrm|Vex|Space0F38|VexVVVV|SwapSources|CheckOperandSize|NoSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +cmpxadd, 0x66e, CMPCCXADD|x64|APX_F, Modrm|EVex128|Space0F38|VexVVVV|SwapSources|CheckOperandSize|NoSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } // CMPCCXADD instructions end. @@ -3327,9 +3399,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST|x64, NoSuf, {} // RAO-INT instructions. aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +aadd, 0xfc, RAO_INT|APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVex128|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +aand, 0x66fc, RAO_INT|APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVex128|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +aor, 0xf2fc, RAO_INT|APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVex128|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } +axor, 0xf3fc, RAO_INT|APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVex128|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex } // RAO-INT instructions end. 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X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="472035514" X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="472035514" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Oct 2023 08:45:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10866"; a="732758242" X-IronPort-AV: E=Sophos;i="6.03,232,1694761200"; d="scan'208";a="732758242" Received: from scymds03.sc.intel.com ([10.148.94.166]) by orsmga006.jf.intel.com with ESMTP; 17 Oct 2023 08:45:49 -0700 Received: from shgcc101.sh.intel.com (shgcc101.sh.intel.com [10.239.85.97]) by scymds03.sc.intel.com (Postfix) with ESMTP id 47CEE53; Tue, 17 Oct 2023 08:45:48 -0700 (PDT) From: "Cui, Lili" To: binutils@sourceware.org Cc: jbeulich@suse.com, hongjiu.lu@intel.com Subject: [PATCH v2 3/8] Add tests for APX GPR32 with extend evex prefix Date: Tue, 17 Oct 2023 15:45:46 +0000 Message-Id: <20231017154546.4070436-1-lili.cui@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org gas/ChangeLog: * testsuite/gas/i386/x86-64-apx-egpr-inval.l: Add some insn don't support gpr32. * testsuite/gas/i386/x86-64-apx-egpr-inval.s: Ditto. * testsuite/gas/i386/x86-64-inval-movbe.l: And .noapx_f for movbe reg to reg. * testsuite/gas/i386/x86-64-inval-movbe.s: Ditto. * testsuite/gas/i386/x86-64.exp: Add new test. * testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l: New test. * testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s: New test. * testsuite/gas/i386/x86-64-apx-evex-egpr.d: New test. * testsuite/gas/i386/x86-64-apx-evex-egpr.s: New test. * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: New test. * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: New test. * testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d: New test. * testsuite/gas/i386/x86-64-apx-evex-promoted.d: New test. * testsuite/gas/i386/x86-64-apx-evex-promoted.s: New test. --- .../gas/i386/x86-64-apx-egpr-inval.l | 196 +++++++++- .../gas/i386/x86-64-apx-egpr-inval.s | 194 +++++++++- .../gas/i386/x86-64-apx-egpr-promote-inval.l | 16 + .../gas/i386/x86-64-apx-egpr-promote-inval.s | 17 + gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d | 20 ++ gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s | 21 ++ .../gas/i386/x86-64-apx-evex-promoted-bad.d | 14 + .../gas/i386/x86-64-apx-evex-promoted-bad.s | 11 + .../gas/i386/x86-64-apx-evex-promoted-intel.d | 334 ++++++++++++++++++ .../gas/i386/x86-64-apx-evex-promoted.d | 334 ++++++++++++++++++ .../gas/i386/x86-64-apx-evex-promoted.s | 330 +++++++++++++++++ gas/testsuite/gas/i386/x86-64.exp | 7 +- 12 files changed, 1484 insertions(+), 10 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l create mode 100644 gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l index c69d01b099a..b03a5eb60f7 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.l @@ -12,12 +12,192 @@ .*:16: Error: register type of address mismatch for `xsaveopt64' .*:17: Error: register type of address mismatch for `xsavec' .*:18: Error: register type of address mismatch for `xsavec64' -GAS LISTING .* -#... -[ ]*1[ ]+\# Check Illegal 64bit APX_F instructions -[ ]*2[ ]+\.text -[ ]*3[ ]+\.arch \.noapx_f -[ ]*4[ ]+test \$0x7, %r17d -[ ]*5[ ]+\.arch \.apx_f -[ ]*6[ ]+\?\?\?\? D510F7C1 test \$0x7, %r17d +.*:20: Error: register type of address mismatch for `phaddw' +.*:21: Error: register type of address mismatch for `phaddd' +.*:22: Error: register type of address mismatch for `phaddsw' +.*:23: Error: register type of address mismatch for `phsubw' +.*:24: Error: register type of address mismatch for `pmaddubsw' +.*:25: Error: register type of address mismatch for `pmulhrsw' +.*:26: Error: register type of address mismatch for `pshufb' +.*:27: Error: register type of address mismatch for `psignb' +.*:28: Error: register type of address mismatch for `psignw' +.*:29: Error: register type of address mismatch for `psignd' +.*:30: Error: register type of address mismatch for `palignr' +.*:31: Error: register type of address mismatch for `pabsb' +.*:32: Error: register type of address mismatch for `pabsw' +.*:33: Error: register type of address mismatch for `pabsd' +.*:34: Error: register type of address mismatch for `blendpd' +.*:35: Error: register type of address mismatch for `blendps' +.*:36: Error: register type of address mismatch for `blendvpd' +.*:37: Error: register type of address mismatch for `blendvps' +.*:38: Error: register type of address mismatch for `blendvpd' +.*:39: Error: register type of address mismatch for `blendvps' +.*:40: Error: register type of address mismatch for `dppd' +.*:41: Error: register type of address mismatch for `dpps' +.*:42: Error: register type of address mismatch for `extractps' +.*:43: Error: register type mismatch for `extractps' +.*:44: Error: register type of address mismatch for `insertps' +.*:45: Error: register type of address mismatch for `movntdqa' +.*:46: Error: register type of address mismatch for `mpsadbw' +.*:47: Error: register type of address mismatch for `packusdw' +.*:48: Error: register type of address mismatch for `pblendvb' +.*:49: Error: register type of address mismatch for `pblendvb' +.*:50: Error: register type of address mismatch for `pblendw' +.*:51: Error: register type of address mismatch for `pcmpeqq' +.*:52: Error: register type of address mismatch for `pextrb' +.*:53: Error: register type mismatch for `pextrb' +.*:54: Error: register type of address mismatch for `pextrw' +.*:55: Error: register type of address mismatch for `pextrd' +.*:56: Error: register type of address mismatch for `pextrq' +.*:57: Error: register type of address mismatch for `phminposuw' +.*:58: Error: register type mismatch for `pinsrb' +.*:59: Error: register type of address mismatch for `pinsrb' +.*:60: Error: register type mismatch for `pinsrd' +.*:61: Error: register type of address mismatch for `pinsrd' +.*:62: Error: register type mismatch for `pinsrq' +.*:63: Error: register type of address mismatch for `pinsrq' +.*:64: Error: register type of address mismatch for `pmaxsb' +.*:65: Error: register type of address mismatch for `pmaxsd' +.*:66: Error: register type of address mismatch for `pmaxud' +.*:67: Error: register type of address mismatch for `pmaxuw' +.*:68: Error: register type of address mismatch for `pminsb' +.*:69: Error: register type of address mismatch for `pminsd' +.*:70: Error: register type of address mismatch for `pminud' +.*:71: Error: register type of address mismatch for `pminuw' +.*:72: Error: register type of address mismatch for `pmovsxbw' +.*:73: Error: register type of address mismatch for `pmovsxbd' +.*:74: Error: register type of address mismatch for `pmovsxbq' +.*:75: Error: register type of address mismatch for `pmovsxwd' +.*:76: Error: register type of address mismatch for `pmovsxwq' +.*:77: Error: register type of address mismatch for `pmovsxdq' +.*:78: Error: register type of address mismatch for `pmovsxbw' +.*:79: Error: register type of address mismatch for `pmovzxbd' +.*:80: Error: register type of address mismatch for `pmovzxbq' +.*:81: Error: register type of address mismatch for `pmovzxwd' +.*:82: Error: register type of address mismatch for `pmovzxwq' +.*:83: Error: register type of address mismatch for `pmovzxdq' +.*:84: Error: register type of address mismatch for `pmuldq' +.*:85: Error: register type of address mismatch for `pmulld' +.*:86: Error: register type of address mismatch for `roundpd' +.*:87: Error: register type of address mismatch for `roundps' +.*:88: Error: register type of address mismatch for `roundsd' +.*:89: Error: register type of address mismatch for `roundss' +.*:90: Error: register type of address mismatch for `pcmpestri' +.*:91: Error: register type of address mismatch for `pcmpestrm' +.*:92: Error: register type of address mismatch for `pcmpgtq' +.*:93: Error: register type of address mismatch for `pcmpistri' +.*:94: Error: register type of address mismatch for `pcmpistrm' +.*:96: Error: register type of address mismatch for `aesdec' +.*:97: Error: register type of address mismatch for `aesdeclast' +.*:98: Error: register type of address mismatch for `aesenc' +.*:99: Error: register type of address mismatch for `aesenclast' +.*:100: Error: register type of address mismatch for `aesimc' +.*:101: Error: register type of address mismatch for `aeskeygenassist' +.*:102: Error: register type of address mismatch for `pclmulqdq' +.*:103: Error: register type of address mismatch for `pclmullqlqdq' +.*:104: Error: register type of address mismatch for `pclmulhqlqdq' +.*:105: Error: register type of address mismatch for `pclmullqhqdq' +.*:106: Error: register type of address mismatch for `pclmulhqhqdq' +.*:108: Error: register type of address mismatch for `gf2p8affineqb' +.*:109: Error: register type of address mismatch for `gf2p8affineinvqb' +.*:110: Error: register type of address mismatch for `gf2p8mulb' +.*:112: Error: register type of address mismatch for `vblendpd' +.*:113: Error: register type of address mismatch for `vblendpd' +.*:114: Error: register type of address mismatch for `vblendps' +.*:115: Error: register type of address mismatch for `vblendps' +.*:116: Error: register type of address mismatch for `vblendvpd' +.*:117: Error: register type of address mismatch for `vblendvpd' +.*:118: Error: register type of address mismatch for `vblendvps' +.*:119: Error: register type of address mismatch for `vblendvps' +.*:120: Error: register type of address mismatch for `vdppd' +.*:121: Error: register type of address mismatch for `vdpps' +.*:122: Error: register type of address mismatch for `vdpps' +.*:123: Error: register type of address mismatch for `vhaddpd' +.*:124: Error: register type of address mismatch for `vhaddpd' +.*:125: Error: register type of address mismatch for `vhsubps' +.*:126: Error: register type of address mismatch for `vhsubps' +.*:127: Error: register type of address mismatch for `vlddqu' +.*:128: Error: register type of address mismatch for `vlddqu' +.*:129: Error: register type of address mismatch for `vldmxcsr' +.*:130: Error: register type of address mismatch for `vmaskmovpd' +.*:131: Error: register type of address mismatch for `vmaskmovpd' +.*:132: Error: register type of address mismatch for `vmaskmovps' +.*:133: Error: register type of address mismatch for `vmaskmovps' +.*:134: Error: register type of address mismatch for `vmaskmovpd' +.*:135: Error: register type of address mismatch for `vmaskmovpd' +.*:136: Error: register type of address mismatch for `vmaskmovps' +.*:137: Error: register type of address mismatch for `vmaskmovps' +.*:138: Error: register type mismatch for `vmovmskpd' +.*:139: Error: register type mismatch for `vmovmskpd' +.*:140: Error: register type mismatch for `vmovmskps' +.*:141: Error: register type mismatch for `vmovmskps' +.*:142: Error: register type of address mismatch for `vpblendvb' +.*:143: Error: register type of address mismatch for `vpblendvb' +.*:144: Error: register type of address mismatch for `vpblendw' +.*:145: Error: register type of address mismatch for `vpblendw' +.*:146: Error: register type of address mismatch for `vpcmpestri' +.*:147: Error: register type of address mismatch for `vpcmpestrm' +.*:148: Error: register type of address mismatch for `vperm2f128' +.*:149: Error: register type of address mismatch for `vphaddd' +.*:150: Error: register type of address mismatch for `vphaddsw' +.*:151: Error: register type of address mismatch for `vphaddw' +.*:152: Error: register type of address mismatch for `vphsubd' +.*:153: Error: register type of address mismatch for `vphsubsw' +.*:154: Error: register type of address mismatch for `vphsubw' +.*:155: Error: register type of address mismatch for `vphaddd' +.*:156: Error: register type of address mismatch for `vphaddsw' +.*:157: Error: register type of address mismatch for `vphaddw' +.*:158: Error: register type of address mismatch for `vphsubd' +.*:159: Error: register type of address mismatch for `vphsubsw' +.*:160: Error: register type of address mismatch for `vphsubw' +.*:161: Error: register type of address mismatch for `vphminposuw' +.*:162: Error: register type mismatch for `vpmovmskb' +.*:163: Error: register type mismatch for `vpmovmskb' +.*:164: Error: register type of address mismatch for `vpsignb' +.*:165: Error: register type of address mismatch for `vpsignw' +.*:166: Error: register type of address mismatch for `vpsignd' +.*:167: Error: register type of address mismatch for `vpsignb' +.*:168: Error: register type of address mismatch for `vpsignw' +.*:169: Error: register type of address mismatch for `vpsignd' +.*:170: Error: register type of address mismatch for `vptest' +.*:171: Error: register type of address mismatch for `vptest' +.*:172: Error: register type of address mismatch for `vrcpps' +.*:173: Error: register type of address mismatch for `vrcpps' +.*:174: Error: register type of address mismatch for `vrcpss' +.*:175: Error: register type of address mismatch for `vrsqrtps' +.*:176: Error: register type of address mismatch for `vrsqrtps' +.*:177: Error: register type of address mismatch for `vrsqrtss' +.*:178: Error: register type of address mismatch for `vstmxcsr' +.*:179: Error: register type of address mismatch for `vtestps' +.*:180: Error: register type of address mismatch for `vtestps' +.*:181: Error: register type of address mismatch for `vtestpd' +.*:182: Error: register type of address mismatch for `vtestps' +.*:183: Error: register type of address mismatch for `vtestpd' +.*:184: Error: register type of address mismatch for `vpblendd' +.*:185: Error: register type of address mismatch for `vpblendd' +.*:186: Error: register type of address mismatch for `vperm2i128' +.*:187: Error: register type of address mismatch for `vpmaskmovd' +.*:188: Error: register type of address mismatch for `vpmaskmovd' +.*:189: Error: register type of address mismatch for `vpmaskmovq' +.*:190: Error: register type of address mismatch for `vpmaskmovq' +.*:191: Error: register type of address mismatch for `vpmaskmovd' +.*:192: Error: register type of address mismatch for `vpmaskmovd' +.*:193: Error: register type of address mismatch for `vpmaskmovq' +.*:194: Error: register type of address mismatch for `vpmaskmovq' +.*:195: Error: register type of address mismatch for `vaesimc' +.*:196: Error: register type of address mismatch for `vaeskeygenassist' +.*:197: Error: register type of address mismatch for `vroundpd' +.*:198: Error: register type of address mismatch for `vroundps' +.*:199: Error: register type of address mismatch for `vroundsd' +.*:200: Error: register type of address mismatch for `vroundss' +.*:201: Error: register type of address mismatch for `vpcmpistri' +.*:202: Error: register type of address mismatch for `vpcmpistrm' +.*:203: Error: register type of address mismatch for `vpcmpeqb' +.*:204: Error: register type of address mismatch for `vpcmpeqw' +.*:205: Error: register type of address mismatch for `vpcmpeqd' +.*:206: Error: register type of address mismatch for `vpcmpeqq' +.*:207: Error: register type of address mismatch for `vpcmpgtb' +.*:208: Error: register type of address mismatch for `vpcmpgtw' +.*:209: Error: register type of address mismatch for `vpcmpgtd' +.*:210: Error: register type of address mismatch for `vpcmpgtq' #pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s index c4d2308a604..71fcb91ce89 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-inval.s @@ -1,4 +1,4 @@ -# Check Illegal 64bit APX_F instructions +# Check illegal 64bit APX_F instructions .text .arch .noapx_f test $0x7, %r17d @@ -16,3 +16,195 @@ xsaveopt64 (%r16, %r31) xsavec (%r16, %rbx) xsavec64 (%r16, %r31) +#SSE + phaddw (%r17),%xmm0 + phaddd (%r17),%xmm0 + phaddsw (%r17),%xmm0 + phsubw (%r17),%xmm0 + pmaddubsw (%r17),%xmm0 + pmulhrsw (%r17),%xmm0 + pshufb (%r17),%xmm0 + psignb (%r17),%xmm0 + psignw (%r17),%xmm0 + psignd (%r17),%xmm0 + palignr $100,(%r17),%xmm6 + pabsb (%r17),%xmm0 + pabsw (%r17),%xmm0 + pabsd (%r17),%xmm0 + blendpd $100,(%r18),%xmm6 + blendps $100,(%r18),%xmm6 + blendvpd %xmm0,(%r19),%xmm6 + blendvps %xmm0,(%r19),%xmm6 + blendvpd (%r19),%xmm6 + blendvps (%r19),%xmm6 + dppd $100,(%r20),%xmm6 + dpps $100,(%r20),%xmm6 + extractps $100,%xmm4,(%r21) + extractps $100,%xmm4,%r21 + insertps $100,(%r21),%xmm6 + movntdqa (%r21),%xmm4 + mpsadbw $100,(%r21),%xmm6 + packusdw (%r21),%xmm6 + pblendvb %xmm0,(%r22),%xmm6 + pblendvb (%r22),%xmm6 + pblendw $100,(%r22),%xmm6 + pcmpeqq (%r22),%xmm6 + pextrb $100,%xmm4,(%r22) + pextrb $100,%xmm4,%r22 + pextrw $100,%xmm4,(%r22) + pextrd $100,%xmm4,(%r22) + pextrq $100,%xmm4,(%r22) + phminposuw (%r23),%xmm4 + pinsrb $100,%r23,%xmm4 + pinsrb $100,(%r23),%xmm4 + pinsrd $100, %r23d, %xmm4 + pinsrd $100,(%r23),%xmm4 + pinsrq $100, %r24, %xmm4 + pinsrq $100,(%r24),%xmm4 + pmaxsb (%r24),%xmm6 + pmaxsd (%r24),%xmm6 + pmaxud (%r24),%xmm6 + pmaxuw (%r24),%xmm6 + pminsb (%r24),%xmm6 + pminsd (%r24),%xmm6 + pminud (%r24),%xmm6 + pminuw (%r24),%xmm6 + pmovsxbw (%r24),%xmm4 + pmovsxbd (%r24),%xmm4 + pmovsxbq (%r24),%xmm4 + pmovsxwd (%r24),%xmm4 + pmovsxwq (%r24),%xmm4 + pmovsxdq (%r24),%xmm4 + pmovsxbw (%r24),%xmm4 + pmovzxbd (%r24),%xmm4 + pmovzxbq (%r24),%xmm4 + pmovzxwd (%r24),%xmm4 + pmovzxwq (%r24),%xmm4 + pmovzxdq (%r24),%xmm4 + pmuldq (%r24),%xmm4 + pmulld (%r24),%xmm4 + roundpd $100,(%r24),%xmm6 + roundps $100,(%r24),%xmm6 + roundsd $100,(%r24),%xmm6 + roundss $100,(%r24),%xmm6 + pcmpestri $100,(%r25),%xmm6 + pcmpestrm $100,(%r25),%xmm6 + pcmpgtq (%r25),%xmm4 + pcmpistri $100,(%r25),%xmm6 + pcmpistrm $100,(%r25),%xmm6 +#AES + aesdec (%r26),%xmm6 + aesdeclast (%r26),%xmm6 + aesenc (%r26),%xmm6 + aesenclast (%r26),%xmm6 + aesimc (%r26),%xmm6 + aeskeygenassist $100,(%r26),%xmm6 + pclmulqdq $100,(%r26),%xmm6 + pclmullqlqdq (%r26),%xmm6 + pclmulhqlqdq (%r26),%xmm6 + pclmullqhqdq (%r26),%xmm6 + pclmulhqhqdq (%r26),%xmm6 +#GFNI + gf2p8affineqb $100,(%r26),%xmm6 + gf2p8affineinvqb $100,(%r26),%xmm6 + gf2p8mulb (%r26),%xmm6 +#VEX without evex + vblendpd $7,(%r27),%xmm6,%xmm2 + vblendpd $7,(%r27),%ymm6,%ymm2 + vblendps $7,(%r27),%xmm6,%xmm2 + vblendps $7,(%r27),%ymm6,%ymm2 + vblendvpd %xmm4,(%r27),%xmm2,%xmm7 + vblendvpd %ymm4,(%r27),%ymm2,%ymm7 + vblendvps %xmm4,(%r27),%xmm2,%xmm7 + vblendvps %ymm4,(%r27),%ymm2,%ymm7 + vdppd $7,(%r27),%xmm6,%xmm2 + vdpps $7,(%r27),%xmm6,%xmm2 + vdpps $7,(%r27),%ymm6,%ymm2 + vhaddpd (%r27),%xmm6,%xmm5 + vhaddpd (%r27),%ymm6,%ymm5 + vhsubps (%r27),%xmm6,%xmm5 + vhsubps (%r27),%ymm6,%ymm5 + vlddqu (%r27),%xmm4 + vlddqu (%r27),%ymm4 + vldmxcsr (%r27) + vmaskmovpd (%r27),%xmm4,%xmm6 + vmaskmovpd %xmm4,%xmm6,(%r27) + vmaskmovps (%r27),%xmm4,%xmm6 + vmaskmovps %xmm4,%xmm6,(%r27) + vmaskmovpd (%r27),%ymm4,%ymm6 + vmaskmovpd %ymm4,%ymm6,(%r27) + vmaskmovps (%r27),%ymm4,%ymm6 + vmaskmovps %ymm4,%ymm6,(%r27) + vmovmskpd %xmm4,%r27d + vmovmskpd %xmm8,%r27d + vmovmskps %xmm4,%r27d + vmovmskps %ymm8,%r27d + vpblendvb %xmm4,(%r27),%xmm2,%xmm7 + vpblendvb %ymm4,(%r27),%ymm2,%ymm7 + vpblendw $7,(%r27),%xmm6,%xmm2 + vpblendw $7,(%r27),%ymm6,%ymm2 + vpcmpestri $7,(%r27),%xmm6 + vpcmpestrm $7,(%r27),%xmm6 + vperm2f128 $7,(%r27),%ymm6,%ymm2 + vphaddd (%r27),%xmm6,%xmm7 + vphaddsw (%r27),%xmm6,%xmm7 + vphaddw (%r27),%xmm6,%xmm7 + vphsubd (%r27),%xmm6,%xmm7 + vphsubsw (%r27),%xmm6,%xmm7 + vphsubw (%r27),%xmm6,%xmm7 + vphaddd (%r27),%ymm6,%ymm7 + vphaddsw (%r27),%ymm6,%ymm7 + vphaddw (%r27),%ymm6,%ymm7 + vphsubd (%r27),%ymm6,%ymm7 + vphsubsw (%r27),%ymm6,%ymm7 + vphsubw (%r27),%ymm6,%ymm7 + vphminposuw (%r27),%xmm6 + vpmovmskb %xmm4,%r27 + vpmovmskb %ymm4,%r27d + vpsignb (%r27),%xmm6,%xmm7 + vpsignw (%r27),%xmm6,%xmm7 + vpsignd (%r27),%xmm6,%xmm7 + vpsignb (%r27),%xmm6,%xmm7 + vpsignw (%r27),%xmm6,%xmm7 + vpsignd (%r27),%xmm6,%xmm7 + vptest (%r27),%xmm6 + vptest (%r27),%ymm6 + vrcpps (%r27),%xmm6 + vrcpps (%r27),%ymm6 + vrcpss (%r27),%xmm6,%xmm6 + vrsqrtps (%r27),%xmm6 + vrsqrtps (%r27),%ymm6 + vrsqrtss (%r27),%xmm6,%xmm6 + vstmxcsr (%r27) + vtestps (%r27),%xmm6 + vtestps (%r27),%ymm6 + vtestpd (%r27),%xmm6 + vtestps (%r27),%ymm6 + vtestpd (%r27),%ymm6 + vpblendd $7,(%r27),%xmm6,%xmm2 + vpblendd $7,(%r27),%ymm6,%ymm2 + vperm2i128 $7,(%r27),%ymm6,%ymm2 + vpmaskmovd (%r27),%xmm4,%xmm6 + vpmaskmovd %xmm4,%xmm6,(%r27) + vpmaskmovq (%r27),%xmm4,%xmm6 + vpmaskmovq %xmm4,%xmm6,(%r27) + vpmaskmovd (%r27),%ymm4,%ymm6 + vpmaskmovd %ymm4,%ymm6,(%r27) + vpmaskmovq (%r27),%ymm4,%ymm6 + vpmaskmovq %ymm4,%ymm6,(%r27) + vaesimc (%r27), %xmm3 + vaeskeygenassist $7,(%r27),%xmm3 + vroundpd $1,(%r24),%xmm6 + vroundps $2,(%r24),%xmm6 + vroundsd $3,(%r24),%xmm6,%xmm3 + vroundss $4,(%r24),%xmm6,%xmm3 + vpcmpistri $100,(%r25),%xmm6 + vpcmpistrm $100,(%r25),%xmm6 + vpcmpeqb (%r26),%ymm6,%ymm2 + vpcmpeqw (%r16),%ymm6,%ymm2 + vpcmpeqd (%r26),%ymm6,%ymm2 + vpcmpeqq (%r16),%ymm6,%ymm2 + vpcmpgtb (%r26),%ymm6,%ymm2 + vpcmpgtw (%r16),%ymm6,%ymm2 + vpcmpgtd (%r26),%ymm6,%ymm2 + vpcmpgtq (%r16),%ymm6,%ymm2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l new file mode 100644 index 00000000000..5c73eea0465 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.l @@ -0,0 +1,16 @@ +.*: Assembler messages: +.*:4: Error: `movbe' is not supported on `x86_64.nomovbe' +.*:5: Error: `movbe' is not supported on `x86_64.nomovbe' +.*:7: Error: `invept' is not supported on `x86_64.nomovbe.noept' +.*:8: Error: `invept' is not supported on `x86_64.nomovbe.noept' +.*:10: Error: `kmovq' is not supported on `x86_64.nomovbe.noept.noavx512bw' +.*:11: Error: `kmovq' is not supported on `x86_64.nomovbe.noept.noavx512bw' +.*:13: Error: `kmovb' is not supported on `x86_64.nomovbe.noept.noavx512bw.noavx512dq' +.*:14: Error: `kmovb' is not supported on `x86_64.nomovbe.noept.noavx512bw.noavx512dq' +.*:16: Error: `kmovw' is not supported on `x86_64.nomovbe.noept.noavx512bw.noavx512dq.noavx512f' +.*:17: Error: `kmovw' is not supported on `x86_64.nomovbe.noept.noavx512bw.noavx512dq.noavx512f' +GAS LISTING .* +#... +[ ]*1[ ]+\# Check illegal 64bit APX EVEX promoted instructions +[ ]*2[ ]+\.text +#pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s new file mode 100644 index 00000000000..c3914ee7437 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-egpr-promote-inval.s @@ -0,0 +1,17 @@ +# Check illegal 64bit APX EVEX promoted instructions + .text + .arch .nomovbe + movbe (%r16), %r17 + movbe (%rax), %rcx + .arch .noept + invept (%r16), %r17 + invept (%rax), %rcx + .arch .noavx512bw + kmovq %k1, (%r16) + kmovq %k1, (%r8) + .arch .noavx512dq + kmovb %k1, %r16d + kmovb %k1, %r8d + .arch .noavx512f + kmovw %k1, %r16d + kmovw %k1, %r8d diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d b/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d new file mode 100644 index 00000000000..c3c578675c0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.d @@ -0,0 +1,20 @@ +#as: +#objdump: -dw +#name: x86-64 APX old evex insn use gpr32 with extend-evex prefix +#source: x86-64-apx-evex-egpr.s + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 fb 79 48 19 04 08 01[ ]+vextractf32x4 \$0x1,%zmm0,\(%r16,%r17,1\) +\s*[a-f0-9]+:\s*62 fa 79 48 5a 04 1a[ ]+vbroadcasti32x4 \(%r18,%r19,1\),%zmm0 +\s*[a-f0-9]+:\s*62 eb 7d 08 17 c4 01[ ]+vextractps \$0x1,%xmm16,%r20d +\s*[a-f0-9]+:\s*62 69 97 00 2a f5[ ]+vcvtsi2sd %r21,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*67 62 fe 55 58 96 36[ ]+vfmaddsub132ph \(%r22d\)\{1to32\},%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 81 fe 18 78 fe[ ]+vcvttss2usi \{sae\},%xmm30,%r23 +\s*[a-f0-9]+:\s*62 25 10 47 58 b4 c5 00 00 00 10[ ]+vaddph 0x10000000\(%rbp,%r24,8\),%zmm29,%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 4d 7c 08 2f 71 7f[ ]+vcomish 0xfe\(%r25\),%xmm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s b/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s new file mode 100644 index 00000000000..7d1c5de2b6d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-egpr.s @@ -0,0 +1,21 @@ +# Check 64bit old evex instructions use gpr32 with evex prefix encoding + + .allow_index_reg + .text +_start: +## DestMem + vextractf32x4 $1, %zmm0, (%r16,%r17) +## SrcMem + vbroadcasti32x4 (%r18,%r19), %zmm0 +## DestReg + vextractps $1, %xmm16, %r20d +## SrcReg + vcvtsi2sdq %r21, %xmm29, %xmm30 +## Broadcast + vfmaddsub132ph (%r22d){1to32}, %zmm5, %zmm6 +## SAE + vcvttss2usi {sae}, %xmm30, %r23 +## Masking + vaddph 0x10000000(%rbp, %r24, 8), %zmm29, %zmm30{%k7} +## Disp8memshift + vcomish 254(%r25), %xmm30 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d new file mode 100644 index 00000000000..81f08516091 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d @@ -0,0 +1,14 @@ +#objdump: -dw +#name: x86-64 EVEX-promoted bad + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]+62 fc 7e 08 60[ ]+\(bad\) +[ ]*[a-f0-9]+:[ ]+c2 62 fc[ ]+ret \$0xfc62 +[ ]*[a-f0-9]+:[ ]+7f 08[ ]+jg 12.* +[ ]*[a-f0-9]+:[ ]+60[ ]+\(bad\) +[ ]*[a-f0-9]+:[ ]+c2[ ]+.byte 0xc2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s new file mode 100644 index 00000000000..f1201c5463c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s @@ -0,0 +1,11 @@ +# Check Illegal prefix for 64bit EVEX-promoted instructions + + .allow_index_reg + .text +_start: + #movbe %r18w,%ax set EVEX.pp = f3 (illegal value). + .byte 0x62, 0xfc, 0x7e, 0x08, 0x60, 0xc2 + #movbe %r18w,%ax set EVEX.pp = f2 (illegal value). + .byte 0x62, 0xfc, 0x7f, 0x08, 0x60, 0xc2 + + diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d new file mode 100644 index 00000000000..8f0748cde83 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d @@ -0,0 +1,334 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 APX_F EVEX-Promoted insns (Intel disassembly) +#source: x86-64-apx-evex-promoted.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 fc 8c 87 23 01 00 00[ ]+aadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 fc bc 87 23 01 00 00[ ]+aadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 fc 8c 87 23 01 00 00[ ]+aand[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 fc bc 87 23 01 00 00[ ]+aand[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 66 d1[ ]+adox[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5c fe 08 66 ff[ ]+adox[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 6c fe 08 66 bc 80 23 01 00 00[ ]+adox[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 66 8c 87 23 01 00 00[ ]+adox[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dd b4 87 23 01 00 00[ ]+aesdec128kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 df b4 87 23 01 00 00[ ]+aesdec256kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 8c 87 23 01 00 00[ ]+aesdecwide128kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 9c 87 23 01 00 00[ ]+aesdecwide256kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dc b4 87 23 01 00 00[ ]+aesenc128kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 de b4 87 23 01 00 00[ ]+aesenc256kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 84 87 23 01 00 00[ ]+aesencwide128kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 94 87 23 01 00 00[ ]+aesencwide256kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 fc 8c 87 23 01 00 00[ ]+aor[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c ff 08 fc bc 87 23 01 00 00[ ]+aor[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 fc 8c 87 23 01 00 00[ ]+axor[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 fc bc 87 23 01 00 00[ ]+axor[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f7 d2[ ]+bextr[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f7 94 87 23 01 00 00[ ]+bextr[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f7 df[ ]+bextr[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f7 bc 87 23 01 00 00[ ]+bextr[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d9[ ]+blsi[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 df[ ]+blsi[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d1[ ]+blsmsk[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 d7[ ]+blsmsk[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 c9[ ]+blsr[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 cf[ ]+blsr[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f5 d2[ ]+bzhi[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f5 94 87 23 01 00 00[ ]+bzhi[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f5 df[ ]+bzhi[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f5 bc 87 23 01 00 00[ ]+bzhi[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e6 94 87 23 01 00 00[ ]+cmpbexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e6 bc 87 23 01 00 00[ ]+cmpbexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e2 94 87 23 01 00 00[ ]+cmpbxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 da d1[ ]+encodekey128[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 db d1[ ]+encodekey256[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*67 62 4c 7f 08 f8 8c 87 23 01 00 00[ ]+enqcmd[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 f8 bc 87 23 01 00 00[ ]+enqcmd[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*67 62 4c 7e 08 f8 8c 87 23 01 00 00[ ]+enqcmds[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 f8 bc 87 23 01 00 00[ ]+enqcmds[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f0 bc 87 23 01 00 00[ ]+invept[ ]+r31,OWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f2 bc 87 23 01 00 00[ ]+invpcid[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f1 bc 87 23 01 00 00[ ]+invvpid[ ]+r31,OWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32[ ]+r22,r31 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32[ ]+r22,QWORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32[ ]+r17,r19b +[ ]*[a-f0-9]+:[ ]*62 ec 7c 08 f0 eb[ ]+crc32[ ]+r21d,r19b +[ ]*[a-f0-9]+:[ ]*62 fc 7c 08 f0 1b[ ]+crc32[ ]+ebx,BYTE PTR \[r19\] +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 ff[ ]+crc32[ ]+r23d,r31d +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 3f[ ]+crc32[ ]+r23d,DWORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 ef[ ]+crc32[ ]+r21d,r31w +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 2f[ ]+crc32[ ]+r21d,WORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 e4 fc 08 f1 d0[ ]+crc32[ ]+r18,rax +[ ]*[a-f0-9]+:[ ]*c5 f9 90 eb[ ]+kmovb[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7d 08 93 cd[ ]+kmovb[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 91 ac 87 23 01 00 00[ ]+kmovb[ ]+BYTE PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 92 e9[ ]+kmovb[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 90 ac 87 23 01 00 00[ ]+kmovb[ ]+k5,BYTE PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c4 e1 f9 90 eb[ ]+kmovd[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7f 08 93 cd[ ]+kmovd[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 91 ac 87 23 01 00 00[ ]+kmovd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7f 08 92 e9[ ]+kmovd[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 90 ac 87 23 01 00 00[ ]+kmovd[ ]+k5,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c4 e1 f8 90 eb[ ]+kmovq[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 ff 08 93 fd[ ]+kmovq[ ]+r31,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 91 ac 87 23 01 00 00[ ]+kmovq[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 ff 08 92 ef[ ]+kmovq[ ]+k5,r31 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 90 ac 87 23 01 00 00[ ]+kmovq[ ]+k5,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c5 f8 90 eb[ ]+kmovw[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7c 08 93 cd[ ]+kmovw[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 91 ac 87 23 01 00 00[ ]+kmovw[ ]+WORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 92 e9[ ]+kmovw[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 90 ac 87 23 01 00 00[ ]+kmovw[ ]+k5,WORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7c 08 49 84 87 23 01 00 00[ ]+ldtilecfg[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 fc 7d 08 60 c2[ ]+movbe[ ]+ax,r18w +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 61 94 80 23 01 00 00[ ]+movbe[ ]+WORD PTR \[r16\+rax\*4\+0x123\],r18w +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 61 94 87 23 01 00 00[ ]+movbe[ ]+WORD PTR \[r31\+rax\*4\+0x123\],r18w +[ ]*[a-f0-9]+:[ ]*62 dc 7c 08 60 d1[ ]+movbe[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 6c 7c 08 61 8c 80 23 01 00 00[ ]+movbe[ ]+DWORD PTR \[r16\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 5c fc 08 60 ff[ ]+movbe[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 61 bc 80 23 01 00 00[ ]+movbe[ ]+QWORD PTR \[r16\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 61 bc 87 23 01 00 00[ ]+movbe[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 60 bc 80 23 01 00 00[ ]+movbe[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 60 94 87 23 01 00 00[ ]+movbe[ ]+r18w,WORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 60 8c 87 23 01 00 00[ ]+movbe[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*67 62 4c 7d 08 f8 8c 87 23 01 00 00[ ]+movdir64b[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f5 bc 87 23 01 00 00[ ]+pdep[ ]+r15,r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 6e 08 f5 d1[ ]+pext[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 86 08 f5 df[ ]+pext[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 36 00 f5 94 87 23 01 00 00[ ]+pext[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 86 00 f5 bc 87 23 01 00 00[ ]+pext[ ]+r15,r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d9 f7[ ]+sha1msg1 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d9 b4 87 23 01 00 00[ ]+sha1msg1 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 da f7[ ]+sha1msg2 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 da b4 87 23 01 00 00[ ]+sha1msg2 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d8 f7[ ]+sha1nexte xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d8 b4 87 23 01 00 00[ ]+sha1nexte xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d4 f7 7b[ ]+sha1rnds4 xmm22,xmm23,0x7b +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d4 b4 87 23 01 00 00 7b[ ]+sha1rnds4 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\],0x7b +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dc f7[ ]+sha256msg1 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dc b4 87 23 01 00 00[ ]+sha256msg1 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dd f7[ ]+sha256msg2 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dd b4 87 23 01 00 00[ ]+sha256msg2 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5c 7c 08 db a4 87 23 01 00 00[ ]+sha256rnds2 xmm12,XMMWORD PTR \[r31\+rax\*4\+0x123\],xmm0 +[ ]*[a-f0-9]+:[ ]*62 72 35 00 f7 d2[ ]+shlx[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 35 00 f7 94 87 23 01 00 00[ ]+shlx[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 85 00 f7 df[ ]+shlx[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 f7 bc 87 23 01 00 00[ ]+shlx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 72 37 00 f7 d2[ ]+shrx[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f7 94 87 23 01 00 00[ ]+shrx[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+\[r31\+rax\*4\+0x123\],tmm6 +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 66 8c 87 23 01 00 00[ ]+wrssd[ ]+\[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 66 bc 87 23 01 00 00[ ]+wrssq[ ]+\[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 65 8c 87 23 01 00 00[ ]+wrussd[ ]+\[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 65 bc 87 23 01 00 00[ ]+wrussq[ ]+\[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 fc 8c 87 23 01 00 00[ ]+aadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 fc bc 87 23 01 00 00[ ]+aadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 fc 8c 87 23 01 00 00[ ]+aand[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 fc bc 87 23 01 00 00[ ]+aand[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 66 d1[ ]+adox[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5c fe 08 66 ff[ ]+adox[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 6c fe 08 66 bc 80 23 01 00 00[ ]+adox[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 66 8c 87 23 01 00 00[ ]+adox[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dd b4 87 23 01 00 00[ ]+aesdec128kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 df b4 87 23 01 00 00[ ]+aesdec256kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 8c 87 23 01 00 00[ ]+aesdecwide128kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 9c 87 23 01 00 00[ ]+aesdecwide256kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dc b4 87 23 01 00 00[ ]+aesenc128kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 de b4 87 23 01 00 00[ ]+aesenc256kl xmm22,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 84 87 23 01 00 00[ ]+aesencwide128kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 94 87 23 01 00 00[ ]+aesencwide256kl[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 fc 8c 87 23 01 00 00[ ]+aor[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c ff 08 fc bc 87 23 01 00 00[ ]+aor[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 fc 8c 87 23 01 00 00[ ]+axor[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 fc bc 87 23 01 00 00[ ]+axor[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f7 d2[ ]+bextr[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f7 94 87 23 01 00 00[ ]+bextr[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f7 df[ ]+bextr[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f7 bc 87 23 01 00 00[ ]+bextr[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d9[ ]+blsi[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 df[ ]+blsi[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d1[ ]+blsmsk[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 d7[ ]+blsmsk[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 c9[ ]+blsr[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 cf[ ]+blsr[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f5 d2[ ]+bzhi[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f5 94 87 23 01 00 00[ ]+bzhi[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f5 df[ ]+bzhi[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f5 bc 87 23 01 00 00[ ]+bzhi[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e6 94 87 23 01 00 00[ ]+cmpbexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e6 bc 87 23 01 00 00[ ]+cmpbexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e2 94 87 23 01 00 00[ ]+cmpbxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r15,r31 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 da d1[ ]+encodekey128[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 db d1[ ]+encodekey256[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*67 62 4c 7f 08 f8 8c 87 23 01 00 00[ ]+enqcmd[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 f8 bc 87 23 01 00 00[ ]+enqcmd[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*67 62 4c 7e 08 f8 8c 87 23 01 00 00[ ]+enqcmds[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 f8 bc 87 23 01 00 00[ ]+enqcmds[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f0 bc 87 23 01 00 00[ ]+invept[ ]+r31,OWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f2 bc 87 23 01 00 00[ ]+invpcid[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f1 bc 87 23 01 00 00[ ]+invvpid[ ]+r31,OWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32[ ]+r22,r31 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32[ ]+r22,QWORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32[ ]+r17,r19b +[ ]*[a-f0-9]+:[ ]*62 ec 7c 08 f0 eb[ ]+crc32[ ]+r21d,r19b +[ ]*[a-f0-9]+:[ ]*62 fc 7c 08 f0 1b[ ]+crc32[ ]+ebx,BYTE PTR \[r19\] +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 ff[ ]+crc32[ ]+r23d,r31d +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 3f[ ]+crc32[ ]+r23d,DWORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 ef[ ]+crc32[ ]+r21d,r31w +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 2f[ ]+crc32[ ]+r21d,WORD PTR \[r31\] +[ ]*[a-f0-9]+:[ ]*62 e4 fc 08 f1 d0[ ]+crc32[ ]+r18,rax +[ ]*[a-f0-9]+:[ ]*c5 f9 90 eb[ ]+kmovb[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7d 08 93 cd[ ]+kmovb[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 91 ac 87 23 01 00 00[ ]+kmovb[ ]+BYTE PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 92 e9[ ]+kmovb[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 90 ac 87 23 01 00 00[ ]+kmovb[ ]+k5,BYTE PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c4 e1 f9 90 eb[ ]+kmovd[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7f 08 93 cd[ ]+kmovd[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 91 ac 87 23 01 00 00[ ]+kmovd[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7f 08 92 e9[ ]+kmovd[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 90 ac 87 23 01 00 00[ ]+kmovd[ ]+k5,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c4 e1 f8 90 eb[ ]+kmovq[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 ff 08 93 fd[ ]+kmovq[ ]+r31,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 91 ac 87 23 01 00 00[ ]+kmovq[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 ff 08 92 ef[ ]+kmovq[ ]+k5,r31 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 90 ac 87 23 01 00 00[ ]+kmovq[ ]+k5,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*c5 f8 90 eb[ ]+kmovw[ ]+k5,k3 +[ ]*[a-f0-9]+:[ ]*62 61 7c 08 93 cd[ ]+kmovw[ ]+r25d,k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 91 ac 87 23 01 00 00[ ]+kmovw[ ]+WORD PTR \[r31\+rax\*4\+0x123\],k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 92 e9[ ]+kmovw[ ]+k5,r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 90 ac 87 23 01 00 00[ ]+kmovw[ ]+k5,WORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7c 08 49 84 87 23 01 00 00[ ]+ldtilecfg[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 fc 7d 08 60 c2[ ]+movbe[ ]+ax,r18w +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 61 94 80 23 01 00 00[ ]+movbe[ ]+WORD PTR \[r16\+rax\*4\+0x123\],r18w +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 61 94 87 23 01 00 00[ ]+movbe[ ]+WORD PTR \[r31\+rax\*4\+0x123\],r18w +[ ]*[a-f0-9]+:[ ]*62 dc 7c 08 60 d1[ ]+movbe[ ]+edx,r25d +[ ]*[a-f0-9]+:[ ]*62 6c 7c 08 61 8c 80 23 01 00 00[ ]+movbe[ ]+DWORD PTR \[r16\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 5c fc 08 60 ff[ ]+movbe[ ]+r15,r31 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 61 bc 80 23 01 00 00[ ]+movbe[ ]+QWORD PTR \[r16\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 61 bc 87 23 01 00 00[ ]+movbe[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 60 bc 80 23 01 00 00[ ]+movbe[ ]+r31,QWORD PTR \[r16\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 60 94 87 23 01 00 00[ ]+movbe[ ]+r18w,WORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 60 8c 87 23 01 00 00[ ]+movbe[ ]+r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*67 62 4c 7d 08 f8 8c 87 23 01 00 00[ ]+movdir64b[ ]+r25d,\[r31d\+eax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+r31,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f5 bc 87 23 01 00 00[ ]+pdep[ ]+r15,r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 6e 08 f5 d1[ ]+pext[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 5a 86 08 f5 df[ ]+pext[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 da 36 00 f5 94 87 23 01 00 00[ ]+pext[ ]+edx,r25d,DWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5a 86 00 f5 bc 87 23 01 00 00[ ]+pext[ ]+r15,r31,QWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d9 f7[ ]+sha1msg1 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d9 b4 87 23 01 00 00[ ]+sha1msg1 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 da f7[ ]+sha1msg2 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 da b4 87 23 01 00 00[ ]+sha1msg2 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d8 f7[ ]+sha1nexte xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d8 b4 87 23 01 00 00[ ]+sha1nexte xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d4 f7 7b[ ]+sha1rnds4 xmm22,xmm23,0x7b +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d4 b4 87 23 01 00 00 7b[ ]+sha1rnds4 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\],0x7b +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dc f7[ ]+sha256msg1 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dc b4 87 23 01 00 00[ ]+sha256msg1 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dd f7[ ]+sha256msg2 xmm22,xmm23 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dd b4 87 23 01 00 00[ ]+sha256msg2 xmm22,XMMWORD PTR \[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 5c 7c 08 db a4 87 23 01 00 00[ ]+sha256rnds2 xmm12,XMMWORD PTR \[r31\+rax\*4\+0x123\],xmm0 +[ ]*[a-f0-9]+:[ ]*62 72 35 00 f7 d2[ ]+shlx[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 35 00 f7 94 87 23 01 00 00[ ]+shlx[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 85 00 f7 df[ ]+shlx[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 f7 bc 87 23 01 00 00[ ]+shlx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 72 37 00 f7 d2[ ]+shrx[ ]+r10d,edx,r25d +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f7 94 87 23 01 00 00[ ]+shrx[ ]+edx,DWORD PTR \[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+r11,r15,r31 +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\] +[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+\[r31\+rax\*4\+0x123\],tmm6 +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 66 8c 87 23 01 00 00[ ]+wrssd[ ]+\[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 66 bc 87 23 01 00 00[ ]+wrssq[ ]+\[r31\+rax\*4\+0x123\],r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 65 8c 87 23 01 00 00[ ]+wrussd[ ]+\[r31\+rax\*4\+0x123\],r25d +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 65 bc 87 23 01 00 00[ ]+wrussq[ ]+\[r31\+rax\*4\+0x123\],r31 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d new file mode 100644 index 00000000000..d608a4713ec --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d @@ -0,0 +1,334 @@ +#as: +#objdump: -dw +#name: x86_64 APX_F EVEX-Promoted insns +#source: x86-64-apx-evex-promoted.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 fc 8c 87 23 01 00 00[ ]+aadd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 fc bc 87 23 01 00 00[ ]+aadd[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 fc 8c 87 23 01 00 00[ ]+aand[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 fc bc 87 23 01 00 00[ ]+aand[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 66 d1[ ]+adox[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5c fe 08 66 ff[ ]+adox[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 6c fe 08 66 bc 80 23 01 00 00[ ]+adox[ ]+0x123\(%r16,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 66 8c 87 23 01 00 00[ ]+adox[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dd b4 87 23 01 00 00[ ]+aesdec128kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 df b4 87 23 01 00 00[ ]+aesdec256kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 8c 87 23 01 00 00[ ]+aesdecwide128kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 9c 87 23 01 00 00[ ]+aesdecwide256kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dc b4 87 23 01 00 00[ ]+aesenc128kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 de b4 87 23 01 00 00[ ]+aesenc256kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 84 87 23 01 00 00[ ]+aesencwide128kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 94 87 23 01 00 00[ ]+aesencwide256kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 fc 8c 87 23 01 00 00[ ]+aor[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c ff 08 fc bc 87 23 01 00 00[ ]+aor[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 fc 8c 87 23 01 00 00[ ]+axor[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 fc bc 87 23 01 00 00[ ]+axor[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f7 d2[ ]+bextr[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f7 94 87 23 01 00 00[ ]+bextr[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f7 df[ ]+bextr[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f7 bc 87 23 01 00 00[ ]+bextr[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d9[ ]+blsi[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 df[ ]+blsi[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d1[ ]+blsmsk[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 d7[ ]+blsmsk[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 c9[ ]+blsr[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 cf[ ]+blsr[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f5 d2[ ]+bzhi[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f5 94 87 23 01 00 00[ ]+bzhi[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f5 df[ ]+bzhi[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f5 bc 87 23 01 00 00[ ]+bzhi[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e6 94 87 23 01 00 00[ ]+cmpbexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e6 bc 87 23 01 00 00[ ]+cmpbexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e2 94 87 23 01 00 00[ ]+cmpbxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 da d1[ ]+encodekey128[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 db d1[ ]+encodekey256[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*67 62 4c 7f 08 f8 8c 87 23 01 00 00[ ]+enqcmd[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 f8 bc 87 23 01 00 00[ ]+enqcmd[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*67 62 4c 7e 08 f8 8c 87 23 01 00 00[ ]+enqcmds[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 f8 bc 87 23 01 00 00[ ]+enqcmds[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f0 bc 87 23 01 00 00[ ]+invept[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f2 bc 87 23 01 00 00[ ]+invpcid[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f1 bc 87 23 01 00 00[ ]+invvpid[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 +[ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 +[ ]*[a-f0-9]+:[ ]*62 ec 7c 08 f0 eb[ ]+crc32 %r19b,%r21d +[ ]*[a-f0-9]+:[ ]*62 fc 7c 08 f0 1b[ ]+crc32b \(%r19\),%ebx +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 ff[ ]+crc32 %r31d,%r23d +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 3f[ ]+crc32l \(%r31\),%r23d +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 ef[ ]+crc32 %r31w,%r21d +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 2f[ ]+crc32w \(%r31\),%r21d +[ ]*[a-f0-9]+:[ ]*62 e4 fc 08 f1 d0[ ]+crc32 %rax,%r18 +[ ]*[a-f0-9]+:[ ]*c5 f9 90 eb[ ]+kmovb[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7d 08 93 cd[ ]+kmovb[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 91 ac 87 23 01 00 00[ ]+kmovb[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 92 e9[ ]+kmovb[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 90 ac 87 23 01 00 00[ ]+kmovb[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c4 e1 f9 90 eb[ ]+kmovd[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7f 08 93 cd[ ]+kmovd[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 91 ac 87 23 01 00 00[ ]+kmovd[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7f 08 92 e9[ ]+kmovd[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 90 ac 87 23 01 00 00[ ]+kmovd[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c4 e1 f8 90 eb[ ]+kmovq[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 ff 08 93 fd[ ]+kmovq[ ]+%k5,%r31 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 91 ac 87 23 01 00 00[ ]+kmovq[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 ff 08 92 ef[ ]+kmovq[ ]+%r31,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 90 ac 87 23 01 00 00[ ]+kmovq[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c5 f8 90 eb[ ]+kmovw[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7c 08 93 cd[ ]+kmovw[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 91 ac 87 23 01 00 00[ ]+kmovw[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 92 e9[ ]+kmovw[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 90 ac 87 23 01 00 00[ ]+kmovw[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*62 da 7c 08 49 84 87 23 01 00 00[ ]+ldtilecfg[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 fc 7d 08 60 c2[ ]+movbe[ ]+%r18w,%ax +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 61 94 80 23 01 00 00[ ]+movbe[ ]+%r18w,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 61 94 87 23 01 00 00[ ]+movbe[ ]+%r18w,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7c 08 60 d1[ ]+movbe[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 6c 7c 08 61 8c 80 23 01 00 00[ ]+movbe[ ]+%r25d,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5c fc 08 60 ff[ ]+movbe[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 61 bc 80 23 01 00 00[ ]+movbe[ ]+%r31,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 61 bc 87 23 01 00 00[ ]+movbe[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 60 bc 80 23 01 00 00[ ]+movbe[ ]+0x123\(%r16,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 60 94 87 23 01 00 00[ ]+movbe[ ]+0x123\(%r31,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 60 8c 87 23 01 00 00[ ]+movbe[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*67 62 4c 7d 08 f8 8c 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f5 bc 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 5a 6e 08 f5 d1[ ]+pext[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 5a 86 08 f5 df[ ]+pext[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 da 36 00 f5 94 87 23 01 00 00[ ]+pext[ ]+0x123\(%r31,%rax,4\),%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5a 86 00 f5 bc 87 23 01 00 00[ ]+pext[ ]+0x123\(%r31,%rax,4\),%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d9 f7[ ]+sha1msg1[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d9 b4 87 23 01 00 00[ ]+sha1msg1[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 da f7[ ]+sha1msg2[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 da b4 87 23 01 00 00[ ]+sha1msg2[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d8 f7[ ]+sha1nexte[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d8 b4 87 23 01 00 00[ ]+sha1nexte[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d4 f7 7b[ ]+sha1rnds4[ ]+\$0x7b,%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d4 b4 87 23 01 00 00 7b[ ]+sha1rnds4[ ]+\$0x7b,0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dc f7[ ]+sha256msg1[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dc b4 87 23 01 00 00[ ]+sha256msg1[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dd f7[ ]+sha256msg2[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dd b4 87 23 01 00 00[ ]+sha256msg2[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 5c 7c 08 db a4 87 23 01 00 00[ ]+sha256rnds2[ ]+%xmm0,0x123\(%r31,%rax,4\),%xmm12 +[ ]*[a-f0-9]+:[ ]*62 72 35 00 f7 d2[ ]+shlx[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 35 00 f7 94 87 23 01 00 00[ ]+shlx[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 85 00 f7 df[ ]+shlx[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 f7 bc 87 23 01 00 00[ ]+shlx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 72 37 00 f7 d2[ ]+shrx[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f7 94 87 23 01 00 00[ ]+shrx[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1[ ]+0x123\(%r31,%rax,4\),%tmm6 +[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+%tmm6,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 66 8c 87 23 01 00 00[ ]+wrssd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 66 bc 87 23 01 00 00[ ]+wrssq[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 65 8c 87 23 01 00 00[ ]+wrussd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 65 bc 87 23 01 00 00[ ]+wrussq[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 fc 8c 87 23 01 00 00[ ]+aadd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 fc bc 87 23 01 00 00[ ]+aadd[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 fc 8c 87 23 01 00 00[ ]+aand[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 fc bc 87 23 01 00 00[ ]+aand[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 66 d1[ ]+adox[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5c fe 08 66 ff[ ]+adox[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 6c fe 08 66 bc 80 23 01 00 00[ ]+adox[ ]+0x123\(%r16,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 66 8c 87 23 01 00 00[ ]+adox[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dd b4 87 23 01 00 00[ ]+aesdec128kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 df b4 87 23 01 00 00[ ]+aesdec256kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 8c 87 23 01 00 00[ ]+aesdecwide128kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 9c 87 23 01 00 00[ ]+aesdecwide256kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 dc b4 87 23 01 00 00[ ]+aesenc128kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7e 08 de b4 87 23 01 00 00[ ]+aesenc256kl[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 84 87 23 01 00 00[ ]+aesencwide128kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 d8 94 87 23 01 00 00[ ]+aesencwide256kl[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 fc 8c 87 23 01 00 00[ ]+aor[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c ff 08 fc bc 87 23 01 00 00[ ]+aor[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 fc 8c 87 23 01 00 00[ ]+axor[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 fc bc 87 23 01 00 00[ ]+axor[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f7 d2[ ]+bextr[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f7 94 87 23 01 00 00[ ]+bextr[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f7 df[ ]+bextr[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f7 bc 87 23 01 00 00[ ]+bextr[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d9[ ]+blsi[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 df[ ]+blsi[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 9c 87 23 01 00 00[ ]+blsi[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 d1[ ]+blsmsk[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 d7[ ]+blsmsk[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 94 87 23 01 00 00[ ]+blsmsk[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 da 6c 08 f3 c9[ ]+blsr[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 da 84 08 f3 cf[ ]+blsr[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 da 84 00 f3 8c 87 23 01 00 00[ ]+blsr[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 72 34 00 f5 d2[ ]+bzhi[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 34 00 f5 94 87 23 01 00 00[ ]+bzhi[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 84 00 f5 df[ ]+bzhi[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 84 00 f5 bc 87 23 01 00 00[ ]+bzhi[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e6 94 87 23 01 00 00[ ]+cmpbexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e6 bc 87 23 01 00 00[ ]+cmpbexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e2 94 87 23 01 00 00[ ]+cmpbxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e2 bc 87 23 01 00 00[ ]+cmpbxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ec 94 87 23 01 00 00[ ]+cmplxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ec bc 87 23 01 00 00[ ]+cmplxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e7 94 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e7 bc 87 23 01 00 00[ ]+cmpnbexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e3 94 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e3 bc 87 23 01 00 00[ ]+cmpnbxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ef 94 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ef bc 87 23 01 00 00[ ]+cmpnlexadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ed 94 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ed bc 87 23 01 00 00[ ]+cmpnlxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e1 94 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e1 bc 87 23 01 00 00[ ]+cmpnoxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 eb 94 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 eb bc 87 23 01 00 00[ ]+cmpnpxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e9 94 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e9 bc 87 23 01 00 00[ ]+cmpnsxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e5 94 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e5 bc 87 23 01 00 00[ ]+cmpnzxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e0 94 87 23 01 00 00[ ]+cmpoxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e0 bc 87 23 01 00 00[ ]+cmpoxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 ea 94 87 23 01 00 00[ ]+cmppxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 ea bc 87 23 01 00 00[ ]+cmppxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e8 94 87 23 01 00 00[ ]+cmpsxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e8 bc 87 23 01 00 00[ ]+cmpsxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 35 00 e4 94 87 23 01 00 00[ ]+cmpzxadd[ ]+%r25d,%edx,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 e4 bc 87 23 01 00 00[ ]+cmpzxadd[ ]+%r31,%r15,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 da d1[ ]+encodekey128[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 dc 7e 08 db d1[ ]+encodekey256[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*67 62 4c 7f 08 f8 8c 87 23 01 00 00[ ]+enqcmd[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7f 08 f8 bc 87 23 01 00 00[ ]+enqcmd[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*67 62 4c 7e 08 f8 8c 87 23 01 00 00[ ]+enqcmds[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7e 08 f8 bc 87 23 01 00 00[ ]+enqcmds[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f0 bc 87 23 01 00 00[ ]+invept[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f2 bc 87 23 01 00 00[ ]+invpcid[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c fe 08 f1 bc 87 23 01 00 00[ ]+invvpid[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 f7[ ]+crc32 %r31,%r22 +[ ]*[a-f0-9]+:[ ]*62 cc fc 08 f1 37[ ]+crc32q \(%r31\),%r22 +[ ]*[a-f0-9]+:[ ]*62 ec fc 08 f0 cb[ ]+crc32 %r19b,%r17 +[ ]*[a-f0-9]+:[ ]*62 ec 7c 08 f0 eb[ ]+crc32 %r19b,%r21d +[ ]*[a-f0-9]+:[ ]*62 fc 7c 08 f0 1b[ ]+crc32b \(%r19\),%ebx +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 ff[ ]+crc32 %r31d,%r23d +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 f1 3f[ ]+crc32l \(%r31\),%r23d +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 ef[ ]+crc32 %r31w,%r21d +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 f1 2f[ ]+crc32w \(%r31\),%r21d +[ ]*[a-f0-9]+:[ ]*62 e4 fc 08 f1 d0[ ]+crc32 %rax,%r18 +[ ]*[a-f0-9]+:[ ]*c5 f9 90 eb[ ]+kmovb[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7d 08 93 cd[ ]+kmovb[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 91 ac 87 23 01 00 00[ ]+kmovb[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 92 e9[ ]+kmovb[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7d 08 90 ac 87 23 01 00 00[ ]+kmovb[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c4 e1 f9 90 eb[ ]+kmovd[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7f 08 93 cd[ ]+kmovd[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 91 ac 87 23 01 00 00[ ]+kmovd[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7f 08 92 e9[ ]+kmovd[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fd 08 90 ac 87 23 01 00 00[ ]+kmovd[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c4 e1 f8 90 eb[ ]+kmovq[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 ff 08 93 fd[ ]+kmovq[ ]+%k5,%r31 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 91 ac 87 23 01 00 00[ ]+kmovq[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 ff 08 92 ef[ ]+kmovq[ ]+%r31,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 fc 08 90 ac 87 23 01 00 00[ ]+kmovq[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*c5 f8 90 eb[ ]+kmovw[ ]+%k3,%k5 +[ ]*[a-f0-9]+:[ ]*62 61 7c 08 93 cd[ ]+kmovw[ ]+%k5,%r25d +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 91 ac 87 23 01 00 00[ ]+kmovw[ ]+%k5,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 92 e9[ ]+kmovw[ ]+%r25d,%k5 +[ ]*[a-f0-9]+:[ ]*62 d9 7c 08 90 ac 87 23 01 00 00[ ]+kmovw[ ]+0x123\(%r31,%rax,4\),%k5 +[ ]*[a-f0-9]+:[ ]*62 da 7c 08 49 84 87 23 01 00 00[ ]+ldtilecfg[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 fc 7d 08 60 c2[ ]+movbe[ ]+%r18w,%ax +[ ]*[a-f0-9]+:[ ]*62 ec 7d 08 61 94 80 23 01 00 00[ ]+movbe[ ]+%r18w,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 61 94 87 23 01 00 00[ ]+movbe[ ]+%r18w,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 dc 7c 08 60 d1[ ]+movbe[ ]+%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 6c 7c 08 61 8c 80 23 01 00 00[ ]+movbe[ ]+%r25d,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5c fc 08 60 ff[ ]+movbe[ ]+%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 61 bc 80 23 01 00 00[ ]+movbe[ ]+%r31,0x123\(%r16,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 61 bc 87 23 01 00 00[ ]+movbe[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 6c fc 08 60 bc 80 23 01 00 00[ ]+movbe[ ]+0x123\(%r16,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 cc 7d 08 60 94 87 23 01 00 00[ ]+movbe[ ]+0x123\(%r31,%rax,4\),%r18w +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 60 8c 87 23 01 00 00[ ]+movbe[ ]+0x123\(%r31,%rax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*67 62 4c 7d 08 f8 8c 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31d,%eax,4\),%r25d +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 f8 bc 87 23 01 00 00[ ]+movdir64b[ ]+0x123\(%r31,%rax,4\),%r31 +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 f9 8c 87 23 01 00 00[ ]+movdiri[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 f9 bc 87 23 01 00 00[ ]+movdiri[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 5a 6f 08 f5 d1[ ]+pdep[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 5a 87 08 f5 df[ ]+pdep[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f5 94 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f5 bc 87 23 01 00 00[ ]+pdep[ ]+0x123\(%r31,%rax,4\),%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 5a 6e 08 f5 d1[ ]+pext[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 5a 86 08 f5 df[ ]+pext[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 da 36 00 f5 94 87 23 01 00 00[ ]+pext[ ]+0x123\(%r31,%rax,4\),%r25d,%edx +[ ]*[a-f0-9]+:[ ]*62 5a 86 00 f5 bc 87 23 01 00 00[ ]+pext[ ]+0x123\(%r31,%rax,4\),%r31,%r15 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d9 f7[ ]+sha1msg1[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d9 b4 87 23 01 00 00[ ]+sha1msg1[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 da f7[ ]+sha1msg2[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 da b4 87 23 01 00 00[ ]+sha1msg2[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d8 f7[ ]+sha1nexte[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d8 b4 87 23 01 00 00[ ]+sha1nexte[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 d4 f7 7b[ ]+sha1rnds4[ ]+\$0x7b,%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 d4 b4 87 23 01 00 00 7b[ ]+sha1rnds4[ ]+\$0x7b,0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dc f7[ ]+sha256msg1[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dc b4 87 23 01 00 00[ ]+sha256msg1[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 a4 7c 08 dd f7[ ]+sha256msg2[ ]+%xmm23,%xmm22 +[ ]*[a-f0-9]+:[ ]*62 cc 7c 08 dd b4 87 23 01 00 00[ ]+sha256msg2[ ]+0x123\(%r31,%rax,4\),%xmm22 +[ ]*[a-f0-9]+:[ ]*62 5c 7c 08 db a4 87 23 01 00 00[ ]+sha256rnds2[ ]+%xmm0,0x123\(%r31,%rax,4\),%xmm12 +[ ]*[a-f0-9]+:[ ]*62 72 35 00 f7 d2[ ]+shlx[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 35 00 f7 94 87 23 01 00 00[ ]+shlx[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 85 00 f7 df[ ]+shlx[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 85 00 f7 bc 87 23 01 00 00[ ]+shlx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 72 37 00 f7 d2[ ]+shrx[ ]+%r25d,%edx,%r10d +[ ]*[a-f0-9]+:[ ]*62 da 37 00 f7 94 87 23 01 00 00[ ]+shrx[ ]+%r25d,0x123\(%r31,%rax,4\),%edx +[ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 +[ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 +[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1[ ]+0x123\(%r31,%rax,4\),%tmm6 +[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+%tmm6,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7c 08 66 8c 87 23 01 00 00[ ]+wrssd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fc 08 66 bc 87 23 01 00 00[ ]+wrssq[ ]+%r31,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c 7d 08 65 8c 87 23 01 00 00[ ]+wrussd[ ]+%r25d,0x123\(%r31,%rax,4\) +[ ]*[a-f0-9]+:[ ]*62 4c fd 08 65 bc 87 23 01 00 00[ ]+wrussq[ ]+%r31,0x123\(%r31,%rax,4\) diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s new file mode 100644 index 00000000000..7a6dcad1ea3 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s @@ -0,0 +1,330 @@ +# Check 64bit APX_F EVEX-Promoted instructions. + + .text +_start: + aadd %r25d,0x123(%r31,%rax,4) + aadd %r31,0x123(%r31,%rax,4) + aand %r25d,0x123(%r31,%rax,4) + aand %r31,0x123(%r31,%rax,4) + adox %r25d,%edx + adox %r31,%r15 + adox 0x123(%r16,%rax,4),%r31 + adox 0x123(%r31,%rax,4),%r25d + aesdec128kl 0x123(%r31,%rax,4),%xmm22 + aesdec256kl 0x123(%r31,%rax,4),%xmm22 + aesdecwide128kl 0x123(%r31,%rax,4) + aesdecwide256kl 0x123(%r31,%rax,4) + aesenc128kl 0x123(%r31,%rax,4),%xmm22 + aesenc256kl 0x123(%r31,%rax,4),%xmm22 + aesencwide128kl 0x123(%r31,%rax,4) + aesencwide256kl 0x123(%r31,%rax,4) + aor %r25d,0x123(%r31,%rax,4) + aor %r31,0x123(%r31,%rax,4) + axor %r25d,0x123(%r31,%rax,4) + axor %r31,0x123(%r31,%rax,4) + bextr %r25d,%edx,%r10d + bextr %r25d,0x123(%r31,%rax,4),%edx + bextr %r31,%r15,%r11 + bextr %r31,0x123(%r31,%rax,4),%r15 + blsi %r25d,%edx + blsi %r31,%r15 + blsi 0x123(%r31,%rax,4),%r25d + blsi 0x123(%r31,%rax,4),%r31 + blsmsk %r25d,%edx + blsmsk %r31,%r15 + blsmsk 0x123(%r31,%rax,4),%r25d + blsmsk 0x123(%r31,%rax,4),%r31 + blsr %r25d,%edx + blsr %r31,%r15 + blsr 0x123(%r31,%rax,4),%r25d + blsr 0x123(%r31,%rax,4),%r31 + bzhi %r25d,%edx,%r10d + bzhi %r25d,0x123(%r31,%rax,4),%edx + bzhi %r31,%r15,%r11 + bzhi %r31,0x123(%r31,%rax,4),%r15 + cmpbexadd %r25d,%edx,0x123(%r31,%rax,4) + cmpbexadd %r31,%r15,0x123(%r31,%rax,4) + cmpbxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpbxadd %r31,%r15,0x123(%r31,%rax,4) + cmplxadd %r25d,%edx,0x123(%r31,%rax,4) + cmplxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnbexadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnbexadd %r31,%r15,0x123(%r31,%rax,4) + cmpnbxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnbxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnlexadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnlexadd %r31,%r15,0x123(%r31,%rax,4) + cmpnlxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnlxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnoxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnoxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnpxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnpxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnsxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnsxadd %r31,%r15,0x123(%r31,%rax,4) + cmpnzxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpnzxadd %r31,%r15,0x123(%r31,%rax,4) + cmpoxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpoxadd %r31,%r15,0x123(%r31,%rax,4) + cmppxadd %r25d,%edx,0x123(%r31,%rax,4) + cmppxadd %r31,%r15,0x123(%r31,%rax,4) + cmpsxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpsxadd %r31,%r15,0x123(%r31,%rax,4) + cmpzxadd %r25d,%edx,0x123(%r31,%rax,4) + cmpzxadd %r31,%r15,0x123(%r31,%rax,4) + encodekey128 %r25d,%edx + encodekey256 %r25d,%edx + enqcmd 0x123(%r31d,%eax,4),%r25d + enqcmd 0x123(%r31,%rax,4),%r31 + enqcmds 0x123(%r31d,%eax,4),%r25d + enqcmds 0x123(%r31,%rax,4),%r31 + invept 0x123(%r31,%rax,4),%r31 + invpcid 0x123(%r31,%rax,4),%r31 + invvpid 0x123(%r31,%rax,4),%r31 + crc32q %r31, %r22 + crc32q (%r31), %r22 + crc32b %r19b, %r17 + crc32b %r19b, %r21d + crc32b (%r19),%ebx + crc32l %r31d, %r23d + crc32l (%r31), %r23d + crc32w %r31w, %r21d + crc32w (%r31),%r21d + crc32 %rax, %r18 + kmovb %k3,%k5 + kmovb %k5,%r25d + kmovb %k5,0x123(%r31,%rax,4) + kmovb %r25d,%k5 + kmovb 0x123(%r31,%rax,4),%k5 + kmovd %k3,%k5 + kmovd %k5,%r25d + kmovd %k5,0x123(%r31,%rax,4) + kmovd %r25d,%k5 + kmovd 0x123(%r31,%rax,4),%k5 + kmovq %k3,%k5 + kmovq %k5,%r31 + kmovq %k5,0x123(%r31,%rax,4) + kmovq %r31,%k5 + kmovq 0x123(%r31,%rax,4),%k5 + kmovw %k3,%k5 + kmovw %k5,%r25d + kmovw %k5,0x123(%r31,%rax,4) + kmovw %r25d,%k5 + kmovw 0x123(%r31,%rax,4),%k5 + ldtilecfg 0x123(%r31,%rax,4) + movbe %r18w,%ax + movbe %r18w,0x123(%r16,%rax,4) + movbe %r18w,0x123(%r31,%rax,4) + movbe %r25d,%edx + movbe %r25d,0x123(%r16,%rax,4) + movbe %r31,%r15 + movbe %r31,0x123(%r16,%rax,4) + movbe %r31,0x123(%r31,%rax,4) + movbe 0x123(%r16,%rax,4),%r31 + movbe 0x123(%r31,%rax,4),%r18w + movbe 0x123(%r31,%rax,4),%r25d + movdir64b 0x123(%r31d,%eax,4),%r25d + movdir64b 0x123(%r31,%rax,4),%r31 + movdiri %r25d,0x123(%r31,%rax,4) + movdiri %r31,0x123(%r31,%rax,4) + pdep %r25d,%edx,%r10d + pdep %r31,%r15,%r11 + pdep 0x123(%r31,%rax,4),%r25d,%edx + pdep 0x123(%r31,%rax,4),%r31,%r15 + pext %r25d,%edx,%r10d + pext %r31,%r15,%r11 + pext 0x123(%r31,%rax,4),%r25d,%edx + pext 0x123(%r31,%rax,4),%r31,%r15 + sha1msg1 %xmm23,%xmm22 + sha1msg1 0x123(%r31,%rax,4),%xmm22 + sha1msg2 %xmm23,%xmm22 + sha1msg2 0x123(%r31,%rax,4),%xmm22 + sha1nexte %xmm23,%xmm22 + sha1nexte 0x123(%r31,%rax,4),%xmm22 + sha1rnds4 $0x7b,%xmm23,%xmm22 + sha1rnds4 $0x7b,0x123(%r31,%rax,4),%xmm22 + sha256msg1 %xmm23,%xmm22 + sha256msg1 0x123(%r31,%rax,4),%xmm22 + sha256msg2 %xmm23,%xmm22 + sha256msg2 0x123(%r31,%rax,4),%xmm22 + sha256rnds2 0x123(%r31,%rax,4),%xmm12 + shlx %r25d,%edx,%r10d + shlx %r25d,0x123(%r31,%rax,4),%edx + shlx %r31,%r15,%r11 + shlx %r31,0x123(%r31,%rax,4),%r15 + shrx %r25d,%edx,%r10d + shrx %r25d,0x123(%r31,%rax,4),%edx + shrx %r31,%r15,%r11 + shrx %r31,0x123(%r31,%rax,4),%r15 + sttilecfg 0x123(%r31,%rax,4) + tileloadd 0x123(%r31,%rax,4),%tmm6 + tileloaddt1 0x123(%r31,%rax,4),%tmm6 + tilestored %tmm6,0x123(%r31,%rax,4) + wrssd %r25d,0x123(%r31,%rax,4) + wrssq %r31,0x123(%r31,%rax,4) + wrussd %r25d,0x123(%r31,%rax,4) + wrussq %r31,0x123(%r31,%rax,4) + +.intel_syntax noprefix + aadd DWORD PTR [r31+rax*4+0x123],r25d + aadd QWORD PTR [r31+rax*4+0x123],r31 + aand DWORD PTR [r31+rax*4+0x123],r25d + aand QWORD PTR [r31+rax*4+0x123],r31 + adox edx,r25d + adox r15,r31 + adox r31,QWORD PTR [r16+rax*4+0x123] + adox r25d,DWORD PTR [r31+rax*4+0x123] + aesdec128kl xmm22,[r31+rax*4+0x123] + aesdec256kl xmm22,[r31+rax*4+0x123] + aesdecwide128kl [r31+rax*4+0x123] + aesdecwide256kl [r31+rax*4+0x123] + aesenc128kl xmm22,[r31+rax*4+0x123] + aesenc256kl xmm22,[r31+rax*4+0x123] + aesencwide128kl [r31+rax*4+0x123] + aesencwide256kl [r31+rax*4+0x123] + aor DWORD PTR [r31+rax*4+0x123],r25d + aor QWORD PTR [r31+rax*4+0x123],r31 + axor DWORD PTR [r31+rax*4+0x123],r25d + axor QWORD PTR [r31+rax*4+0x123],r31 + bextr r10d,edx,r25d + bextr edx,DWORD PTR [r31+rax*4+0x123],r25d + bextr r11,r15,r31 + bextr r15,QWORD PTR [r31+rax*4+0x123],r31 + blsi edx,r25d + blsi r15,r31 + blsi r25d,DWORD PTR [r31+rax*4+0x123] + blsi r31,QWORD PTR [r31+rax*4+0x123] + blsmsk edx,r25d + blsmsk r15,r31 + blsmsk r25d,DWORD PTR [r31+rax*4+0x123] + blsmsk r31,QWORD PTR [r31+rax*4+0x123] + blsr edx,r25d + blsr r15,r31 + blsr r25d,DWORD PTR [r31+rax*4+0x123] + blsr r31,QWORD PTR [r31+rax*4+0x123] + bzhi r10d,edx,r25d + bzhi edx,DWORD PTR [r31+rax*4+0x123],r25d + bzhi r11,r15,r31 + bzhi r15,QWORD PTR [r31+rax*4+0x123],r31 + cmpbexadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpbexadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpbxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpbxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmplxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmplxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnbexadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnbexadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnbxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnbxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnlexadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnlexadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnlxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnlxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnoxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnoxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnpxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnpxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnsxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnsxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpnzxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpnzxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpoxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpoxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmppxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmppxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpsxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpsxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + cmpzxadd DWORD PTR [r31+rax*4+0x123],edx,r25d + cmpzxadd QWORD PTR [r31+rax*4+0x123],r15,r31 + encodekey128 edx,r25d + encodekey256 edx,r25d + enqcmd r25d,[r31d+eax*4+0x123] + enqcmd r31,[r31+rax*4+0x123] + enqcmds r25d,[r31d+eax*4+0x123] + enqcmds r31,[r31+rax*4+0x123] + invept r31,OWORD PTR [r31+rax*4+0x123] + invpcid r31,[r31+rax*4+0x123] + invvpid r31,OWORD PTR [r31+rax*4+0x123] + crc32 r22,r31 + crc32 r22,QWORD PTR [r31] + crc32 r17,r19b + crc32 r21d,r19b + crc32 ebx,BYTE PTR [r19] + crc32 r23d,r31d + crc32 r23d,DWORD PTR [r31] + crc32 r21d,r31w + crc32 r21d,WORD PTR [r31] + crc32 r18,rax + kmovb k5,k3 + kmovb r25d,k5 + kmovb BYTE PTR [r31+rax*4+0x123],k5 + kmovb k5,r25d + kmovb k5,BYTE PTR [r31+rax*4+0x123] + kmovd k5,k3 + kmovd r25d,k5 + kmovd DWORD PTR [r31+rax*4+0x123],k5 + kmovd k5,r25d + kmovd k5,DWORD PTR [r31+rax*4+0x123] + kmovq k5,k3 + kmovq r31,k5 + kmovq QWORD PTR [r31+rax*4+0x123],k5 + kmovq k5,r31 + kmovq k5,QWORD PTR [r31+rax*4+0x123] + kmovw k5,k3 + kmovw r25d,k5 + kmovw WORD PTR [r31+rax*4+0x123],k5 + kmovw k5,r25d + kmovw k5,WORD PTR [r31+rax*4+0x123] + ldtilecfg [r31+rax*4+0x123] + movbe ax,r18w + movbe WORD PTR [r16+rax*4+0x123],r18w + movbe WORD PTR [r31+rax*4+0x123],r18w + movbe edx,r25d + movbe DWORD PTR [r16+rax*4+0x123],r25d + movbe r15,r31 + movbe QWORD PTR [r16+rax*4+0x123],r31 + movbe QWORD PTR [r31+rax*4+0x123],r31 + movbe r31,QWORD PTR [r16+rax*4+0x123] + movbe r18w,WORD PTR [r31+rax*4+0x123] + movbe r25d,DWORD PTR [r31+rax*4+0x123] + movdir64b r25d,[r31d+eax*4+0x123] + movdir64b r31,[r31+rax*4+0x123] + movdiri DWORD PTR [r31+rax*4+0x123],r25d + movdiri QWORD PTR [r31+rax*4+0x123],r31 + pdep r10d,edx,r25d + pdep r11,r15,r31 + pdep edx,r25d,DWORD PTR [r31+rax*4+0x123] + pdep r15,r31,QWORD PTR [r31+rax*4+0x123] + pext r10d,edx,r25d + pext r11,r15,r31 + pext edx,r25d,DWORD PTR [r31+rax*4+0x123] + pext r15,r31,QWORD PTR [r31+rax*4+0x123] + sha1msg1 xmm22,xmm23 + sha1msg1 xmm22,XMMWORD PTR [r31+rax*4+0x123] + sha1msg2 xmm22,xmm23 + sha1msg2 xmm22,XMMWORD PTR [r31+rax*4+0x123] + sha1nexte xmm22,xmm23 + sha1nexte xmm22,XMMWORD PTR [r31+rax*4+0x123] + sha1rnds4 xmm22,xmm23,0x7b + sha1rnds4 xmm22,XMMWORD PTR [r31+rax*4+0x123],0x7b + sha256msg1 xmm22,xmm23 + sha256msg1 xmm22,XMMWORD PTR [r31+rax*4+0x123] + sha256msg2 xmm22,xmm23 + sha256msg2 xmm22,XMMWORD PTR [r31+rax*4+0x123] + sha256rnds2 xmm12,XMMWORD PTR [r31+rax*4+0x123] + shlx r10d,edx,r25d + shlx edx,DWORD PTR [r31+rax*4+0x123],r25d + shlx r11,r15,r31 + shlx r15,QWORD PTR [r31+rax*4+0x123],r31 + shrx r10d,edx,r25d + shrx edx,DWORD PTR [r31+rax*4+0x123],r25d + shrx r11,r15,r31 + shrx r15,QWORD PTR [r31+rax*4+0x123],r31 + sttilecfg [r31+rax*4+0x123] + tileloadd tmm6,[r31+rax*4+0x123] + tileloaddt1 tmm6,[r31+rax*4+0x123] + tilestored [r31+rax*4+0x123],tmm6 + wrssd DWORD PTR [r31+rax*4+0x123],r25d + wrssq QWORD PTR [r31+rax*4+0x123],r31 + wrussd DWORD PTR [r31+rax*4+0x123],r25d + wrussq QWORD PTR [r31+rax*4+0x123],r31 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index a698a467c53..dc1fa8dddb9 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -360,8 +360,13 @@ run_dump_test "x86-64-avx512f-rcigrne-intel" run_dump_test "x86-64-avx512f-rcigrne" run_dump_test "x86-64-avx512f-rcigru-intel" run_dump_test "x86-64-avx512f-rcigru" -run_list_test "x86-64-apx-egpr-inval" "-al" +run_list_test "x86-64-apx-egpr-inval" +run_dump_test "x86-64-apx-evex-promoted-bad" +run_list_test "x86-64-apx-egpr-promote-inval" "-al" run_dump_test "x86-64-apx-rex2" +run_dump_test "x86-64-apx-evex-promoted" +run_dump_test "x86-64-apx-evex-promoted-intel" +run_dump_test "x86-64-apx-evex-egpr" run_dump_test "x86-64-avx512f-rcigrz-intel" run_dump_test "x86-64-avx512f-rcigrz" run_dump_test "x86-64-clwb"