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[58.96.106.158]) by smtp.gmail.com with ESMTPSA id f15-20020a170902ce8f00b001c9dac0fbbasm480631plg.63.2023.10.16.22.02.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 22:02:16 -0700 (PDT) Received: by squeak.grove.modra.org (Postfix, from userid 1000) id 4806A11422A7; Tue, 17 Oct 2023 15:32:14 +1030 (ACDT) Date: Tue, 17 Oct 2023 15:32:14 +1030 From: Alan Modra To: binutils@sourceware.org Cc: Chenghua Xu , "Maciej W. Rozycki" Subject: R_MICROMIPS_GPREL7_S2 Message-ID: MIME-Version: 1.0 Content-Disposition: inline X-Spam-Status: No, score=-3033.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org This reloc is specified to operate on a half-word by the howtos in elf32-mips.c, elfn32-mips.c and elf64-mips.c. It is also subject to shuffle/unshuffle in code like _bfd_mips_elf32_gprel16_reloc. I believe there is a contradiction here. Either the reloc should operate on a 32-bit word, or it should not be shuffled. As is, address range checking fails to catch a buffer overflow when the reloc is at the last half-word of a section. This patch takes a guess that it should not be shuffled. I didn't find any ABI docs for the reloc, so I'm not at all sure what to do. Current behaviour when applying the reloc to .byte 0x11,0x22,0x33,0x44 is to apply the reloc to byte 0x22 when big-endian, and to byte 0x33 when little-endian. Big-endian behaviour is unchanged after this patch and little-endian applies the reloc to byte 0x11. * elfxx-mips.c (micromips_reloc_shuffle_p): Return false for R_MICROMIPS_GPREL7_S2. diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 92dd4c20a7d..3a6a91359df 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -2231,7 +2231,8 @@ micromips_reloc_shuffle_p (unsigned int r_type) { return (micromips_reloc_p (r_type) && r_type != R_MICROMIPS_PC7_S1 - && r_type != R_MICROMIPS_PC10_S1); + && r_type != R_MICROMIPS_PC10_S1 + && r_type != R_MICROMIPS_GPREL7_S2); } static inline bool