From patchwork Mon Oct 16 06:02:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 77863 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 207A6385840B for ; Mon, 16 Oct 2023 06:03:20 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 088DC385783F for ; Mon, 16 Oct 2023 06:03:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 088DC385783F Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 088DC385783F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=153.120.152.154 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436185; cv=none; b=Ezq/GQQz/qvQKat1XxbAvW0N7Y3Mg6xRQvrkdlt24KSshFEoXwrwZ/UHSy+YKlBQkPjyifqa/1F8U0asiDjbBIhpC2HEBjwGg0/Z+s+sCIQqtNg8fYA6EmV8NAjV5j1Esd6FXaXSa0B3NUz04jb2RI5Ap4Men9l5LJUvThLP8vk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436185; c=relaxed/simple; bh=dmpWFuyAx+gsTT7L3u3cj69dQ6Lg3CdeyHA9Hmtkz/E=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=BbyCklgAbMIive9cp59AHrzmZZSKj3IREwfEZQaa+0NIOscup6pay/0Lp863lxOatvJQ+dA4WT+iiOL1jUGzRaup/KpWnBAziFZUrIuxhyb63dkZKKfVpLbkG+mSTetGv+t/hMO2OW29f2N4arEMRsxaZR630cd0s7P4PLD7s4c= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id DAA40300089; Mon, 16 Oct 2023 06:03:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697436182; bh=9z1V41i/Jx9TVyoar9DVw4+oZLv9Hs+Rs+W82JU0zmY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=DU83PyyIDwVOmV9ux0KukzR7Xx3HUbAzvOJCPdsKisTC2CJ560ykXT5D1xyBW+m38 czkhp+CY7j5xYxPKZ0HcdBfiLlo5Ix5BPMhWnRgiZ9DtVS7ux5JGNAq9ZQXx1IDG1p +Eq0m+MIH8fqwwCphAOWZ2jt3KiLVlfQqA/5Ygww= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH 1/2] RISC-V: Reject invalid relocation types Date: Mon, 16 Oct 2023 06:02:36 +0000 Message-ID: <208922596bc01f3be066b8e5bd388690b9d5c643.1697436144.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org From: Tsukasa OI In RISC-V BFD, there are several internal-only relocation types. Such relocation fed from the outside can be a cause of unexpected behaviors and should be rejected before being parsed further. This commit adds checks to make sure that we only handle known relocation types. For maintainability, internal-only relocation types are listed separately. Changes to riscv_elf_check_relocs applies to the linker (ld) and changes to riscv_info_to_howto_rela and riscv_elf_rtype_to_howto applies to other tools such like objdump and objcopy. bfd/ChangeLog: * elfnn-riscv.c (riscv_reloc_is_internal_use_only): New to detect internal use only relocation type. (riscv_info_to_howto_rela): Reject invalid relocation types while handling ELF files but linking. (riscv_elf_check_relocs): Reject invalid relocation types while linking. * elfxx-riscv.c (riscv_elf_rtype_to_howto): Also reject types without name meaning unknown relocation type. --- bfd/elfnn-riscv.c | 77 +++++++++++++++++++++++++++++++++++++++++++++-- bfd/elfxx-riscv.c | 2 +- 2 files changed, 76 insertions(+), 3 deletions(-) diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index 09aa7be225ef..dedfabe131ba 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -262,12 +262,37 @@ riscv_elfNN_set_options (struct bfd_link_info *link_info, riscv_elf_hash_table (link_info)->params = params; } +static bool +riscv_reloc_is_internal_use_only (unsigned int r_type) +{ + switch (r_type) + { + case R_RISCV_RVC_LUI: + case R_RISCV_GPREL_I: + case R_RISCV_GPREL_S: + case R_RISCV_TPREL_I: + case R_RISCV_TPREL_S: + case R_RISCV_DELETE: + return true; + default: + return false; + } +} + static bool riscv_info_to_howto_rela (bfd *abfd, arelent *cache_ptr, Elf_Internal_Rela *dst) { - cache_ptr->howto = riscv_elf_rtype_to_howto (abfd, ELFNN_R_TYPE (dst->r_info)); + unsigned int r_type = ELFNN_R_TYPE (dst->r_info); + cache_ptr->howto = riscv_elf_rtype_to_howto (abfd, r_type); + if (cache_ptr->howto && riscv_reloc_is_internal_use_only (r_type)) + { + (*_bfd_error_handler) (_("%pB: unsupported relocation type %#x"), + abfd, r_type); + bfd_set_error (bfd_error_bad_value); + cache_ptr->howto = NULL; + } return cache_ptr->howto != NULL; } @@ -834,8 +859,53 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, h->ref_regular = 1; } + /* Explicitly reject internal use only relocation types. */ + if (riscv_reloc_is_internal_use_only (r_type)) + { + _bfd_error_handler + (_("%pB: internal error: unsupported relocation type %#x"), + abfd, r_type); + return false; + } + switch (r_type) { + case R_RISCV_NONE: + case R_RISCV_TLS_DTPMOD32: + case R_RISCV_TLS_DTPMOD64: + case R_RISCV_TLS_DTPREL32: + case R_RISCV_TLS_DTPREL64: + case R_RISCV_TLS_TPREL32: + case R_RISCV_TLS_TPREL64: + case R_RISCV_PCREL_LO12_I: + case R_RISCV_PCREL_LO12_S: + case R_RISCV_LO12_I: + case R_RISCV_LO12_S: + case R_RISCV_TPREL_LO12_I: + case R_RISCV_TPREL_LO12_S: + case R_RISCV_TPREL_ADD: + case R_RISCV_ADD8: + case R_RISCV_ADD16: + case R_RISCV_ADD32: + case R_RISCV_ADD64: + case R_RISCV_SUB8: + case R_RISCV_SUB16: + case R_RISCV_SUB32: + case R_RISCV_SUB64: + case R_RISCV_ALIGN: + case R_RISCV_RELAX: + case R_RISCV_SUB6: + case R_RISCV_SET6: + case R_RISCV_SET8: + case R_RISCV_SET16: + case R_RISCV_SET32: + case R_RISCV_32_PCREL: + case R_RISCV_IRELATIVE: + case R_RISCV_SET_ULEB128: + case R_RISCV_SUB_ULEB128: + /* Known relocation types without additional checks here. */ + break; + case R_RISCV_TLS_GD_HI20: if (!riscv_elf_record_got_reference (abfd, info, h, r_symndx) || !riscv_elf_record_tls_type (abfd, h, r_symndx, GOT_TLS_GD)) @@ -1064,7 +1134,10 @@ riscv_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, break; default: - break; + _bfd_error_handler + (_("%pB: internal error: unsupported relocation type %#x"), + abfd, r_type); + return false; } } diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index c070394a3667..ffcdae341b2f 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -975,7 +975,7 @@ riscv_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name) reloc_howto_type * riscv_elf_rtype_to_howto (bfd *abfd, unsigned int r_type) { - if (r_type >= ARRAY_SIZE (howto_table)) + if (r_type >= ARRAY_SIZE (howto_table) || !howto_table[r_type].name) { (*_bfd_error_handler) (_("%pB: unsupported relocation type %#x"), abfd, r_type); From patchwork Mon Oct 16 06:02:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 77864 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C90483858D32 for ; Mon, 16 Oct 2023 06:03:33 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 5ED0B385841D for ; Mon, 16 Oct 2023 06:03:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5ED0B385841D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5ED0B385841D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2401:2500:203:30b:4000:6bfe:4757:0 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436197; cv=none; b=WvTcu7yauE6PB5rUkvpVPMkQUHBSFHhdSESxmmZJedP8szn7SmWYwEfM4d6jfBDTfnxbDx76E6hddakzkviHsp6OcCpft7e+bGk2fVwIosCEcBPbpM3HWFs6sbUfDqLSwYeDYi/KmaL6nL4j83h3/Aj8BiS+TEmQC7E/ugyz2gI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436197; c=relaxed/simple; bh=P/kmpp7YIb5lPe0mKqxJR7LgjM3ooxx2lJi7NNCGWv8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=e3Ife+AHWNF3cyfo9NCqw74XpCAzdMiS/EA0uxfVNvOdk2TRQSL3tg+8hW8vxMNMF3+Ndsqky+ifrxO1z3hJSYDLMUR7AYn/L6wG+XH6ySJdd0D3GBUT9znghT+ouhvw0xnsaWBy3/gq9Y6Kfw0Hq5xlFCSKO82xj855yS6Dems= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A7735300089; Mon, 16 Oct 2023 06:03:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697436192; bh=1JjoaVuOLAvfkKqCy7UJGk5aNGt3SezS5AB1KexbgXk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=Wet56hmZ4yuCr3I4WiGRfFaBG5OFz9RZpSKDOqls9XojqKQrPLi7LIh9AjM7o4rk7 x4/cWQ9yYw3UTnZJ/LqFGwwINrP9em+QTa53s4aYQFhnLYObergSDzHw6S3A6gVtpX jcAVU+EsdklasqeVMqvUOiw94gPL+uhssmFeyptA= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH 2/2] RISC-V: Renumber internal-only [GT]PREL_[IS] reloc Date: Mon, 16 Oct 2023 06:02:37 +0000 Message-ID: <24acc029d54e6dc15ee302976be857d8b94d5170.1697436144.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patchwork=sourceware.org@sourceware.org From: Tsukasa OI After ratification of the RISC-V psABI specification (version 1.0), it is getting enhanced and improved. Some commits include new relocation types: [1] [2] The latest draft of the RISC-V psABI specification started to use relocation types 47-49 [2] but some of them conflict with Binutils' internal-only relocation types: | N | psABI type (draft) | Binutils type | | -- | ------------------- | --------------- | | 47 | GPREL_LO12_I | R_RISCV_GPREL_I | | 48 | GPREL_LO12_S | R_RISCV_GPREL_S | | 49 | GPREL_HI20 | R_RISCV_TPREL_I | | 50 | (reserved) | R_RISCV_TPREL_S | Note that R_RISCV_GPREL_[IS] cannot be used for GPREL_LO12_[IS] because GPREL_LO12_[IS] do not allow rewrite to rd and internal R_RISCV_GPREL_[IS] are for single instruction sequence only (that's why we have both internal TPREL_[IS] and external TPREL_LO12_[IS]). We have to move at least 47-49 but for locality, we move R_RISCV_GPREL_[IS] from 47-48 to 41-42 and R_RISCV_TPREL_[IS] from 49-50 to 66-67 (note that 62-65 are reserved for other relocation types in the latest draft of RISC-V psABI [1]). It also notes all reserved relocation types as defined in the latest draft of RISC-V psABI. bfd/ChangeLog: * elfxx-riscv.c (howto_table): Reserve all defined relocation types as defined in the latest draft of RISC-V psABI. Move R_RISCV_[GT]PREL_[IS] to the empty spaces. include/ChangeLog: * elf/riscv.h (elf_riscv_reloc_type): Renumber R_RISCV_[GT]PREL_[IS] from 47-50 to 41, 42, 66 and 67. Comment all defined relocation types as defined in the latest draft of RISC-V psABI. --- bfd/elfxx-riscv.c | 138 +++++++++++++++++++++++++------------------- include/elf/riscv.h | 15 +++-- 2 files changed, 90 insertions(+), 63 deletions(-) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index ffcdae341b2f..18fc638d05cb 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -601,9 +601,35 @@ static reloc_howto_type howto_table[] = MINUS_ONE, /* dst_mask */ false), /* pcrel_offset */ - /* 41 and 42 are reserved. */ - EMPTY_HOWTO (0), - EMPTY_HOWTO (0), + /* GP-relative load. */ + HOWTO (R_RISCV_GPREL_I, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_GPREL_I", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_ITYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ + + /* GP-relative store. */ + HOWTO (R_RISCV_GPREL_S, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_GPREL_S", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_STYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ /* Indicates an alignment statement. The addend field encodes how many bytes of NOPs follow the statement. The desired alignment is the @@ -667,65 +693,17 @@ static reloc_howto_type howto_table[] = ENCODE_CITYPE_IMM (-1U), /* dst_mask */ false), /* pcrel_offset */ - /* GP-relative load. */ - HOWTO (R_RISCV_GPREL_I, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_dont, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_GPREL_I", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_ITYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_LO12_I. */ + EMPTY_HOWTO (47), - /* GP-relative store. */ - HOWTO (R_RISCV_GPREL_S, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_dont, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_GPREL_S", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_STYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_LO12_S. */ + EMPTY_HOWTO (48), - /* TP-relative TLS LE load. */ - HOWTO (R_RISCV_TPREL_I, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_TPREL_I", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_ITYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_HI20. */ + EMPTY_HOWTO (49), - /* TP-relative TLS LE store. */ - HOWTO (R_RISCV_TPREL_S, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_TPREL_S", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_STYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* 50 is reserved. */ + EMPTY_HOWTO (50), /* The paired relocation may be relaxed. */ HOWTO (R_RISCV_RELAX, /* type */ @@ -879,6 +857,48 @@ static reloc_howto_type howto_table[] = 0, /* src_mask */ 0, /* dst_mask */ false), /* pcrel_offset */ + + /* Reserved for R_RISCV_TLSDESC_HI20. */ + EMPTY_HOWTO (62), + + /* Reserved for R_RISCV_TLSDESC_LOAD_LO12. */ + EMPTY_HOWTO (63), + + /* Reserved for R_RISCV_TLSDESC_ADD_LO12. */ + EMPTY_HOWTO (64), + + /* Reserved for R_RISCV_TLSDESC_CALL. */ + EMPTY_HOWTO (65), + + /* TP-relative TLS LE load. */ + HOWTO (R_RISCV_TPREL_I, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_TPREL_I", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_ITYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ + + /* TP-relative TLS LE store. */ + HOWTO (R_RISCV_TPREL_S, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_TPREL_S", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_STYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ }; /* A mapping from BFD reloc types to RISC-V ELF reloc types. */ diff --git a/include/elf/riscv.h b/include/elf/riscv.h index 0aa8b3359c4c..6ae31f6a969a 100644 --- a/include/elf/riscv.h +++ b/include/elf/riscv.h @@ -71,14 +71,15 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type) RELOC_NUMBER (R_RISCV_SUB16, 38) RELOC_NUMBER (R_RISCV_SUB32, 39) RELOC_NUMBER (R_RISCV_SUB64, 40) + RELOC_NUMBER (R_RISCV_GPREL_I, 41) + RELOC_NUMBER (R_RISCV_GPREL_S, 42) RELOC_NUMBER (R_RISCV_ALIGN, 43) RELOC_NUMBER (R_RISCV_RVC_BRANCH, 44) RELOC_NUMBER (R_RISCV_RVC_JUMP, 45) RELOC_NUMBER (R_RISCV_RVC_LUI, 46) - RELOC_NUMBER (R_RISCV_GPREL_I, 47) - RELOC_NUMBER (R_RISCV_GPREL_S, 48) - RELOC_NUMBER (R_RISCV_TPREL_I, 49) - RELOC_NUMBER (R_RISCV_TPREL_S, 50) + /* Reserved 47 for R_RISCV_GPREL_LO12_I. */ + /* Reserved 48 for R_RISCV_GPREL_LO12_S. */ + /* Reserved 49 for R_RISCV_GPREL_HI20. */ RELOC_NUMBER (R_RISCV_RELAX, 51) RELOC_NUMBER (R_RISCV_SUB6, 52) RELOC_NUMBER (R_RISCV_SET6, 53) @@ -90,6 +91,12 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type) /* Reserved 59 for R_RISCV_PLT32. */ RELOC_NUMBER (R_RISCV_SET_ULEB128, 60) RELOC_NUMBER (R_RISCV_SUB_ULEB128, 61) + /* Reserved 62 for R_RISCV_TLSDESC_HI20. */ + /* Reserved 63 for R_RISCV_TLSDESC_LOAD_LO12. */ + /* Reserved 64 for R_RISCV_TLSDESC_ADD_LO12. */ + /* Reserved 65 for R_RISCV_TLSDESC_CALL. */ + RELOC_NUMBER (R_RISCV_TPREL_I, 66) + RELOC_NUMBER (R_RISCV_TPREL_S, 67) END_RELOC_NUMBERS (R_RISCV_max) /* Processor specific flags for the ELF header e_flags field. */