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([177.194.59.218]) by smtp.gmail.com with ESMTPSA id ev20sm5190117pjb.43.2021.07.15.04.58.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jul 2021 04:58:08 -0700 (PDT) To: libc-alpha@sourceware.org Subject: [PATCH] elf: Fix tst-cpu-features-cpuinfo on some ADM systems (BZ #28090) Date: Thu, 15 Jul 2021 08:58:04 -0300 Message-Id: <20210715115804.4192826-1-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Adhemerval Zanella via Libc-alpha From: Adhemerval Zanella Reply-To: Adhemerval Zanella Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" The SSBD feature is implemented in 2 different ways on AMD processors: newer systems (Zen3) provides AMD_SSBD (function 8000_0008, EBX[24]), while older system provides AMD_VIRT_SSBD (function 8000_0008, EBX[25]). However for AMD_VIRT_SSBD, kernel shows both 'ssdb' and 'virt_ssdb' on /proc/cpuinfo; while for AMD_SSBD only 'ssdb' is provided. This now check is AMD_SSBD is set to check for 'ssbd', otherwise check if AMD_VIRT_SSDB is set to check for 'virt_ssdb'. Checked on x86_64-linux-gnu on a Ryzen 9 5900x. Reviewed-by: H.J. Lu --- sysdeps/x86/bits/platform/x86.h | 1 + sysdeps/x86/include/cpu-features.h | 3 +++ sysdeps/x86/tst-cpu-features-cpuinfo.c | 13 ++++++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index 5509b1ad87..2b257606b2 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -282,6 +282,7 @@ enum x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14, x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15, x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24, + x86_cpu_AMD_VIRT_SSBD = x86_cpu_index_80000008_ebx + 25, x86_cpu_index_7_ecx_1_eax = (CPUID_INDEX_7_ECX_1 * 8 * 4 * sizeof (unsigned int) diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 59e01df543..a3f11baa7a 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -293,6 +293,7 @@ enum #define bit_cpu_AMD_IBRS (1u << 14) #define bit_cpu_AMD_STIBP (1u << 15) #define bit_cpu_AMD_SSBD (1u << 24) +#define bit_cpu_AMD_VIRT_SSBD (1u << 25) /* CPUID_INDEX_7_ECX_1. */ @@ -527,6 +528,7 @@ enum #define index_cpu_AMD_IBRS CPUID_INDEX_80000008 #define index_cpu_AMD_STIBP CPUID_INDEX_80000008 #define index_cpu_AMD_SSBD CPUID_INDEX_80000008 +#define index_cpu_AMD_VIRT_SSBD CPUID_INDEX_80000008 /* CPUID_INDEX_7_ECX_1. */ @@ -761,6 +763,7 @@ enum #define reg_AMD_IBRS ebx #define reg_AMD_STIBP ebx #define reg_AMD_SSBD ebx +#define reg_AMD_VIRT_SSBD ebx /* CPUID_INDEX_7_ECX_1. */ diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c index f457e8677b..9d4ae65e26 100644 --- a/sysdeps/x86/tst-cpu-features-cpuinfo.c +++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c @@ -236,7 +236,18 @@ do_test (int argc, char **argv) if (cpu_features->basic.kind == arch_kind_intel) fails += CHECK_PROC (ssbd, SSBD); else if (cpu_features->basic.kind == arch_kind_amd) - fails += CHECK_PROC (ssbd, AMD_SSBD); + { + /* This feature is implemented in 2 different ways on AMD processors: + newer systems provides AMD_SSBD (function 8000_0008, EBX[24]), + while older system proviseds AMD_VIRT_SSBD (function 8000_008, + EBX[25]). However for AMD_VIRT_SSBD, kernel shows both 'ssdb' + and 'virt_ssdb' on /proc/cpuinfo; while for AMD_SSBD only 'ssdb' + is provided. */ + if (HAS_CPU_FEATURE (AMD_SSBD)) + fails += CHECK_PROC (ssbd, AMD_SSBD); + else if (HAS_CPU_FEATURE (AMD_VIRT_SSBD)) + fails += CHECK_PROC (virt_ssbd, AMD_VIRT_SSBD); + } fails += CHECK_PROC (sse, SSE); fails += CHECK_PROC (sse2, SSE2); fails += CHECK_PROC (pni, SSE3);