From patchwork Thu Jun 1 07:48:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 70435 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D9866385770F for ; Thu, 1 Jun 2023 07:51:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D9866385770F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685605890; bh=oe4FNGt4TAqElXlGrrNk69vr/yfiPuEFK+A1uT2oLtg=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=IVsEjUXZJndKjpUZPJGzRcTF7ZCVn8j3erqLd/Hvtz8Ntvg9uhBhMCYHBgBHQbRZP elgNwFWW/qwfmqGnZj7eQWbWC9OMQFzDYw5m63tiD2AKhAyz0dkR8OwN3CvcQj9/d2 HEcawp+6qURvet65YLebx2uNdasgNhGmLh0GEgGQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id DD3E43858C30 for ; Thu, 1 Jun 2023 07:50:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DD3E43858C30 X-IronPort-AV: E=McAfee;i="6600,9927,10727"; a="354336140" X-IronPort-AV: E=Sophos;i="6.00,209,1681196400"; d="scan'208";a="354336140" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jun 2023 00:50:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10727"; a="831484960" X-IronPort-AV: E=Sophos;i="6.00,209,1681196400"; d="scan'208";a="831484960" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga004.jf.intel.com with ESMTP; 01 Jun 2023 00:50:56 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id DE8AC100518C; Thu, 1 Jun 2023 15:50:55 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH] Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range. Date: Thu, 1 Jun 2023 15:48:55 +0800 Message-Id: <20230601074855.319313-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.39.1.388.g2fc9e9ca3c MIME-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" For the testcase in the PR, we have br64 = br; br64 = ((br64 << 16) & 0x000000ff00000000ull) | (br64 & 0x0000ff00ull); n->n: 0x3000000200. n->range: 32. n->type: uint64. The original code assumes n->range is same as TYPE PRECISION(n->type), and tries to rotate the mask from 0x300000200 -> 0x20300 which is incorrect. The patch fixed this bug by not trying bswap + rotate when TYPE_PRECISION(n->type) is not equal to n->range. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR tree-optimization/110067 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range. gcc/testsuite/ChangeLog: * gcc.target/i386/pr110067.c: New test. --- gcc/gimple-ssa-store-merging.cc | 3 + gcc/testsuite/gcc.target/i386/pr110067.c | 77 ++++++++++++++++++++++++ 2 files changed, 80 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr110067.c diff --git a/gcc/gimple-ssa-store-merging.cc b/gcc/gimple-ssa-store-merging.cc index 9cb574fa315..401496a9231 100644 --- a/gcc/gimple-ssa-store-merging.cc +++ b/gcc/gimple-ssa-store-merging.cc @@ -1029,6 +1029,9 @@ find_bswap_or_nop (gimple *stmt, struct symbolic_number *n, bool *bswap, /* TODO, handle cast64_to_32 and big/litte_endian memory source when rsize < range. */ if (n->range == orig_range + /* There're case like 0x300000200 for uint32->uint64 cast, + Don't hanlde this. */ + && n->range == TYPE_PRECISION (n->type) && ((orig_range == 32 && optab_handler (rotl_optab, SImode) != CODE_FOR_nothing) || (orig_range == 64 diff --git a/gcc/testsuite/gcc.target/i386/pr110067.c b/gcc/testsuite/gcc.target/i386/pr110067.c new file mode 100644 index 00000000000..c4208811628 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr110067.c @@ -0,0 +1,77 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-strict-aliasing" } */ + +#include +#define force_inline __inline__ __attribute__ ((__always_inline__)) + +__attribute__((noipa)) +static void +fetch_pixel_no_alpha_32_bug (void *out) +{ + uint32_t *ret = out; + *ret = 0xff499baf; +} + +static force_inline uint32_t +bilinear_interpolation_local (uint32_t tl, uint32_t tr, + uint32_t bl, uint32_t br, + int distx, int disty) +{ + uint64_t distxy, distxiy, distixy, distixiy; + uint64_t tl64, tr64, bl64, br64; + uint64_t f, r; + + distx <<= 1; + disty <<= 1; + + distxy = distx * disty; + distxiy = distx * (256 - disty); + distixy = (256 - distx) * disty; + distixiy = (256 - distx) * (256 - disty); + + /* Alpha and Blue */ + tl64 = tl & 0xff0000ff; + tr64 = tr & 0xff0000ff; + bl64 = bl & 0xff0000ff; + br64 = br & 0xff0000ff; + + f = tl64 * distixiy + tr64 * distxiy + bl64 * distixy + br64 * distxy; + r = f & 0x0000ff0000ff0000ull; + + /* Red and Green */ + tl64 = tl; + tl64 = ((tl64 << 16) & 0x000000ff00000000ull) | (tl64 & 0x0000ff00ull); + + tr64 = tr; + tr64 = ((tr64 << 16) & 0x000000ff00000000ull) | (tr64 & 0x0000ff00ull); + + bl64 = bl; + bl64 = ((bl64 << 16) & 0x000000ff00000000ull) | (bl64 & 0x0000ff00ull); + + br64 = br; + br64 = ((br64 << 16) & 0x000000ff00000000ull) | (br64 & 0x0000ff00ull); + + f = tl64 * distixiy + tr64 * distxiy + bl64 * distixy + br64 * distxy; + r |= ((f >> 16) & 0x000000ff00000000ull) | (f & 0xff000000ull); + + return (uint32_t)(r >> 16); +} + +__attribute__((noipa)) +static void +bits_image_fetch_pixel_bilinear_32_bug (void *out) +{ + uint32_t br; + uint32_t *ret = out; + + fetch_pixel_no_alpha_32_bug (&br); + *ret = bilinear_interpolation_local (0, 0, 0, br, 0x41, 0x42); +} + +int main() { + uint32_t r; + bits_image_fetch_pixel_bilinear_32_bug (&r); + if (r != 0x4213282d) + __builtin_abort (); + return 0; +}