From patchwork Thu May 25 15:11:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 70084 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EB302385773C for ; Thu, 25 May 2023 15:13:58 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EB302385773C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685027639; bh=/Iv4AzZyYvwEzEw8p6QiS/rz5ZXOgihZY4OqbJI9U8A=; h=Date:Subject:To:Cc:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=RXUbD8ksns9dgfYShBanpFYER0RrXQqfpCgW7cGSKU7/Slcl2HyiNjzyyZHw5hc8c BJbckWVo51jahNEP6+aEtsoPb2Q/nw6peRubv/8eQ5wHg+ubnc8AUfZqWd75hg6VTV kJLhKufv0XccALNJ1f0BLI7lZHSNcxcQaYBfdTmU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from omggw7014.mail.djm.ynwl.yahoo.co.jp (omggw7014.mail.djm.yahoo.co.jp [183.79.54.23]) by sourceware.org (Postfix) with ESMTPS id BBD2C3858D3C for ; Thu, 25 May 2023 15:13:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BBD2C3858D3C X-YMail-OSG: fQK3lF0VM1m5GJBpDTf2HvRrSiGyeO2IE_oQwywOC24u7L3NOsLRPgNV5c.xRjp .TZ_4c45pjh_jp_rbZZB8TfnmlXjqPkn8rOWp2ImRockpTFyCERYpFo_AoCIxXw2A4kyaGwzWxZV CKnhlyittttJNJNE_gQ2i.W3NeI2LhXY04j56DQr9th6Ntr1HltjHY1Muj6G7WMBaC0ZRjwdtWOl jmS2UERn4dFFES2i4OY_JH7gaOTJjn1frt24T0KSZMrqFSiTVvi4WYBKScwl3d9yfke.8sLZ5twu Lm0f1UKIbYv2utkhQ8deCLIANj4cFF1fETke8lH572YfNFR8KkxERy8vcRtlRtOLZ91tGfNw5..d yGau4r4Xre3ivnu0aQOfcvqO86npBuvE4Bcp22vNk35qQ0UUuiEEIxA688SsABN4xKBUxceQksL9 GdDab2IK0QWZw2kMvkn19J51NtZfy8pELXwEvqXlrQnbBW0BI029mzgK4tjjGlOOyl1BEuW2uIUl g_qIF9Ddof2w5csFdMXg1qxAxWzzfWj._4JT1FEoYQXc0wLn4u3Bch.6bWIFeljkOxeyDlmxfoGv 6a8wkaL.xvODq9qsFJbFcQlkoJFtTaLklZaB1sz9KwLN6zt3ty0zKQ960zANTlVk9g7oMeZb55kY iW45lpH8E6oUA8k0jKFxCXnDivlvZhXJDXOAX1UNaae50BRHv1QeAZj7r9ntM5kLwoTSRR037uXh bprSqrgZ6vmIIXudIwUHKCmPlI0QUkrToOs_QtCUm1Oi.32wnqN4QzUOkPI8r5om2Q6W7Se9e3mM 7e3O8rC0aBkxN.nIZvhcok7BPyoExRL2D8GUfS6u2TyZomNzidzAQwztwHXhBHErsI3oG5WmDDF1 fDaI5qLfaBR8TSHFJd668K2FqqtJcXcuJ8tplDVA1OuZl4Niup8onyQS3UMceAJyeHkaMiC7GjFC 02_TeVGBZo7bnehMPJmMsxxfnUJjHKveNnKA3VxaWPE0IHWM01_Lx0Vi02QnQSinJ00I- Received: from sonicgw.mail.yahoo.co.jp by sonicconh5002.mail.kks.yahoo.co.jp with HTTP; Thu, 25 May 2023 15:13:18 +0000 Received: by smtphe5010.mail.kks.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID 917da246ad93fd7115cd3262455da9f7; Fri, 26 May 2023 00:13:15 +0900 (JST) Message-ID: <396fafb2-efbc-ebb8-2047-8ddac66b0926@yahoo.co.jp> Date: Fri, 26 May 2023 00:11:50 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: [PATCH 1/3] xtensa: Addendum of the commit e33d2dcb463161a110ac345a451132ce8b2b23d9 To: GCC Patches Cc: Max Filippov References: <396fafb2-efbc-ebb8-2047-8ddac66b0926.ref@yahoo.co.jp> X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3): Retract excessive line folding, and correct the value of the "length" insn attribute related to TARGET_DENSITY. (*extzvsi-1bit_addsubx): Ditto. --- gcc/config/xtensa/xtensa.md | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 6c1d8ee8f81..11258125165 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1009,8 +1009,7 @@ (ashift:SI (match_dup 0) (match_dup 3)))] { - int pos = INTVAL (operands[2]), - shift = floor_log2 (INTVAL (operands[3])); + int pos = INTVAL (operands[2]), shift = floor_log2 (INTVAL (operands[3])); switch (GET_CODE (operands[4])) { case ASHIFT: @@ -1029,7 +1028,10 @@ } [(set_attr "type" "arith") (set_attr "mode" "SI") - (set_attr "length" "6")]) + (set (attr "length") + (if_then_else (match_test "TARGET_DENSITY && INTVAL (operands[3]) == 2") + (const_int 5) + (const_int 6)))]) (define_insn_and_split "*extzvsi-1bit_addsubx" [(set (match_operand:SI 0 "register_operand" "=a") @@ -1053,8 +1055,7 @@ (match_dup 4)) (match_dup 2)]))] { - int pos = INTVAL (operands[3]), - shift = floor_log2 (INTVAL (operands[4])); + int pos = INTVAL (operands[3]), shift = floor_log2 (INTVAL (operands[4])); switch (GET_CODE (operands[6])) { case ASHIFT: From patchwork Thu May 25 15:07:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 70083 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 590113857359 for ; Thu, 25 May 2023 15:13:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 590113857359 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685027629; bh=jdNCk7sTcVMXYZLTGJeMfXIrXucN7h43aursPRqHxgw=; h=Date:To:Cc:Subject:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=FEv6Gyu9tdm6S6oExq73u47AU9LcKnV/M5WJJao9onIKiaCw8diZR1OQ3G5rv2XHU wZjr59t+N+MeCyTyl12B53RFHhBYDAFm8hUQWe5cWWn/3ueoi9ph1scdKrEamGPFg5 O2XxpOF2LU2im8X7KKFzcR30+jULht6z5cNccoaQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from omggw0014.mail.otm.ynwl.yahoo.co.jp (omggw0014.mail.otm.yahoo.co.jp [182.22.18.41]) by sourceware.org (Postfix) with ESMTPS id 50D353858D32 for ; Thu, 25 May 2023 15:13:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 50D353858D32 X-YMail-OSG: uqLEMAsVM1mjyUrRngRehv2jK.kpbb6eJb_qQVOUN394.6u6mvWKjrPcRfmqB3E dPpFJ7kcht2p8qonBwNE7cGaR8ED1_yNTe4.2ywlg25HJENc.3ByRLfUaVg7BjsjIxs90cbg1wA5 Fq3f14CU1mmU9zqOfOK2dpSwLPrB3DpcNLyqAnA.rXqRUtV9QrHjFdgo1iQQhHNtPBWkVL2qdowc xuaVi12HKRHXm92P42jIAjB9KOn_OirK6LG9_OFegxDYO3RuAVHXatVKY6zMYC5UuOPq_6NcUqbf 5XYhtu7fWZY.nJtwMntgKNu4YcMuq3rrIoP2wnrAzZp2HsiocSfco9ONIqU9Qx.Yw2bMVrW04_Hn MbnXpYVFW2rkvujcdZJyPs5NdmLk8tGda4Cijl.paQbKdKFb0hUE2DF09G3sXvWV4FUdeZampg1n JpTPUQlgHP9r1P3dkglCSN0q_4fTbQiImK2fcpzwynm.6Jju978yPFOY7EVM8LkGH_yxDueghXjw 3z8kKrqPGjP6P3iq4iEAeawVXCHZAVFkBeXqjagbcMbh6dsT.QQ3KxkeAnp.F5RBaDGZ_baUlF_g _bVjUSsNAZrawBqPoR_9Q6OUXlkpLN4CNAkuj.S0DTg72TfgfnKy21h5j86DgQ0krRgKFNCa43En B59UCcWwwRVX8nyhY4GqI6QLVKBqYHNyyiMs3g2aKDYt0tAdDTjmE932cTAxl40zJItJ6gij8Yyn t9FhOJ.yhJBQ_5lOA21zLjuhCkUEuPlNPVShHMUBPkFe8PHeuVQszhb5pDwj57_klKAULcczWmwG MN04czfHVEY1L57DYrjI0vbB5Moc9y84c5_9tfjZYncJecuKNhtBB.CsvH7kRgspgq5w9v6WOpOd TCWISEDLMezsvx8YclpnxNp9H4LKdTSqo1nGuXef22whCYDHmqTk7jPTqwaxskjSFYR7I7qMwQDT CIQyiNorWhI6f3UQZN1Abdochwa6F1vAGyz_buxFw6ZpYEhhNB0o6D7_4gYT.rRpjmKk- Received: from sonicgw.mail.yahoo.co.jp by sonicconh6002.mail.ssk.yahoo.co.jp with HTTP; Thu, 25 May 2023 15:13:14 +0000 Received: by smtphe5002.mail.kks.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID 5d611b3bb3b37ee2d83141a245b2c6c1; Fri, 26 May 2023 00:13:11 +0900 (JST) Message-ID: Date: Fri, 26 May 2023 00:07:49 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 To: GCC Patches Cc: Max Filippov Subject: [PATCH 2/3] xtensa: Add 'subtraction from constant' insn pattern References: X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch makes try to eliminate using temporary pseudo for '(minus:SI (const_int) (reg:SI))' if the addition of negative constant value can be emitted in a single machine instruction. /* example */ int test0(int x) { return 1 - x; } int test1(int x) { return 100 - x; } int test2(int x) { return 25600 - x; } ;; before test0: movi.n a9, 1 sub a2, a9, a2 ret.n test1: movi a9, 0x64 sub a2, a9, a2 ret.n test2: movi.n a9, 0x19 slli a9, a9, 10 sub a2, a9, a2 ret.n ;; after test0: addi.n a2, a2, -1 neg a2, a2 ret.n test1: addi a2, a2, -100 neg a2, a2 ret.n test2: addmi a2, a2, -0x6400 neg a2, a2 ret.n gcc/ChangeLog: * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15): New prototype. * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15): New function. * config/xtensa/constraints.md (O): Change to use the above function. * config/xtensa/xtensa.md (*subsi3_from_const): New insn_and_split pattern. --- gcc/config/xtensa/constraints.md | 2 +- gcc/config/xtensa/xtensa-protos.h | 1 + gcc/config/xtensa/xtensa.cc | 7 +++++++ gcc/config/xtensa/xtensa.md | 24 ++++++++++++++++++++++++ 4 files changed, 33 insertions(+), 1 deletion(-) diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md index 53e4d0d8dd1..5cade1db8ff 100644 --- a/gcc/config/xtensa/constraints.md +++ b/gcc/config/xtensa/constraints.md @@ -108,7 +108,7 @@ (define_constraint "O" "An integer constant that can be used in ADDI.N instructions." (and (match_code "const_int") - (match_test "ival == -1 || IN_RANGE (ival, 1, 15)"))) + (match_test "xtensa_m1_or_1_thru_15 (ival)"))) (define_constraint "P" "An integer constant that can be used as a mask value in an EXTUI diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index 64cbf27c248..ec715b44e4d 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -27,6 +27,7 @@ extern bool xtensa_simm8x256 (HOST_WIDE_INT); extern bool xtensa_simm12b (HOST_WIDE_INT); extern bool xtensa_b4const_or_zero (HOST_WIDE_INT); extern bool xtensa_b4constu (HOST_WIDE_INT); +extern bool xtensa_m1_or_1_thru_15 (HOST_WIDE_INT); extern bool xtensa_mask_immediate (HOST_WIDE_INT); extern bool xtensa_mem_offset (unsigned, machine_mode); diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index e3af78cd228..46ab9f36b56 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -471,6 +471,13 @@ xtensa_b4constu (HOST_WIDE_INT v) } +bool +xtensa_m1_or_1_thru_15 (HOST_WIDE_INT v) +{ + return v == -1 || IN_RANGE (v, 1, 15); +} + + bool xtensa_mask_immediate (HOST_WIDE_INT v) { diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 11258125165..113b313026e 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -216,6 +216,30 @@ (set_attr "mode" "SI") (set_attr "length" "3")]) +(define_insn_and_split "*subsi3_from_const" + [(set (match_operand:SI 0 "register_operand" "=a") + (minus:SI (match_operand:SI 1 "const_int_operand" "i") + (match_operand:SI 2 "register_operand" "r")))] + "xtensa_simm8 (-INTVAL (operands[1])) + || xtensa_simm8x256 (-INTVAL (operands[1]))" + "#" + "&& 1" + [(set (match_dup 0) + (plus:SI (match_dup 2) + (match_dup 1))) + (set (match_dup 0) + (neg:SI (match_dup 0)))] +{ + operands[1] = GEN_INT (-INTVAL (operands[1])); +} + [(set_attr "type" "arith") + (set_attr "mode" "SI") + (set (attr "length") + (if_then_else (match_test "TARGET_DENSITY + && xtensa_m1_or_1_thru_15 (-INTVAL (operands[1]))") + (const_int 5) + (const_int 6)))]) + (define_insn "subsf3" [(set (match_operand:SF 0 "register_operand" "=f") (minus:SF (match_operand:SF 1 "register_operand" "f") From patchwork Thu May 25 15:08:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 70085 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1E21F3856DCD for ; Thu, 25 May 2023 15:14:49 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1E21F3856DCD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685027689; bh=oedHALmQQYCj84+RpFrDvPMEh3oVj84FaLD/5sKse2A=; h=Date:To:Cc:Subject:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=PynyE0/RobSDMQkwL8haRWi2SGGhdmL3yEQxJkgaFxa3Iu7ALaIlM0JqXs42T4QZw dWiV0A/atuzqOjFyNc9TsHHja/lG/WkH4dEVqHep60Mu0z5PCrxUd4aOmQCcHWrDfK BYOIXyZuGGH1l8NWA58W1YqiutWbQ3x7+TvGN7FM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from omggw7022-vm0.mail.djm.yahoo.co.jp (omggw7022-vm0.mail.djm.yahoo.co.jp [183.79.55.71]) by sourceware.org (Postfix) with ESMTPS id 7AEF83858D37 for ; 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Thu, 25 May 2023 15:13:15 +0000 Received: by smtphe5005.mail.kks.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID 488c5470bf6d0859eec3e022495df5e9; Fri, 26 May 2023 00:13:13 +0900 (JST) Message-ID: <32bc6e6d-a273-2e8f-45e3-d3a3abc27ea7@yahoo.co.jp> Date: Fri, 26 May 2023 00:08:52 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 To: GCC Patches Cc: Max Filippov Subject: [PATCH 3/3] xtensa: Rework 'setmemsi' insn pattern References: <32bc6e6d-a273-2e8f-45e3-d3a3abc27ea7.ref@yahoo.co.jp> X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" In order to reject voodoo estimation logic with lots of magic numbers, this patch revises the code to measure the costs of the three memset methods based on the actual emission size of the insn sequence corresponding to each method and choose the smallest one. gcc/ChangeLog: * config/xtensa/xtensa-protos.h (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): Remove. (xtensa_expand_block_set): New prototype. * config/xtensa/xtensa.cc (xtensa_expand_block_set_libcall): New subfunction. (xtensa_expand_block_set_unrolled_loop, xtensa_expand_block_set_small_loop): Rewrite as subfunctions. (xtensa_expand_block_set): New function that calls the above subfunctions. * config/xtensa/xtensa.md (memsetsi): Change to invoke only xtensa_expand_block_set(). --- gcc/config/xtensa/xtensa-protos.h | 3 +- gcc/config/xtensa/xtensa.cc | 319 ++++++++++++++++-------------- gcc/config/xtensa/xtensa.md | 4 +- 3 files changed, 172 insertions(+), 154 deletions(-) diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index ec715b44e4d..b0b15a42799 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -42,8 +42,7 @@ extern void xtensa_expand_conditional_branch (rtx *, machine_mode); extern int xtensa_expand_conditional_move (rtx *, int); extern int xtensa_expand_scc (rtx *, machine_mode); extern int xtensa_expand_block_move (rtx *); -extern int xtensa_expand_block_set_unrolled_loop (rtx *); -extern int xtensa_expand_block_set_small_loop (rtx *); +extern int xtensa_expand_block_set (rtx *); extern void xtensa_split_operand_pair (rtx *, machine_mode); extern int xtensa_constantsynth (rtx, HOST_WIDE_INT); extern int xtensa_emit_move_sequence (rtx *, machine_mode); diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 46ab9f36b56..3b5d25b660a 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -57,6 +57,7 @@ along with GCC; see the file COPYING3. If not see #include "rtl-iter.h" #include "insn-attr.h" #include "tree-pass.h" +#include "print-rtl.h" /* This file should be included last. */ #include "target-def.h" @@ -1530,77 +1531,61 @@ xtensa_expand_block_move (rtx *operands) } -/* Try to expand a block set operation to a sequence of RTL move - instructions. If not optimizing, or if the block size is not a - constant, or if the block is too large, or if the value to - initialize the block with is not a constant, the expansion - fails and GCC falls back to calling memset(). +/* Worker function for xtensa_expand_block_set(). - operands[0] is the destination - operands[1] is the length - operands[2] is the initialization value - operands[3] is the alignment */ + Expand into an insn sequence that calls the "memset" function. */ -static int -xtensa_sizeof_MOVI (HOST_WIDE_INT imm) +static rtx_insn * +xtensa_expand_block_set_libcall (rtx dst_mem, + HOST_WIDE_INT value, + HOST_WIDE_INT bytes) { - return (TARGET_DENSITY && IN_RANGE (imm, -32, 95)) ? 2 : 3; + rtx reg; + rtx_insn *seq; + + start_sequence (); + + reg = XEXP (dst_mem, 0); + if (! REG_P (reg)) + reg = XEXP (replace_equiv_address (dst_mem, + force_reg (Pmode, reg)), 0); + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memset"), + LCT_NORMAL, VOIDmode, + reg, SImode, + GEN_INT (value), SImode, + GEN_INT (bytes), SImode); + + seq = get_insns (); + end_sequence (); + + return seq; } -int -xtensa_expand_block_set_unrolled_loop (rtx *operands) +/* Worker function for xtensa_expand_block_set(). + + Expand into an insn sequence of one constant load followed by multiple + memory stores. Returns NULL if the conditions for expansion are not + met. */ + +static rtx_insn * +xtensa_expand_block_set_unrolled_loop (rtx dst_mem, + HOST_WIDE_INT value, + HOST_WIDE_INT bytes, + HOST_WIDE_INT align) { - rtx dst_mem = operands[0]; - HOST_WIDE_INT bytes, value, align; - int expand_len, funccall_len; - rtx x, reg; + rtx reg; int offset; + rtx_insn *seq; - if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2])) - return 0; + if (bytes > 64) + return NULL; - bytes = INTVAL (operands[1]); - if (bytes <= 0) - return 0; - value = (int8_t)INTVAL (operands[2]); - align = INTVAL (operands[3]); - if (align > MOVE_MAX) - align = MOVE_MAX; - - /* Insn expansion: holding the init value. - Either MOV(.N) or L32R w/litpool. */ - if (align == 1) - expand_len = xtensa_sizeof_MOVI (value); - else if (value == 0 || value == -1) - expand_len = TARGET_DENSITY ? 2 : 3; - else - expand_len = 3 + 4; - /* Insn expansion: a series of aligned memory stores. - Consist of S8I, S16I or S32I(.N). */ - expand_len += (bytes / align) * (TARGET_DENSITY - && align == 4 ? 2 : 3); - /* Insn expansion: the remainder, sub-aligned memory stores. - A combination of S8I and S16I as needed. */ - expand_len += ((bytes % align + 1) / 2) * 3; - - /* Function call: preparing two arguments. */ - funccall_len = xtensa_sizeof_MOVI (value); - funccall_len += xtensa_sizeof_MOVI (bytes); - /* Function call: calling memset(). */ - funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3; - - /* Apply expansion bonus (2x) if optimizing for speed. */ - if (optimize > 1 && !optimize_size) - funccall_len *= 2; - - /* Decide whether to expand or not, based on the sum of the length - of instructions. */ - if (expand_len > funccall_len) - return 0; + start_sequence (); - x = XEXP (dst_mem, 0); - if (!REG_P (x)) - dst_mem = replace_equiv_address (dst_mem, force_reg (Pmode, x)); + reg = XEXP (dst_mem, 0); + if (! REG_P (reg)) + dst_mem = replace_equiv_address (dst_mem, + force_reg (Pmode, reg)); switch (align) { case 1: @@ -1621,45 +1606,43 @@ xtensa_expand_block_set_unrolled_loop (rtx *operands) { int unit_size = MIN (bytes, align); machine_mode unit_mode = (unit_size >= 4 ? SImode : - (unit_size >= 2 ? HImode : - QImode)); - unit_size = GET_MODE_SIZE (unit_mode); + (unit_size >= 2 ? HImode : QImode)); + unit_size = GET_MODE_SIZE (unit_mode); emit_move_insn (adjust_address (dst_mem, unit_mode, offset), - unit_mode == SImode ? reg - : convert_to_mode (unit_mode, reg, true)); - + (unit_mode == SImode) ? reg + : convert_to_mode (unit_mode, reg, true)); offset += unit_size; bytes -= unit_size; } while (bytes > 0); - return 1; + seq = get_insns (); + end_sequence (); + + return seq; } -int -xtensa_expand_block_set_small_loop (rtx *operands) +/* Worker function for xtensa_expand_block_set(), + + Expand into an insn sequence of a small loop that fill the memory + range. Returns NULL if the conditions for expansion are not met. */ + +static rtx_insn * +xtensa_expand_block_set_small_loop (rtx dst_mem, + HOST_WIDE_INT value, + HOST_WIDE_INT bytes, + HOST_WIDE_INT align) { - HOST_WIDE_INT bytes, value, align, count; - int expand_len, funccall_len; - rtx x, dst, end, reg; + HOST_WIDE_INT count; + rtx reg, dst, end; machine_mode unit_mode; rtx_code_label *label; - - if (!CONST_INT_P (operands[1]) || !CONST_INT_P (operands[2])) - return 0; - - bytes = INTVAL (operands[1]); - if (bytes <= 0) - return 0; - value = (int8_t)INTVAL (operands[2]); - align = INTVAL (operands[3]); - if (align > MOVE_MAX) - align = MOVE_MAX; + rtx_insn *seq; /* Totally-aligned block only. */ if (bytes % align != 0) - return 0; + return NULL; count = bytes / align; /* If the Loop Option (zero-overhead looping) is configured and active, @@ -1671,77 +1654,28 @@ xtensa_expand_block_set_small_loop (rtx *operands) instruction. */ if (align == 4 && ! (bytes <= 127 || xtensa_simm8x256 (bytes))) - return 0; + return NULL; /* If no 4-byte aligned, loop count should be treated as the constraint. */ if (align != 4 && count > ((optimize > 1 && !optimize_size) ? 8 : 15)) - return 0; + return NULL; } - /* Insn expansion: holding the init value. - Either MOV(.N) or L32R w/litpool. */ - if (align == 1) - expand_len = xtensa_sizeof_MOVI (value); - else if (value == 0 || value == -1) - expand_len = TARGET_DENSITY ? 2 : 3; - else - expand_len = 3 + 4; - if (TARGET_LOOPS && optimize) /* zero-overhead looping */ - { - /* Insn translation: Either MOV(.N) or L32R w/litpool for the - loop count. */ - expand_len += xtensa_simm12b (count) ? xtensa_sizeof_MOVI (count) - : 3 + 4; - /* Insn translation: LOOP, the zero-overhead looping setup - instruction. */ - expand_len += 3; - /* Insn expansion: the loop body instructions. - For store, one of S8I, S16I or S32I(.N). - For advance, ADDI(.N). */ - expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3) - + (TARGET_DENSITY ? 2 : 3); - } - else /* NO zero-overhead looping */ - { - /* Insn expansion: Either ADDI(.N) or ADDMI for the end address. */ - expand_len += bytes > 127 ? 3 - : (TARGET_DENSITY && bytes <= 15) ? 2 : 3; - /* Insn expansion: the loop body and branch instruction. - For store, one of S8I, S16I or S32I(.N). - For advance, ADDI(.N). - For branch, BNE. */ - expand_len += (TARGET_DENSITY && align == 4 ? 2 : 3) - + (TARGET_DENSITY ? 2 : 3) + 3; - } - - /* Function call: preparing two arguments. */ - funccall_len = xtensa_sizeof_MOVI (value); - funccall_len += xtensa_sizeof_MOVI (bytes); - /* Function call: calling memset(). */ - funccall_len += TARGET_LONGCALLS ? (3 + 4 + 3) : 3; - - /* Apply expansion bonus (2x) if optimizing for speed. */ - if (optimize > 1 && !optimize_size) - funccall_len *= 2; - - /* Decide whether to expand or not, based on the sum of the length - of instructions. */ - if (expand_len > funccall_len) - return 0; + start_sequence (); - x = XEXP (operands[0], 0); - if (!REG_P (x)) - x = XEXP (replace_equiv_address (operands[0], force_reg (Pmode, x)), 0); - dst = gen_reg_rtx (SImode); - emit_move_insn (dst, x); - end = gen_reg_rtx (SImode); - if (TARGET_LOOPS && optimize) - x = force_reg (SImode, operands[1] /* the length */); + reg = XEXP (dst_mem, 0); + if (REG_P (reg)) + emit_move_insn (dst = gen_reg_rtx (SImode), reg); else - x = operands[1]; - emit_insn (gen_addsi3 (end, dst, x)); + dst = XEXP (replace_equiv_address (dst_mem, + force_reg (Pmode, reg)), 0); + emit_insn (gen_addsi3 (end = gen_reg_rtx (SImode), + dst, + (TARGET_LOOPS && optimize) + ? force_reg (SImode, GEN_INT (bytes)) + : GEN_INT (bytes))); switch (align) { case 1: @@ -1760,12 +1694,99 @@ xtensa_expand_block_set_small_loop (rtx *operands) } reg = force_reg (unit_mode, GEN_INT (value)); - label = gen_label_rtx (); - emit_label (label); + emit_label (label = gen_label_rtx ()); emit_move_insn (gen_rtx_MEM (unit_mode, dst), reg); emit_insn (gen_addsi3 (dst, dst, GEN_INT (align))); emit_cmp_and_jump_insns (dst, end, NE, const0_rtx, SImode, true, label); + seq = get_insns (); + end_sequence (); + + return seq; +} + + +/* Try to expand a block set operation to a sequence of RTL move + instructions. If not optimizing, or if the block size is not a + constant, or if the block is too large, or if the value to + initialize the block with is not a constant, the expansion + fails and GCC falls back to calling memset(). + + operands[0] is the destination + operands[1] is the length + operands[2] is the initialization value + operands[3] is the alignment */ + +int +xtensa_expand_block_set (rtx *operands) +{ + rtx dst_mem = operands[0]; + HOST_WIDE_INT bytes, value, align; + rtx_insn *seq[3]; + int min_cost, min_index, i, n, cost; + rtx_insn *insn; + + if (! CONST_INT_P (operands[1]) + || ! CONST_INT_P (operands[2]) + || (bytes = INTVAL (operands[1])) <= 0) + return 0; + + value = (int8_t)INTVAL (operands[2]); + align = INTVAL (operands[3]); + if (align > MOVE_MAX) + align = MOVE_MAX; + + /* Try to generate three equivalent insn sequences but method and + size. */ + seq[0] = xtensa_expand_block_set_libcall (dst_mem, value, bytes); + seq[1] = xtensa_expand_block_set_unrolled_loop (dst_mem, value, + bytes, align); + seq[2] = xtensa_expand_block_set_small_loop (dst_mem, value, + bytes, align); + + /* Find the sequence that has minimum size-basis insn costs. */ + if (dump_file) + fprintf (dump_file, "xtensa_expand_block_set:\n"); + min_cost = INT_MAX, min_index = 0; + for (i = 0; i < 3; ++i) + if ((insn = seq[i])) + { + if (dump_file) + fprintf (dump_file, " method %d...\n", i); + + for (n = 0, cost = 0; insn; insn = NEXT_INSN (insn)) + { + if (active_insn_p (insn)) + ++n, cost += xtensa_insn_cost (insn, false); + if (dump_file) + dump_insn_slim (dump_file, insn); + } + + /* Apply expansion bonus if -O2 or -O3 by discounting the cost + other than libcall. */ + if (i > 0) + { + if (optimize == 2 && !optimize_size) + cost = (cost + 1) / 2; + else if (optimize >= 3) + cost = (cost + 2) / 4; + } + + if (dump_file) + fprintf (dump_file, "\t%d active insns, %d cost.\n", n, cost); + + if (cost < min_cost) + min_cost = cost, min_index = i; + } + if (dump_file) + fprintf (dump_file, " choose method %d.\n", min_index); + + /* Fall back if libcall is minimum. */ + if (min_index == 0) + return 0; + + emit_insn (seq[min_index]); + return 1; } diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 113b313026e..57e50911f52 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1547,9 +1547,7 @@ (match_operand:SI 3 "const_int_operand")] "!optimize_debug && optimize" { - if (xtensa_expand_block_set_unrolled_loop (operands)) - DONE; - if (xtensa_expand_block_set_small_loop (operands)) + if (xtensa_expand_block_set (operands)) DONE; FAIL; })