From patchwork Mon May 8 13:38:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Takayuki 'January June' Suwa X-Patchwork-Id: 68903 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AD8983858005 for ; Mon, 8 May 2023 13:39:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AD8983858005 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1683553168; bh=E+CAsjppRSJ0KVjaoAYq8sQAcEnIBaqLYabysXz722A=; h=Date:To:Cc:Subject:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=TfEPWC7tJNgkdioyOUJhtnfHn5oZZt5CAumuU1aB9L0UmRGrBnxDesQsUcA6C55wD KNAQ1GrsHYCSzYJDHGUIfAIZIaeIWmkzzqvtTMzwzU+HypMly1UvRevFYy++EA82l7 LAERluZcTSfutsvcslehsAmyXceC6dIpZd789/ik= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from omggw0003.mail.otm.ynwl.yahoo.co.jp (omggw0003.mail.otm.yahoo.co.jp [182.22.18.10]) by sourceware.org (Postfix) with ESMTPS id CA7903858D32 for ; Mon, 8 May 2023 13:38:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org CA7903858D32 X-YMail-OSG: darEFgkVM1lFRkGCbq3omBmVJcpOc6OydA.Mp0uflmsfcKilDlRS5N6wWdbryIa 4uo2WOk6HDzjhTfbEK9Hmb74Li6CCYYtzgk83SflVyehmYV_9VlaTUPn6Sl.cv_QiyEJJuihyu9t koggljwpDOBD6EZd7IVYzmSNwUoL7jSoTjTDMwt1KdOX_bX0YsA3n1f9iiyx3C8dB5sROcalUHDH 2AuUB_cWUjXQBv1loURze5B_7L5XwW.3TcjhvRq1pvCpKwhQJoIaKeHbsDxL1t_BZu.1yLjNMEpc w5_cbSl7jv3N8zYvv0C.JAx9VqbonB2DqL4viGUfusdjQVdG4At5U6Zsv4MqPLss0VgWBqibF07d pqTzZuYJiL7csXPWA9XOaxVOf2dWta4XSnr3.JQ24BKuwyxVj3NDrV3cm7sBIta8eLkOee_1Ox9V iZRmdh7_Suu3lXCrWPHAtZPG_SRMQQPsRQtz5Z_wa6hpm6tJIGMHZEg4Mjrw2ifH5mkUwCICnk4J myQ44VExqgjTjz0jBNb3zYqTEipaGV89d4w0YrpVp1ZpWUKh0cyJsKCkQgAvZE7iLYIvPNb.5fZE QYkabPgR6Wb1rbp.Ky70UshrbOKAGY6iWqqHd_SjHoIIxkKFViIL12FZDfOcUhP2YKywlebQzeUc HTlYmybzVlW9IACNyX5X5RK4VwhDOOAY7.vRG4yrSOLFvns6LlzkEdQ3hWYEs34NVr7ZOoAI5_rT cDpUiTkHaymh03PB8Im6PEtc6.94I9aNT3DsRMgwczPcqrRRL3M5_tpLDq3VLEAS3Ibi_KOUTCzW KvpmCoR0SQltvbyO8YVemws3EnvOXFv769.rNmYShg9SiQ2kAboYVvAZolHmBuYcFHqVbEXTw7NN jYBAphbKXA95uT._GiBq6tNEH7n6UJwgrxBfkdb_XcCbXYyTaMVkokD7UiDnD_vDq5qVucIWlyDb tJm0_VP5u.oV6g4p4bO1Y7LEn3oJWxQ_EKWvk.1VEpSSFizcfzp8_T1jWrJLQj8cUZA-- Received: from sonicgw.mail.yahoo.co.jp by sonicconh6001.mail.ssk.yahoo.co.jp with HTTP; Mon, 8 May 2023 13:38:55 +0000 Received: by smtphe6010.mail.ssk.ynwp.yahoo.co.jp (YJ Hermes SMTP Server) with ESMTPA ID b774c49ad90accbc9aa024fd9ab1bbf2; Mon, 08 May 2023 22:38:52 +0900 (JST) Message-ID: <91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4@yahoo.co.jp> Date: Mon, 8 May 2023 22:38:51 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.1 To: GCC Patches Cc: Max Filippov Subject: [PATCH] xtensa: Make full transition to LRA References: <91ddbcb5-67e2-2c30-a81e-6b20e3c8e1a4.ref@yahoo.co.jp> X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: Takayuki 'January June' Suwa Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: * config/xtensa/constraints.md (R, T, U): Change define_constraint to define_memory_constraint. * config/xtensa/xtensa.cc (xtensa_lra_p, TARGET_LRA_P): Remove. (xtensa_emit_move_sequence): Remove "if (reload_in_progress)" clause as it can no longer be true. (xtensa_output_integer_literal_parts): Consider 16-bit wide constants. (xtensa_legitimate_constant_p): Add short-circuit path for integer load instructions. * config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p() rather reload_in_progress and reload_completed. * config/xtensa/xtensa.opt (mlra): Remove. --- gcc/config/xtensa/constraints.md | 26 ++++++++------------------ gcc/config/xtensa/xtensa.cc | 26 +++++--------------------- gcc/config/xtensa/xtensa.md | 2 +- gcc/config/xtensa/xtensa.opt | 4 ---- 4 files changed, 14 insertions(+), 44 deletions(-) diff --git a/gcc/config/xtensa/constraints.md b/gcc/config/xtensa/constraints.md index 53e4d0d8dd1..9b31e162941 100644 --- a/gcc/config/xtensa/constraints.md +++ b/gcc/config/xtensa/constraints.md @@ -123,29 +123,19 @@ (and (match_code "const_int") (match_test "! xtensa_split1_finished_p ()")))) -;; Memory constraints. Do not use define_memory_constraint here. Doing so -;; causes reload to force some constants into the constant pool, but since -;; the Xtensa constant pool can only be accessed with L32R instructions, it -;; is always better to just copy a constant into a register. Instead, use -;; regular constraints but add a check to allow pseudos during reload. +;; Memory constraints. -(define_constraint "R" +(define_memory_constraint "R" "Memory that can be accessed with a 4-bit unsigned offset from a register." - (ior (and (match_code "mem") - (match_test "smalloffset_mem_p (op)")) - (and (match_code "reg") - (match_test "reload_in_progress - && REGNO (op) >= FIRST_PSEUDO_REGISTER")))) + (and (match_code "mem") + (match_test "smalloffset_mem_p (op)"))) -(define_constraint "T" +(define_memory_constraint "T" "Memory in a literal pool (addressable with an L32R instruction)." (and (match_code "mem") (match_test "!TARGET_CONST16 && constantpool_mem_p (op)"))) -(define_constraint "U" +(define_memory_constraint "U" "Memory that is not in a literal pool." - (ior (and (match_code "mem") - (match_test "! constantpool_mem_p (op)")) - (and (match_code "reg") - (match_test "reload_in_progress - && REGNO (op) >= FIRST_PSEUDO_REGISTER")))) + (and (match_code "mem") + (match_test "! constantpool_mem_p (op)"))) diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc index 9e5d314e143..f4434ec6e2c 100644 --- a/gcc/config/xtensa/xtensa.cc +++ b/gcc/config/xtensa/xtensa.cc @@ -190,7 +190,6 @@ static void xtensa_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, tree function); -static bool xtensa_lra_p (void); static rtx xtensa_delegitimize_address (rtx); @@ -286,9 +285,6 @@ static rtx xtensa_delegitimize_address (rtx); #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM xtensa_cannot_force_const_mem -#undef TARGET_LRA_P -#define TARGET_LRA_P xtensa_lra_p - #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P xtensa_legitimate_address_p @@ -1266,14 +1262,6 @@ xtensa_emit_move_sequence (rtx *operands, machine_mode mode) operands[1] = xtensa_copy_incoming_a7 (operands[1]); - /* During reload we don't want to emit (subreg:X (mem:Y)) since that - instruction won't be recognized after reload, so we remove the - subreg and adjust mem accordingly. */ - if (reload_in_progress) - { - operands[0] = fixup_subreg_mem (operands[0]); - operands[1] = fixup_subreg_mem (operands[1]); - } return 0; } @@ -3196,7 +3184,7 @@ xtensa_output_integer_literal_parts (FILE *file, rtx x, int size) fputs (", ", file); xtensa_output_integer_literal_parts (file, second, size / 2); } - else if (size == 4) + else if (size == 4 || size == 2) { output_addr_const (file, x); } @@ -4876,6 +4864,10 @@ xtensa_trampoline_init (rtx m_tramp, tree fndecl, rtx chain) static bool xtensa_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { + if (CONST_INT_P (x)) + return TARGET_AUTO_LITPOOLS || TARGET_CONST16 + || xtensa_simm12b (INTVAL (x)); + return !xtensa_tls_referenced_p (x); } @@ -5317,12 +5309,4 @@ xtensa_delegitimize_address (rtx op) return op; } -/* Implement TARGET_LRA_P. */ - -static bool -xtensa_lra_p (void) -{ - return TARGET_LRA; -} - #include "gt-xtensa.h" diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 3521fa33b47..195515d9427 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1268,7 +1268,7 @@ if ((!register_operand (operands[0], SFmode) && !register_operand (operands[1], SFmode)) || (FP_REG_P (xt_true_regnum (operands[0])) - && !(reload_in_progress | reload_completed) + && can_create_pseudo_p () && (constantpool_mem_p (operands[1]) || CONSTANT_P (operands[1])))) operands[1] = force_reg (SFmode, operands[1]); diff --git a/gcc/config/xtensa/xtensa.opt b/gcc/config/xtensa/xtensa.opt index f16b53bf409..8574c12198e 100644 --- a/gcc/config/xtensa/xtensa.opt +++ b/gcc/config/xtensa/xtensa.opt @@ -37,10 +37,6 @@ mextra-l32r-costs= Target RejectNegative Joined UInteger Var(xtensa_extra_l32r_costs) Init(0) Set extra memory access cost for L32R instruction, in clock-cycle units. -mlra -Target Mask(LRA) -Use LRA instead of reload (transitional). - mtarget-align Target Automatically align branch targets to reduce branch penalties.