From patchwork Mon Apr 17 15:34:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Simmons-Talbott X-Patchwork-Id: 67822 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5261B3856DE6 for ; Mon, 17 Apr 2023 15:35:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5261B3856DE6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1681745738; bh=5X2KL2tKkhoaWEEFWzsMf3m66a6RCp341/NVUvlvNYo=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=hcsPGGY7ffF0iu+3m+yKA63hilj7Yd9KR5136KYOyEtz2hDqefEJwzr+QZO0igFG6 550tabaGlw1cg/sv3OMxipc7pFsT1P9EErweJ85ejWLNhD1OcPKWLc91IGKcvA1X3M V84iEuMY5iP52/zm3mnF4/zpS3iuxPX3sFlHiiFE= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 0A67B3858C53 for ; Mon, 17 Apr 2023 15:35:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0A67B3858C53 Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-266-Mjv9B9enO82V7mlrBkV2Pw-1; Mon, 17 Apr 2023 11:35:09 -0400 X-MC-Unique: Mjv9B9enO82V7mlrBkV2Pw-1 Received: by mail-qv1-f70.google.com with SMTP id f17-20020a0cbed1000000b005d70160fbb0so11236648qvj.21 for ; Mon, 17 Apr 2023 08:35:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681745708; x=1684337708; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5X2KL2tKkhoaWEEFWzsMf3m66a6RCp341/NVUvlvNYo=; b=ZWGRbZNVJyXNDOJK8lmGaHBfaHrZyOz8cEXhc+A75r3nobzf6Hnuuw7MIyR40fW+G7 fSQU9wBdfy3rgg0A03dtnMpx81ZTtYDqgB/wmAZhv58GG0VA4CqlEJQYPPmqNMdRwt+c 21UfsYLw8HhiV4Tki4YGhLZzZ706Kb/3w3DekVzNenvlbXcHc1BPDTD54v0VvtV4hgwD XnAy9y1z0v6/y1Dp6r9tecoHp//L5HWaghhCQI4DEyTIfzydol3O3ydsoBFb6ZrEkrnJ 1zeYjVCRH/BCMI07mXhB+eG8V8wSH8zqPuLbn58EjSbKjnKu+DS/EXIE7pSH+7RuHvuD Qjfg== X-Gm-Message-State: AAQBX9cbz1baOA+uUURz3PQ250HW6u3+Dg5d4cVC03b5UXcp7buVBuKQ A+ldeQzarI29hpi3ji3W7AH1f4RsSQgRQu9qM6McHE6hJOHqqd+y20SFzeaLInVYM8fJrsNMroV vg0kaDevdlOY7Ho/lSiPANt4PsHaiE0eaucaO3t/hLiV9EvYL073PNm1K5lRpIspao03Ec1yMmS 05ic5/ X-Received: by 2002:a05:622a:28e:b0:3ef:2bae:d1e5 with SMTP id z14-20020a05622a028e00b003ef2baed1e5mr6339680qtw.24.1681745707919; Mon, 17 Apr 2023 08:35:07 -0700 (PDT) X-Google-Smtp-Source: AKy350aqQfaUf5V32EUfp4TPZkxDWK1UKaUAkc3CjLiAeJ/l1utsMJuRK9VHfOCEreBu5EAi9FZn6w== X-Received: by 2002:a05:622a:28e:b0:3ef:2bae:d1e5 with SMTP id z14-20020a05622a028e00b003ef2baed1e5mr6339643qtw.24.1681745707556; Mon, 17 Apr 2023 08:35:07 -0700 (PDT) Received: from oak.redhat.com (c-71-206-142-238.hsd1.va.comcast.net. [71.206.142.238]) by smtp.gmail.com with ESMTPSA id f20-20020a05620a20d400b0074d3233487dsm1577107qka.114.2023.04.17.08.35.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 08:35:06 -0700 (PDT) To: libc-alpha@sourceware.org Cc: Joe Simmons-Talbott Subject: [PATCH v3 1/2] x86_64: Set the syscall register right before doing the syscall. Date: Mon, 17 Apr 2023 11:34:50 -0400 Message-Id: <20230417153451.1450817-2-josimmon@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230417153451.1450817-1-josimmon@redhat.com> References: <20230411133004.2268170-1-josimmon@redhat.com> <20230417153451.1450817-1-josimmon@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Joe Simmons-Talbott via Libc-alpha From: Joe Simmons-Talbott Reply-To: Joe Simmons-Talbott Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" To make identifying syscalls easier during call tree analysis load the syscall number just before performing the syscall. Compiler optimizations can place quite a few instructions between the setting of the syscall number and the syscall instruction. During call tree analysis the number of instructions between the two can lead to more difficulty for both tools and humans in properly identifying the syscall number. Having the syscall number set in the prior instruction to the syscall instruction makes this task easier and less error prone. Being able to reliably identify syscalls made by a given API will make it easier to understand and verify the safety and security of glibc. --- sysdeps/unix/sysv/linux/x86_64/sysdep.h | 33 +++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/sysdeps/unix/sysv/linux/x86_64/sysdep.h b/sysdeps/unix/sysv/linux/x86_64/sysdep.h index cfb51be8c5..800a56723f 100644 --- a/sysdeps/unix/sysv/linux/x86_64/sysdep.h +++ b/sysdeps/unix/sysv/linux/x86_64/sysdep.h @@ -250,12 +250,20 @@ (long int) resultvar; \ }) +#define MSTR_HELPER(x) #x +#define MSTR(x) MSTR_HELPER(x) + #undef internal_syscall1 #define internal_syscall1(number, arg1) \ ({ \ unsigned long int resultvar; \ TYPEFY (arg1, __arg1) = ARGIFY (arg1); \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ @@ -272,6 +280,11 @@ TYPEFY (arg1, __arg1) = ARGIFY (arg1); \ register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ @@ -290,6 +303,11 @@ register TYPEFY (arg3, _a3) asm ("rdx") = __arg3; \ register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ @@ -310,6 +328,11 @@ register TYPEFY (arg3, _a3) asm ("rdx") = __arg3; \ register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ @@ -332,6 +355,11 @@ register TYPEFY (arg3, _a3) asm ("rdx") = __arg3; \ register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ @@ -357,6 +385,11 @@ register TYPEFY (arg3, _a3) asm ("rdx") = __arg3; \ register TYPEFY (arg2, _a2) asm ("rsi") = __arg2; \ register TYPEFY (arg1, _a1) asm ("rdi") = __arg1; \ + if (__builtin_constant_p(number)) \ + asm volatile ("movl $" MSTR(number) ", %%eax\n\t" \ + : /* no outputs */ \ + : "i" (number) \ + : "eax"); \ asm volatile ( \ "syscall\n\t" \ : "=a" (resultvar) \ From patchwork Mon Apr 17 15:34:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Simmons-Talbott X-Patchwork-Id: 67823 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0DFF43858C39 for ; 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[71.206.142.238]) by smtp.gmail.com with ESMTPSA id f20-20020a05620a20d400b0074d3233487dsm1577107qka.114.2023.04.17.08.35.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Apr 2023 08:35:07 -0700 (PDT) To: libc-alpha@sourceware.org Cc: Joe Simmons-Talbott Subject: [PATCH v3 2/2] aarch64: Set the syscall register right before doing the syscall. Date: Mon, 17 Apr 2023 11:34:51 -0400 Message-Id: <20230417153451.1450817-3-josimmon@redhat.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230417153451.1450817-1-josimmon@redhat.com> References: <20230411133004.2268170-1-josimmon@redhat.com> <20230417153451.1450817-1-josimmon@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Joe Simmons-Talbott via Libc-alpha From: Joe Simmons-Talbott Reply-To: Joe Simmons-Talbott Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" To make identifying syscalls easier during call tree analysis load the syscall number just before performing the syscall. Compiler optimizations can place quite a few instructions between the setting of the syscall number and the syscall instruction. During call tree analysis the number of instructions between the two can lead to more difficulty for both tools and humans in properly identifying the syscall number. Having the syscall number set in the prior instruction to the syscall instruction makes this task easier and less error prone. Being able to reliably identify syscalls made by a given API will make it easier to understand and verify the safety and security of glibc. --- sysdeps/unix/sysv/linux/aarch64/sysdep.h | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/sysdeps/unix/sysv/linux/aarch64/sysdep.h b/sysdeps/unix/sysv/linux/aarch64/sysdep.h index e94d1703ad..b91656fdff 100644 --- a/sysdeps/unix/sysv/linux/aarch64/sysdep.h +++ b/sysdeps/unix/sysv/linux/aarch64/sysdep.h @@ -167,14 +167,28 @@ # define HAVE_CLONE3_WRAPPER 1 +# define MSTR_HELPER(x) # x +# define MSTR(x) MSTR_HELPER(x) + # undef INTERNAL_SYSCALL_RAW # define INTERNAL_SYSCALL_RAW(name, nr, args...) \ ({ long _sys_result; \ { \ LOAD_ARGS_##nr (args) \ - register long _x8 asm ("x8") = (name); \ - asm volatile ("svc 0 // syscall " # name \ - : "=r" (_x0) : "r"(_x8) ASM_ARGS_##nr : "memory"); \ + if (__builtin_constant_p(name)) \ + asm volatile ("mov x8, %1\n" \ + "svc 0 // syscall " # name \ + : "=r" (_x0) \ + : "i" (name) ASM_ARGS_##nr \ + : "x8", "memory"); \ + else \ + { \ + register long _x8 asm ("x8") = (name); \ + asm volatile ("svc 0 // syscall " # name \ + : "=r" (_x0) \ + : "r"(_x8) ASM_ARGS_##nr \ + : "memory"); \ + } \ _sys_result = _x0; \ } \ _sys_result; })