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Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 40.67.248.234 as permitted sender) receiver=protection.outlook.com; client-ip=40.67.248.234; helo=nebula.arm.com; pr=C Received: from nebula.arm.com (40.67.248.234) by DBAEUR03FT058.mail.protection.outlook.com (100.127.142.120) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6064.32 via Frontend Transport; Mon, 6 Feb 2023 14:48:05 +0000 Received: from AZ-NEU-EX04.Arm.com (10.251.24.32) by AZ-NEU-EX03.Arm.com (10.251.24.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 6 Feb 2023 14:48:01 +0000 Received: from e124257.nice.arm.com (10.34.105.24) by mail.arm.com (10.251.24.32) with Microsoft SMTP Server id 15.1.2507.16 via Frontend Transport; Mon, 6 Feb 2023 14:48:01 +0000 To: CC: , , Andrea Corallo Subject: [PATCH] aarch64: Fix return_address_sign_ab_exception.C regression Date: Mon, 6 Feb 2023 15:47:52 +0100 Message-ID: <20230206144752.3829182-1-andrea.corallo@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: DBAEUR03FT058:EE_|AS4PR08MB7604:EE_|DBAEUR03FT063:EE_|DU0PR08MB7663:EE_ X-MS-Office365-Filtering-Correlation-Id: e8058488-7e07-4a56-1435-08db08513b14 x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(13230025)(4636009)(376002)(346002)(136003)(396003)(39860400002)(451199018)(36840700001)(40470700004)(46966006)(4326008)(6916009)(8676002)(82310400005)(83380400001)(40480700001)(336012)(2616005)(426003)(81166007)(36860700001)(47076005)(82740400003)(36756003)(54906003)(6666004)(1076003)(40460700003)(70206006)(186003)(316002)(478600001)(7696005)(86362001)(26005)(70586007)(2906002)(44832011)(8936002)(41300700001)(5660300002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2023 14:48:37.9445 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e8058488-7e07-4a56-1435-08db08513b14 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT063.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7663 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, KAM_DMARC_NONE, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, this is to fix the regression of g++.target/aarch64/return_address_sign_ab_exception.C that I introduced with d8dadbc9a5199bf7bac1ab7376b0f84f45e94350. 'aarch_ra_sign_key' for aarch64 ended up being non defined in the opt file and the function attribute "branch-protection=pac-ret+leaf+b-key" stopped working as expected. This patch moves the definition of 'aarch_ra_sign_key' to the opt files for both Arm back-ends. Regards Andera Corallo gcc/ChangeLog: * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove declaration. * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove definition. * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename to 'aarch_ra_sign_key'. * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove declaration. * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise. * config/arm/arm.cc (enum aarch_key_type): Remove definition. * config/arm/arm.opt: Define. --- gcc/config/aarch64/aarch64-protos.h | 2 -- gcc/config/aarch64/aarch64.cc | 2 -- gcc/config/aarch64/aarch64.opt | 2 +- gcc/config/arm/aarch-common.cc | 1 - gcc/config/arm/arm-protos.h | 1 - gcc/config/arm/arm.cc | 3 --- gcc/config/arm/arm.opt | 3 +++ 7 files changed, 4 insertions(+), 10 deletions(-) diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index 6ab6d49af37..f75eb892f3d 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -662,8 +662,6 @@ enum simd_immediate_check { AARCH64_CHECK_MOV = AARCH64_CHECK_ORR | AARCH64_CHECK_BIC }; -extern enum aarch_key_type aarch_ra_sign_key; - extern struct tune_params aarch64_tune_params; /* The available SVE predicate patterns, known in the ACLE as "svpattern". */ diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index acc0cfe5f94..1b498979af1 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -2759,8 +2759,6 @@ static const struct processor all_cores[] = {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL} }; -enum aarch_key_type aarch_ra_sign_key = AARCH_KEY_A; - /* The current tuning set. */ struct tune_params aarch64_tune_params = generic_tunings; diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 137e506fe19..1d7967db9c0 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -40,7 +40,7 @@ TargetVariable unsigned aarch_enable_bti = 2 TargetVariable -enum aarch64_key_type aarch64_ra_sign_key = AARCH64_KEY_A +enum aarch_key_type aarch_ra_sign_key = AARCH_KEY_A ; The TLS dialect names to use with -mtls-dialect. diff --git a/gcc/config/arm/aarch-common.cc b/gcc/config/arm/aarch-common.cc index 27e6c8f39b4..5b96ff4c2e8 100644 --- a/gcc/config/arm/aarch-common.cc +++ b/gcc/config/arm/aarch-common.cc @@ -661,7 +661,6 @@ arm_md_asm_adjust (vec &outputs, vec & /*inputs*/, #define BRANCH_PROTECT_STR_MAX 255 extern char *accepted_branch_protection_string; -extern enum aarch_key_type aarch_ra_sign_key; static enum aarch_parse_opt_result aarch_handle_no_branch_protection (char* str, char* rest) diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index aea472bfbb9..c8ae5e1e9c1 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -585,7 +585,6 @@ struct cpu_option extern const arch_option all_architectures[]; extern const cpu_option all_cores[]; -extern enum aarch_key_type aarch_ra_sign_key; const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *, const char *, bool = true); diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index efc48349dd3..3d778b2982e 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -2420,9 +2420,6 @@ const struct tune_params arm_fa726te_tune = tune_params::SCHED_AUTOPREF_OFF }; -/* Key type for Pointer Authentication extension. */ -enum aarch_key_type aarch_ra_sign_key = AARCH_KEY_A; - char *accepted_branch_protection_string = NULL; /* Auto-generated CPU, FPU and architecture tables. */ diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 260700f16bc..3a49b51ece0 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -30,6 +30,9 @@ enum aarch_function_type aarch_ra_sign_scope = AARCH_FUNCTION_NONE TargetVariable unsigned aarch_enable_bti = 0 +TargetVariable +enum aarch_key_type aarch_ra_sign_key = AARCH_KEY_A + Enum Name(tls_type) Type(enum arm_tls_type) TLS dialect to use: