From patchwork Fri Feb 3 10:22:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiufu Guo X-Patchwork-Id: 64240 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5946F38493C2 for ; Fri, 3 Feb 2023 10:22:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5946F38493C2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1675419768; bh=jf+pXvVmklNR/GzkVPy4T7p7SXiyHf8lZrEgYI8SaC0=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=sHfRiz1Y0r3V8712A1gsbhzznz6OuAk4jdXmMJmOhgw+DpKTKghwiSc05tJRxRNxs 4R0ESNb2QcIocUPPArVRBM1T60CSxzB3xZFEY1e5O8p1ZXOquqaLoBZTwjc5Al851p +dXoXaJ3OZa6r6A7UMPNdAcNNTE7Dh+9M/FTzRR0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id B9DC33858C52; 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Fri, 3 Feb 2023 10:22:13 GMT Received: from smtprelay07.fra02v.mail.ibm.com ([9.218.2.229]) by ppma04ams.nl.ibm.com (PPS) with ESMTPS id 3ncvs7qarf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 10:22:13 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 313AMBNC52101596 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 3 Feb 2023 10:22:11 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 717012004B; Fri, 3 Feb 2023 10:22:11 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5822C2006A; Fri, 3 Feb 2023 10:22:10 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 3 Feb 2023 10:22:10 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH 1/4] rs6000: build constant via li;rotldi Date: Fri, 3 Feb 2023 18:22:05 +0800 Message-Id: <20230203102208.53215-2-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230203102208.53215-1-guojiufu@linux.ibm.com> References: <20230203102208.53215-1-guojiufu@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: nV4wvuBkKPzR-OjRow_z_bP_bMqXh3ey X-Proofpoint-ORIG-GUID: 6H9CELyGBjglbnJk3OT5RibFmh93gv8y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_06,2023-02-03_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 bulkscore=0 mlxscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030093 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible to be rotated to/from a positive or negative value from "li". If so, we could use "li;rotldi" to build it. Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk or next stage1? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_rotated_to_possitive_li): New function. (can_be_rotated_to_negative_li): New function. (can_be_built_by_li_and_rotldi): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: New test. --- gcc/config/rs6000/rs6000.cc | 63 +++++++++++++++++-- .../gcc.target/powerpc/const-build.c | 54 ++++++++++++++++ 2 files changed, 111 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/const-build.c diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 6ac3adcec6b..82aba051c55 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10238,6 +10238,45 @@ rs6000_emit_set_const (rtx dest, rtx source) return true; } +/* Check if C can be rotated to a possitive value which 'li' instruction + is able to load. If so, set *ROT to the number by which C is rotated, + and return true. Return false otherwise. */ +static bool +can_be_rotated_to_possitive_li (HOST_WIDE_INT c, int *rot) +{ + /* 49 leading zeros and 15 lowbits on the possitive value + generated by 'li' instruction. */ + return can_be_rotated_to_lowbits (c, 15, rot); +} + +/* Like can_be_rotated_to_possitive_li, but check negative value of 'li'. */ +static bool +can_be_rotated_to_negative_li (HOST_WIDE_INT c, int *rot) +{ + return can_be_rotated_to_lowbits (~c, 15, rot); +} + +/* Check if value C can be built by 2 instructions: one is 'li', another is + rotldi. + + If so, *SHIFT is set to the shift operand of rotldi(rldicl), and *MASK + is set to -1, and return true. Return false otherwise. */ +static bool +can_be_built_by_li_and_rotldi (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + int n; + if (can_be_rotated_to_possitive_li (c, &n) + || can_be_rotated_to_negative_li (c, &n)) + { + *mask = HOST_WIDE_INT_M1; + *shift = HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10246,15 +10285,14 @@ static void rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) { rtx temp; + int shift; + HOST_WIDE_INT mask; HOST_WIDE_INT ud1, ud2, ud3, ud4; ud1 = c & 0xffff; - c = c >> 16; - ud2 = c & 0xffff; - c = c >> 16; - ud3 = c & 0xffff; - c = c >> 16; - ud4 = c & 0xffff; + ud2 = (c >> 16) & 0xffff; + ud3 = (c >> 32) & 0xffff; + ud4 = (c >> 48) & 0xffff; if ((ud4 == 0xffff && ud3 == 0xffff && ud2 == 0xffff && (ud1 & 0x8000)) || (ud4 == 0 && ud3 == 0 && ud2 == 0 && ! (ud1 & 0x8000))) @@ -10278,6 +10316,19 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (dest, gen_rtx_XOR (DImode, temp, GEN_INT ((ud2 ^ 0xffff) << 16))); } + else if (can_be_built_by_li_and_rotldi (c, &shift, &mask)) + { + temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); + unsigned HOST_WIDE_INT imm = (c | ~mask); + imm = (imm >> shift) | (imm << (HOST_BITS_PER_WIDE_INT - shift)); + + emit_move_insn (temp, GEN_INT (imm)); + if (shift != 0) + temp = gen_rtx_ROTATE (DImode, temp, GEN_INT (shift)); + if (mask != HOST_WIDE_INT_M1) + temp = gen_rtx_AND (DImode, temp, GEN_INT (mask)); + emit_move_insn (dest, temp); + } else if (ud3 == 0 && ud4 == 0) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c new file mode 100644 index 00000000000..70f095f6bf2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -0,0 +1,54 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -save-temps" } */ +/* { dg-require-effective-target has_arch_ppc64 } */ + +#define NOIPA __attribute__ ((noipa)) + +struct fun +{ + long long (*f) (void); + long long val; +}; + +long long NOIPA +li_rotldi_1 (void) +{ + return 0x7531000000000LL; +} + +long long NOIPA +li_rotldi_2 (void) +{ + return 0x2100000000000064LL; +} + +long long NOIPA +li_rotldi_3 (void) +{ + return 0xffff8531ffffffffLL; +} + +long long NOIPA +li_rotldi_4 (void) +{ + return 0x21ffffffffffff94LL; +} + +struct fun arr[] = { + {li_rotldi_1, 0x7531000000000LL}, + {li_rotldi_2, 0x2100000000000064LL}, + {li_rotldi_3, 0xffff8531ffffffffLL}, + {li_rotldi_4, 0x21ffffffffffff94LL}, +}; + +/* { dg-final { scan-assembler-times {\mrotldi\M} 4 } } */ + +int +main () +{ + for (int i = 0; i < sizeof (arr) / sizeof (arr[0]); i++) + if ((*arr[i].f) () != arr[i].val) + __builtin_abort (); + + return 0; +} From patchwork Fri Feb 3 10:22:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiufu Guo X-Patchwork-Id: 64242 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 85B143881D10 for ; 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Fri, 03 Feb 2023 10:22:15 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay01.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 313AMCZ245809928 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 3 Feb 2023 10:22:13 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D55152004E; Fri, 3 Feb 2023 10:22:12 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BBFEF20040; Fri, 3 Feb 2023 10:22:11 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 3 Feb 2023 10:22:11 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH 2/4] rs6000: build constant via lis;rotldi Date: Fri, 3 Feb 2023 18:22:06 +0800 Message-Id: <20230203102208.53215-3-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230203102208.53215-1-guojiufu@linux.ibm.com> References: <20230203102208.53215-1-guojiufu@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ajCqEQ34oBgbzomCmUuOzFbl0cSKS3yS X-Proofpoint-ORIG-GUID: m2ZNvsSPtclgfPvqSVDClFq-oHYdfmc7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_06,2023-02-03_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 mlxlogscore=999 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030088 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible to be rotated to/from a negative value from "lis". If so, we could use "lis;rotldi" to build it. The positive value of "lis" does not need to be analyzed. Because if a constant can be rotated from positive value of "lis", it also can be rotated from a positive value of "li". Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk or next stage1? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New function. (can_be_built_by_li_and_rotldi): Rename to ... (can_be_built_by_li_lis_and_rotldi): ... this function. (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: Add more tests. --- gcc/config/rs6000/rs6000.cc | 41 ++++++++++++++++--- .../gcc.target/powerpc/const-build.c | 16 +++++++- 2 files changed, 51 insertions(+), 6 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 82aba051c55..dcbd5820a52 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10256,18 +10256,49 @@ can_be_rotated_to_negative_li (HOST_WIDE_INT c, int *rot) return can_be_rotated_to_lowbits (~c, 15, rot); } -/* Check if value C can be built by 2 instructions: one is 'li', another is - rotldi. +/* Check if C can be rotated to a negative value which 'lis' instruction is + able to load: 1..1xx0..0. If so, set *ROT to the number by which C is + rotated, and return true. Return false otherwise. */ +static bool +can_be_rotated_to_negative_lis (HOST_WIDE_INT c, int *rot) +{ + /* case a. 1..1xxx0..01..1: up to 15 x's, at least 16 0's. */ + int leading_ones = clz_hwi (~c); + int tailing_ones = ctz_hwi (~c); + int middle_zeros = ctz_hwi (c >> tailing_ones); + if (middle_zeros >= 16 && leading_ones + tailing_ones >= 33) + { + *rot = HOST_BITS_PER_WIDE_INT - tailing_ones; + return true; + } + + /* case b. xx0..01..1xx: some of 15 x's (and some of 16 0's) are + rotated over highest bit. */ + int pos_one = clz_hwi ((c << 16) >> 16); + middle_zeros = ctz_hwi (c >> (HOST_BITS_PER_WIDE_INT - pos_one)); + int middle_ones = clz_hwi (~(c << pos_one)); + if (middle_zeros >= 16 && middle_ones >= 33) + { + *rot = pos_one; + return true; + } + + return false; +} + +/* Check if value C can be built by 2 instructions: one is 'li or lis', + another is rotldi. If so, *SHIFT is set to the shift operand of rotldi(rldicl), and *MASK is set to -1, and return true. Return false otherwise. */ static bool -can_be_built_by_li_and_rotldi (HOST_WIDE_INT c, int *shift, +can_be_built_by_li_lis_and_rotldi (HOST_WIDE_INT c, int *shift, HOST_WIDE_INT *mask) { int n; if (can_be_rotated_to_possitive_li (c, &n) - || can_be_rotated_to_negative_li (c, &n)) + || can_be_rotated_to_negative_li (c, &n) + || can_be_rotated_to_negative_lis (c, &n)) { *mask = HOST_WIDE_INT_M1; *shift = HOST_BITS_PER_WIDE_INT - n; @@ -10316,7 +10347,7 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (dest, gen_rtx_XOR (DImode, temp, GEN_INT ((ud2 ^ 0xffff) << 16))); } - else if (can_be_built_by_li_and_rotldi (c, &shift, &mask)) + else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask)) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); unsigned HOST_WIDE_INT imm = (c | ~mask); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c index 70f095f6bf2..c38a1dd91f2 100644 --- a/gcc/testsuite/gcc.target/powerpc/const-build.c +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -34,14 +34,28 @@ li_rotldi_4 (void) return 0x21ffffffffffff94LL; } +long long NOIPA +lis_rotldi_5 (void) +{ + return 0xffff85310000ffffLL; +} + +long long NOIPA +lis_rotldi_6 (void) +{ + return 0x5310000ffffffff8LL; +} + struct fun arr[] = { {li_rotldi_1, 0x7531000000000LL}, {li_rotldi_2, 0x2100000000000064LL}, {li_rotldi_3, 0xffff8531ffffffffLL}, {li_rotldi_4, 0x21ffffffffffff94LL}, + {lis_rotldi_5, 0xffff85310000ffffLL}, + {lis_rotldi_6, 0x5310000ffffffff8LL}, }; -/* { dg-final { scan-assembler-times {\mrotldi\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mrotldi\M} 6 } } */ int main () From patchwork Fri Feb 3 10:22:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiufu Guo X-Patchwork-Id: 64241 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8B17A38432E5 for ; Fri, 3 Feb 2023 10:22:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8B17A38432E5 DKIM-Signature: v=1; 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Fri, 3 Feb 2023 10:22:14 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44FEF2004E; Fri, 3 Feb 2023 10:22:14 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2BBAD2006A; Fri, 3 Feb 2023 10:22:13 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 3 Feb 2023 10:22:12 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH 3/4] rs6000: build constant via li/lis;rldicl/rldicr Date: Fri, 3 Feb 2023 18:22:07 +0800 Message-Id: <20230203102208.53215-4-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230203102208.53215-1-guojiufu@linux.ibm.com> References: <20230203102208.53215-1-guojiufu@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: PuXe24qr8dU2e4evS5e0RsgVgLYGlKxO X-Proofpoint-ORIG-GUID: cmriPL_vsDdZyqcRFfbAZslRaBk0UTRP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_06,2023-02-03_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 impostorscore=0 mlxscore=0 suspectscore=0 clxscore=1015 malwarescore=0 mlxlogscore=999 priorityscore=1501 bulkscore=0 lowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030088 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible left/right cleaned on a rotated value from a negative value of "li/lis". If so, we can build the constant through "li/lis ; rldicl/rldicr". Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk or next stage1? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New function. (can_be_built_by_li_lis_and_rldicr): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and can_be_built_by_li_lis_and_rldicl. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: Add more tests. --- gcc/config/rs6000/rs6000.cc | 57 ++++++++++++++++++- .../gcc.target/powerpc/const-build.c | 44 ++++++++++++++ 2 files changed, 100 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index dcbd5820a52..025abaa436e 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10308,6 +10308,59 @@ can_be_built_by_li_lis_and_rotldi (HOST_WIDE_INT c, int *shift, return false; } +/* Check if value C can be built by 2 instructions: one is 'li or lis', + another is rldicl. + + If so, *SHIFT is set to the shift operand of rldicl, and *MASK is set to + the mask operand of rldicl, and return true. + Return false otherwise. */ +static bool +can_be_built_by_li_lis_and_rldicl (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + /* Leading zeros maybe cleaned by rldicl with mask. Change leading zeros + to ones and then recheck it. */ + int lz = clz_hwi (c); + HOST_WIDE_INT unmask_c + = c | (HOST_WIDE_INT_M1U << (HOST_BITS_PER_WIDE_INT - lz)); + int n; + if (can_be_rotated_to_negative_li (unmask_c, &n) + || can_be_rotated_to_negative_lis (unmask_c, &n)) + { + *mask = HOST_WIDE_INT_M1U >> lz; + *shift = n == 0 ? 0 : HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + +/* Check if value C can be built by 2 instructions: one is 'li or lis', + another is rldicr. + + If so, *SHIFT is set to the shift operand of rldicr, and *MASK is set to + the mask operand of rldicr, and return true. + Return false otherwise. */ +static bool +can_be_built_by_li_lis_and_rldicr (HOST_WIDE_INT c, int *shift, + HOST_WIDE_INT *mask) +{ + /* Tailing zeros maybe cleaned by rldicr with mask. Change tailing zeros + to ones and then recheck it. */ + int tz = ctz_hwi (c); + HOST_WIDE_INT unmask_c = c | ((HOST_WIDE_INT_1U << tz) - 1); + int n; + if (can_be_rotated_to_negative_li (unmask_c, &n) + || can_be_rotated_to_negative_lis (unmask_c, &n)) + { + *mask = HOST_WIDE_INT_M1U << tz; + *shift = HOST_BITS_PER_WIDE_INT - n; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10347,7 +10400,9 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) emit_move_insn (dest, gen_rtx_XOR (DImode, temp, GEN_INT ((ud2 ^ 0xffff) << 16))); } - else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask)) + else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask) + || can_be_built_by_li_lis_and_rldicl (c, &shift, &mask) + || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask)) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); unsigned HOST_WIDE_INT imm = (c | ~mask); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c index c38a1dd91f2..8c209921d41 100644 --- a/gcc/testsuite/gcc.target/powerpc/const-build.c +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -46,6 +46,42 @@ lis_rotldi_6 (void) return 0x5310000ffffffff8LL; } +long long NOIPA +li_rldicl_7 (void) +{ + return 0x3ffffffa1LL; +} + +long long NOIPA +li_rldicl_8 (void) +{ + return 0xff8531ffffffffLL; +} + +long long NOIPA +lis_rldicl_9 (void) +{ + return 0x00ff85310000ffffLL; +} + +long long NOIPA +li_rldicr_10 (void) +{ + return 0xffff8531fff00000LL; +} + +long long NOIPA +li_rldicr_11 (void) +{ + return 0x21fffffffff00000LL; +} + +long long NOIPA +lis_rldicr_12 (void) +{ + return 0x5310000ffffffff0LL; +} + struct fun arr[] = { {li_rotldi_1, 0x7531000000000LL}, {li_rotldi_2, 0x2100000000000064LL}, @@ -53,9 +89,17 @@ struct fun arr[] = { {li_rotldi_4, 0x21ffffffffffff94LL}, {lis_rotldi_5, 0xffff85310000ffffLL}, {lis_rotldi_6, 0x5310000ffffffff8LL}, + {li_rldicl_7, 0x3ffffffa1LL}, + {li_rldicl_8, 0xff8531ffffffffLL}, + {lis_rldicl_9, 0x00ff85310000ffffLL}, + {li_rldicr_10, 0xffff8531fff00000LL}, + {li_rldicr_11, 0x21fffffffff00000LL}, + {lis_rldicr_12, 0x5310000ffffffff0LL}, }; /* { dg-final { scan-assembler-times {\mrotldi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mrldicl\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldicr\M} 3 } } */ int main () From patchwork Fri Feb 3 10:22:08 2023 Content-Type: text/plain; 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Fri, 3 Feb 2023 10:22:18 GMT Received: from smtprelay04.fra02v.mail.ibm.com ([9.218.2.228]) by ppma02fra.de.ibm.com (PPS) with ESMTPS id 3ncvv6d6r9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 03 Feb 2023 10:22:17 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay04.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 313AMFCJ20644134 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 3 Feb 2023 10:22:15 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A8D3F2004E; Fri, 3 Feb 2023 10:22:15 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8F96D20040; Fri, 3 Feb 2023 10:22:14 +0000 (GMT) Received: from pike.rch.stglabs.ibm.com (unknown [9.5.12.127]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 3 Feb 2023 10:22:14 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, guojiufu@linux.ibm.com Subject: [PATCH 4/4] rs6000: build constant via li/lis;rldic Date: Fri, 3 Feb 2023 18:22:08 +0800 Message-Id: <20230203102208.53215-5-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230203102208.53215-1-guojiufu@linux.ibm.com> References: <20230203102208.53215-1-guojiufu@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: LTea5sfkA4fF0KJlHAausPgxZlkTSudv X-Proofpoint-GUID: y8OdwABYl5vybuk38qwGi9lSYGlB5Klm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-03_06,2023-02-03_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 adultscore=0 bulkscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302030093 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible to be built by "li;rldic". We only need to take care of "negative li", other forms do not need to check. For example, "negative lis" is just a "negative li" with an additional shift. Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk or next stage1? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: Add more tests. --- gcc/config/rs6000/rs6000.cc | 60 ++++++++++++++++++- .../gcc.target/powerpc/const-build.c | 28 +++++++++ 2 files changed, 87 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 025abaa436e..59b4e422058 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10361,6 +10361,63 @@ can_be_built_by_li_lis_and_rldicr (HOST_WIDE_INT c, int *shift, return false; } +/* Check if value C can be built by 2 instructions: one is 'li', another is + rldic. + + If so, *SHIFT is set to the 'shift' operand of rldic; and *MASK is set + to the mask value about the 'mb' operand of rldic; and return true. + Return false otherwise. */ +static bool +can_be_built_by_li_and_rldic (HOST_WIDE_INT c, int *shift, HOST_WIDE_INT *mask) +{ + /* There are 49 successive ones in the negative value of 'li'. */ + int ones = 49; + + /* 1..1xx1..1: negative value of li --> 0..01..1xx0..0: + right bits are shiftted as 0's, and left 1's(and x's) are cleaned. */ + int tz = ctz_hwi (c); + int lz = clz_hwi (c); + int middle_ones = clz_hwi (~(c << lz)); + if (tz + lz + middle_ones >= ones) + { + *mask = ((1LL << (HOST_BITS_PER_WIDE_INT - tz - lz)) - 1LL) << tz; + *shift = tz; + return true; + } + + /* 1..1xx1..1 --> 1..1xx0..01..1: some 1's(following x's) are cleaned. */ + int leading_ones = clz_hwi (~c); + int tailing_ones = ctz_hwi (~c); + int middle_zeros = ctz_hwi (c >> tailing_ones); + if (leading_ones + tailing_ones + middle_zeros >= ones) + { + *mask = ~(((1ULL << middle_zeros) - 1ULL) << tailing_ones); + *shift = tailing_ones + middle_zeros; + return true; + } + + /* xx1..1xx: --> xx0..01..1xx: some 1's(following x's) are cleaned. */ + /* Get the possition for the first bit of sucessive 1. + The 24th bit would be in successive 0 or 1. */ + HOST_WIDE_INT low_mask = (1LL << 24) - 1LL; + int pos_first_1 = ((c & (low_mask + 1)) == 0) + ? clz_hwi (c & low_mask) + : HOST_BITS_PER_WIDE_INT - ctz_hwi (~(c | low_mask)); + middle_ones = clz_hwi (~c << pos_first_1); + middle_zeros = ctz_hwi (c >> (HOST_BITS_PER_WIDE_INT - pos_first_1)); + if (pos_first_1 < HOST_BITS_PER_WIDE_INT + && middle_ones + middle_zeros < HOST_BITS_PER_WIDE_INT + && middle_ones + middle_zeros >= ones) + { + *mask = ~(((1ULL << middle_zeros) - 1LL) + << (HOST_BITS_PER_WIDE_INT - pos_first_1)); + *shift = HOST_BITS_PER_WIDE_INT - pos_first_1 + middle_zeros; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10402,7 +10459,8 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) } else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask) || can_be_built_by_li_lis_and_rldicl (c, &shift, &mask) - || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask)) + || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask) + || can_be_built_by_li_and_rldic (c, &shift, &mask)) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); unsigned HOST_WIDE_INT imm = (c | ~mask); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c index 8c209921d41..b503ee31c7c 100644 --- a/gcc/testsuite/gcc.target/powerpc/const-build.c +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -82,6 +82,29 @@ lis_rldicr_12 (void) return 0x5310000ffffffff0LL; } +long long NOIPA +li_rldic_13 (void) +{ + return 0x000f853100000000LL; +} +long long NOIPA +li_rldic_14 (void) +{ + return 0xffff853100ffffffLL; +} + +long long NOIPA +li_rldic_15 (void) +{ + return 0x800000ffffffff31LL; +} + +long long NOIPA +li_rldic_16 (void) +{ + return 0x800000000fffff31LL; +} + struct fun arr[] = { {li_rotldi_1, 0x7531000000000LL}, {li_rotldi_2, 0x2100000000000064LL}, @@ -95,11 +118,16 @@ struct fun arr[] = { {li_rldicr_10, 0xffff8531fff00000LL}, {li_rldicr_11, 0x21fffffffff00000LL}, {lis_rldicr_12, 0x5310000ffffffff0LL}, + {li_rldic_13, 0x000f853100000000LL}, + {li_rldic_14, 0xffff853100ffffffLL}, + {li_rldic_15, 0x800000ffffffff31LL}, + {li_rldic_16, 0x800000000fffff31LL} }; /* { dg-final { scan-assembler-times {\mrotldi\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldicl\M} 3 } } */ /* { dg-final { scan-assembler-times {\mrldicr\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 4 } } */ int main ()