From patchwork Wed Jan 18 03:06:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 63319 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5EC7B3858C2C for ; Wed, 18 Jan 2023 03:11:43 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 4A1683858D28; Wed, 18 Jan 2023 03:11:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4A1683858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8BxLutbY8djb0ACAA--.6856S3; Wed, 18 Jan 2023 11:11:23 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxTL5WY8djGh4bAA--.52459S2; Wed, 18 Jan 2023 11:11:22 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org, pinskia@gcc.gnu.org, richard.sandiford@arm.com Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, Lulu Cheng , Yang Yujie Subject: [PATCH v6] LoongArch: Fixed a compilation failure with '%c' in inline assembly [PR107731]. Date: Wed, 18 Jan 2023 11:06:56 +0800 Message-Id: <20230118030654.4083983-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8BxTL5WY8djGh4bAA--.52459S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxtrWfZr4rJFW3ZF4ktFWrXwb_yoWxKryUpr srCwn0gF4kCFn3W3WkA3yrurZ8ArsrJrW2ga4ftr92kwnxtryjqF1FyF9FqFWkAa1YqrWj qr47uw18Z3WYyaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b7AYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jrv_JF1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVWUCVW8JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2 IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4U McvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2 IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v2 6r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67 AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IY s7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr 0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8j-e5UUUUU== X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Co-authored-by: Yang Yujie gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_classify_address): Add precessint for CONST_INT. (loongarch_print_operand_reloc): Operand modifier 'c' is supported. (loongarch_print_operand): Increase the processing of '%c'. * doc/extend.texi: Adds documents for LoongArch operand modifiers. And port the public operand modifiers information to this document. gcc/testsuite/ChangeLog: * gcc.target/loongarch/tst-asm-const.c: Moved to... * gcc.target/loongarch/pr107731.c: ...here. --- V2 -> v3: 1. Correct a clerical error. 2. Adding document for loongarch operand modifiers. v3 -> v4: Copy the description of "%c" "%n" "%a" "%l" from gccint.pdf to gcc.pdf. v4 -> v5: Move the operand modifiers description of "%c", "%n", "%a", "%l" to the top of the x86Operandmodifiers section. v5 -> v6: Adjust the location of the added section in the document. --- gcc/config/loongarch/loongarch.cc | 14 +++++ gcc/doc/extend.texi | 51 +++++++++++++++++-- .../loongarch/{tst-asm-const.c => pr107731.c} | 6 +-- 3 files changed, 64 insertions(+), 7 deletions(-) rename gcc/testsuite/gcc.target/loongarch/{tst-asm-const.c => pr107731.c} (78%) diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index c6b03fcf2f9..cdf190b985e 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -2075,6 +2075,11 @@ loongarch_classify_address (struct loongarch_address_info *info, rtx x, return (loongarch_valid_base_register_p (info->reg, mode, strict_p) && loongarch_valid_lo_sum_p (info->symbol_type, mode, info->offset)); + case CONST_INT: + /* Small-integer addresses don't occur very often, but they + are legitimate if $r0 is a valid base register. */ + info->type = ADDRESS_CONST_INT; + return IMM12_OPERAND (INTVAL (x)); default: return false; @@ -4933,6 +4938,7 @@ loongarch_print_operand_reloc (FILE *file, rtx op, bool hi64_part, 'A' Print a _DB suffix if the memory model requires a release. 'b' Print the address of a memory operand, without offset. + 'c' Print an integer. 'C' Print the integer branch condition for comparison OP. 'd' Print CONST_INT OP in decimal. 'F' Print the FPU branch condition for comparison OP. @@ -4979,6 +4985,14 @@ loongarch_print_operand (FILE *file, rtx op, int letter) fputs ("_db", file); break; + case 'c': + if (CONST_INT_P (op)) + fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (op)); + else + output_operand_lossage ("unsupported operand for code '%c'", letter); + + break; + case 'C': loongarch_print_int_branch_condition (file, code, letter); break; diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 1103e9936f7..6a5d9faf2f3 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10402,8 +10402,10 @@ ensures that modifying @var{a} does not affect the address referenced by is undefined if @var{a} is modified before using @var{b}. @code{asm} supports operand modifiers on operands (for example @samp{%k2} -instead of simply @samp{%2}). Typically these qualifiers are hardware -dependent. The list of supported modifiers for x86 is found at +instead of simply @samp{%2}). @ref{GenericOperandmodifiers, +Generic Operand modifiers} lists the modifiers that are available +on all targets. Other modifiers are hardware dependent. +For example, the list of supported modifiers for x86 is found at @ref{x86Operandmodifiers,x86 Operand modifiers}. If the C code that follows the @code{asm} makes no use of any of the output @@ -10671,8 +10673,10 @@ optimizers may discard the @code{asm} statement as unneeded (see @ref{Volatile}). @code{asm} supports operand modifiers on operands (for example @samp{%k2} -instead of simply @samp{%2}). Typically these qualifiers are hardware -dependent. The list of supported modifiers for x86 is found at +instead of simply @samp{%2}). @ref{GenericOperandmodifiers, +Generic Operand modifiers} lists the modifiers that are available +on all targets. Other modifiers are hardware dependent. +For example, the list of supported modifiers for x86 is found at @ref{x86Operandmodifiers,x86 Operand modifiers}. In this example using the fictitious @code{combine} instruction, the @@ -11024,6 +11028,30 @@ lab: @} @end example +@anchor{GenericOperandmodifiers} +@subsubsection Generic Operand Modifiers +@noindent +The following table shows the modifiers supported by all targets and their effects: + +@multitable {Modifier} {Print the opcode suffix for the size of th} {Operand} +@headitem Modifier @tab Description @tab Operand +@item @code{c} +@tab Require a constant operand and print the constant expression with no punctuation. +@tab @code{%c0} +@item @code{n} +@tab Like @samp{%c} except that the value of the constant is negated before printing. +@tab @code{%n0} +@item @code{a} +@tab Substitutes a memory reference, with the actual operand treated as the address. +This may be useful when outputting a ``load address'' instruction, because +often the assembler syntax for such an instruction requires you to write the +operand as if it were a memory reference. +@tab @code{%a0} +@item @code{l} +@tab Print the label name with no punctuation. +@tab @code{%l0} +@end multitable + @anchor{x86Operandmodifiers} @subsubsection x86 Operand Modifiers @@ -11374,6 +11402,21 @@ constant. Used to select the specified bit position. @item @code{x} @tab Equivialent to @code{X}, but only for pointers. @end multitable +@anchor{loongarchOperandmodifiers} +@subsubsection LoongArch Operand Modifiers + +The list below describes the supported modifiers and their effects for LoongArch. + +@multitable @columnfractions .10 .90 +@headitem Modifier @tab Description +@item @code{d} @tab Same as @code{c}. +@item @code{i} @tab Print the character ''@code{i}'' if the operand is not a register. +@item @code{m} @tab Same as @code{c}, but the printed value is @code{operand - 1}. +@item @code{X} @tab Print a constant integer operand in hexadecimal. +@item @code{z} @tab Print the operand in its unmodified form, followed by a comma. +@end multitable + + @lowersections @include md.texi @raisesections diff --git a/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c b/gcc/testsuite/gcc.target/loongarch/pr107731.c similarity index 78% rename from gcc/testsuite/gcc.target/loongarch/tst-asm-const.c rename to gcc/testsuite/gcc.target/loongarch/pr107731.c index 2e04b99e301..80d84c48c6e 100644 --- a/gcc/testsuite/gcc.target/loongarch/tst-asm-const.c +++ b/gcc/testsuite/gcc.target/loongarch/pr107731.c @@ -1,13 +1,13 @@ -/* Test asm const. */ /* { dg-do compile } */ /* { dg-final { scan-assembler-times "foo:.*\\.long 1061109567.*\\.long 52" 1 } } */ + int foo () { __asm__ volatile ( "foo:" "\n\t" - ".long %a0\n\t" - ".long %a1\n\t" + ".long %c0\n\t" + ".long %c1\n\t" : :"i"(0x3f3f3f3f), "i"(52) :