From patchwork Sat Nov 26 02:04:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61115 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8D2513887F5B for ; Sat, 26 Nov 2022 02:05:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8D2513887F5B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669428340; bh=AsprGWoNf7eKHygJV85RKVoDXmOCFsW3sIHXe1eg9Pw=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=wln1fADZy0q0SHtlHrPZbZOmgmz6PEUpL09tE7uKS9F+Y41aZb6YuTjZvtE2RB+ol SuzTp5jiZF7jiJIwSnc7IcxOHapYuqrhtgrXeZkzrSgBKMztClBaAN2OIKm3O2i+G3 1BNf4OqfypPXC7BN7Ql2H84jD6ziha0ZFZRhbNlA= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-oi1-x232.google.com (mail-oi1-x232.google.com [IPv6:2607:f8b0:4864:20::232]) by sourceware.org (Postfix) with ESMTPS id 3F6AD38451B3 for ; Sat, 26 Nov 2022 02:05:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3F6AD38451B3 Received: by mail-oi1-x232.google.com with SMTP id n186so6096734oih.7 for ; Fri, 25 Nov 2022 18:05:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AsprGWoNf7eKHygJV85RKVoDXmOCFsW3sIHXe1eg9Pw=; b=h6AIQdjsTaJD5roicaDDY7eTAzfIqoZryEKKXHRNG/jEecweoM3pyqvxHG/eb5UjDS PSnIpcw6V43T3PVKmLdvAv0tPXSSBiIXkKenDZDnj8MXIR6UQ5yR0sGP/H8GLsurzV1J xQf4foHjg+vg86MyTnkOP6g2mcVyoaAklpachTqZnrF0o/cKkedVYR3AVsw1oWAT1E3C Mhe0Eahz9j+k6Dgj+kr7BueEU2SQZPWGbVzLRmxxX2xwcqzPAx7fizwZ8+s77PiKqsKd PDKeXYszHDhFyxdwCiaD217P8jnbPTyBJpE0S7pOPcvQn8PQfET/w651V92+PIVPug6n AKEQ== X-Gm-Message-State: ANoB5pnT8fKBTxBHKUSKnWh+lIwXhx0kuzH+8wPJfsnmpt99kohWAW2N aVzOOV6yIEfcyWViERVFEnWbpQPf51iApQ== X-Google-Smtp-Source: AA0mqf6tdpMlBXlFaztJhw2EgFyONjVPnGrMIs8aTDydbBSwkn22WI0hB6MHACmXEnb7yJmJATqDcw== X-Received: by 2002:a05:6808:3096:b0:355:ebd:8b3a with SMTP id bl22-20020a056808309600b003550ebd8b3amr19293408oib.117.1669428315692; Fri, 25 Nov 2022 18:05:15 -0800 (PST) Received: from localhost ([2804:14d:7e39:8470:41ee:c7fc:c991:eee6]) by smtp.gmail.com with ESMTPSA id k17-20020a4ae291000000b004805b00b2cdsm2142450oot.28.2022.11.25.18.05.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 18:05:15 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 1/6] gdbserver: Add asserts in register_size and register_data functions Date: Sat, 26 Nov 2022 02:04:47 +0000 Message-Id: <20221126020452.1686509-2-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" These helped me during development, catching bugs closer to when they actually happened. Reviewed-by: Luis Machado --- gdbserver/regcache.cc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/gdbserver/regcache.cc b/gdbserver/regcache.cc index 5cbcea978a05..14236069f712 100644 --- a/gdbserver/regcache.cc +++ b/gdbserver/regcache.cc @@ -286,6 +286,8 @@ register_cache_size (const struct target_desc *tdesc) int register_size (const struct target_desc *tdesc, int n) { + gdb_assert (n >= 0 && n < tdesc->reg_defs.size ()); + return find_register_by_number (tdesc, n).size / 8; } @@ -300,6 +302,8 @@ regcache_register_size (const struct regcache *regcache, int n) static unsigned char * register_data (const struct regcache *regcache, int n) { + gdb_assert(n >= 0 && n < regcache->tdesc->reg_defs.size()); + return (regcache->registers + find_register_by_number (regcache->tdesc, n).offset / 8); } From patchwork Sat Nov 26 02:04:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61117 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BA1C638451B4 for ; Sat, 26 Nov 2022 02:06:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BA1C638451B4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669428368; bh=pUV8ilpkR04I+W0nprHyMN06dhQItQgbh3EbXb3qNwM=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=LSu1UqD1OBEZ5sHJoFUdbyNwQoLncdw8/ayE4XAoIl9Fhv71Gm0XdVVWNOSOi+1cE pcBMfEvzSNXhf/zBGQcKO4uTtZ9QMZo+6iOWTFucXJwAl2oyvzzziJCi3TaB6Up3YD SkvL0hPGHAI/KXzigJwOyBHCTkJsA7pSJY7Pp9HQ= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-oa1-x32.google.com (mail-oa1-x32.google.com [IPv6:2001:4860:4864:20::32]) by sourceware.org (Postfix) with ESMTPS id 5E4E73829987 for ; Sat, 26 Nov 2022 02:05:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5E4E73829987 Received: by mail-oa1-x32.google.com with SMTP id 586e51a60fabf-141ca09c2fbso7009405fac.6 for ; Fri, 25 Nov 2022 18:05:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pUV8ilpkR04I+W0nprHyMN06dhQItQgbh3EbXb3qNwM=; b=uW+MvG6Wr+vXiOOk/K2GRymqU0kphNNx1EAC9que9n5/lcDBeS8osKFo/elWosAce5 SXU1XjmeGq0VMbcgNc5mg/S6bQRa/N5aKQwp/u/GbHXlawmh+Y1MI83lGGjJ9x0cNXhR m5xQWdmScL6LU8Qx7TwCk8oxgkubcxagRorxb1koyAeZELazTyoxtkSn9GanTKsGPUZQ PV6CD2dv9vL68xwVnPim/GSF59o72+buN1g7R1N0Vd4oe6gZIKLLjg6pHpkSoR4CAl7c CXLi7lIsQmDH9JlPRXC6ehwcsFEtrPqezz3Mzhoxidk+1qIK4VBgAcGBBhf5Kec+jgDo pBpw== X-Gm-Message-State: ANoB5pl0PT5LYz/tgUtBeD57Bbn7ofeQ6qih422UOMP+v73Fax5mhktW WPk0EB9vqt8ZkqeUxY6Z0z4S2oCCaSWfLA== X-Google-Smtp-Source: AA0mqf5dwcgUsgiXHbltNtRxsl49Ydp66okg89gy/iby0B4YU+88PEUt9GCtdZ+R45mFoukL+ysncw== X-Received: by 2002:a05:6870:89a1:b0:131:cba0:3b4a with SMTP id f33-20020a05687089a100b00131cba03b4amr22192543oaq.6.1669428318422; Fri, 25 Nov 2022 18:05:18 -0800 (PST) Received: from localhost ([2804:14d:7e39:8470:41ee:c7fc:c991:eee6]) by smtp.gmail.com with ESMTPSA id y36-20020a05687045a400b0013b1301ce42sm2870082oao.47.2022.11.25.18.05.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 18:05:18 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 2/6] gdbserver: Add PID parameter to linux_get_auxv and linux_get_hwcap Date: Sat, 26 Nov 2022 02:04:48 +0000 Message-Id: <20221126020452.1686509-3-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This patch doesn't change gdbserver behaviour, but after later changes are made it avoids a null pointer dereference when HWCAP needs to be obtained for a specific process while current_thread is nullptr. Fixing linux_read_auxv, linux_get_hwcap and linux_get_hwcap2 to take a PID parameter seems more correct than setting current_thread in one particular code path. Changes are propagated to allow passing the new parameter through the call chain. --- gdbserver/linux-aarch64-low.cc | 7 ++++--- gdbserver/linux-arm-low.cc | 2 +- gdbserver/linux-low.cc | 18 +++++++++--------- gdbserver/linux-low.h | 9 ++++----- gdbserver/linux-ppc-low.cc | 6 +++--- gdbserver/linux-s390-low.cc | 2 +- gdbserver/netbsd-low.cc | 4 +--- gdbserver/netbsd-low.h | 2 +- gdbserver/server.cc | 2 +- gdbserver/target.cc | 4 ++-- gdbserver/target.h | 2 +- 11 files changed, 28 insertions(+), 30 deletions(-) diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc index db5086962612..a6ed68f93029 100644 --- a/gdbserver/linux-aarch64-low.cc +++ b/gdbserver/linux-aarch64-low.cc @@ -823,12 +823,13 @@ aarch64_target::low_arch_setup () if (is_elf64) { struct aarch64_features features; + int pid = pid_of (current_thread); features.vq = aarch64_sve_get_vq (tid); /* A-profile PAC is 64-bit only. */ - features.pauth = linux_get_hwcap (8) & AARCH64_HWCAP_PACA; + features.pauth = (linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA); /* A-profile MTE is 64-bit only. */ - features.mte = linux_get_hwcap2 (8) & HWCAP2_MTE; + features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE; features.tls = true; current_process ()->tdesc = aarch64_linux_read_description (features); @@ -3299,7 +3300,7 @@ aarch64_target::supports_memory_tagging () #endif } - return (linux_get_hwcap2 (8) & HWCAP2_MTE) != 0; + return (linux_get_hwcap2 (pid_of (current_thread), 8) & HWCAP2_MTE) != 0; } bool diff --git a/gdbserver/linux-arm-low.cc b/gdbserver/linux-arm-low.cc index a458b0f14a68..1420909626e8 100644 --- a/gdbserver/linux-arm-low.cc +++ b/gdbserver/linux-arm-low.cc @@ -958,7 +958,7 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self) static const struct target_desc * arm_read_description (void) { - unsigned long arm_hwcap = linux_get_hwcap (4); + unsigned long arm_hwcap = linux_get_hwcap (pid_of (current_thread), 4); if (arm_hwcap & HWCAP_IWMMXT) return arm_linux_read_description (ARM_FP_TYPE_IWMMXT); diff --git a/gdbserver/linux-low.cc b/gdbserver/linux-low.cc index a896b37528b6..fc496275d6a3 100644 --- a/gdbserver/linux-low.cc +++ b/gdbserver/linux-low.cc @@ -5480,12 +5480,11 @@ linux_process_target::supports_read_auxv () to debugger memory starting at MYADDR. */ int -linux_process_target::read_auxv (CORE_ADDR offset, unsigned char *myaddr, - unsigned int len) +linux_process_target::read_auxv (int pid, CORE_ADDR offset, + unsigned char *myaddr, unsigned int len) { char filename[PATH_MAX]; int fd, n; - int pid = lwpid_of (current_thread); xsnprintf (filename, sizeof filename, "/proc/%d/auxv", pid); @@ -6979,14 +6978,15 @@ linux_get_pc_64bit (struct regcache *regcache) /* See linux-low.h. */ int -linux_get_auxv (int wordsize, CORE_ADDR match, CORE_ADDR *valp) +linux_get_auxv (int pid, int wordsize, CORE_ADDR match, CORE_ADDR *valp) { gdb_byte *data = (gdb_byte *) alloca (2 * wordsize); int offset = 0; gdb_assert (wordsize == 4 || wordsize == 8); - while (the_target->read_auxv (offset, data, 2 * wordsize) == 2 * wordsize) + while (the_target->read_auxv (pid, offset, data, 2 * wordsize) + == 2 * wordsize) { if (wordsize == 4) { @@ -7016,20 +7016,20 @@ linux_get_auxv (int wordsize, CORE_ADDR match, CORE_ADDR *valp) /* See linux-low.h. */ CORE_ADDR -linux_get_hwcap (int wordsize) +linux_get_hwcap (int pid, int wordsize) { CORE_ADDR hwcap = 0; - linux_get_auxv (wordsize, AT_HWCAP, &hwcap); + linux_get_auxv (pid, wordsize, AT_HWCAP, &hwcap); return hwcap; } /* See linux-low.h. */ CORE_ADDR -linux_get_hwcap2 (int wordsize) +linux_get_hwcap2 (int pid, int wordsize) { CORE_ADDR hwcap2 = 0; - linux_get_auxv (wordsize, AT_HWCAP2, &hwcap2); + linux_get_auxv (pid, wordsize, AT_HWCAP2, &hwcap2); return hwcap2; } diff --git a/gdbserver/linux-low.h b/gdbserver/linux-low.h index 1594f063f47c..182a540f3bb3 100644 --- a/gdbserver/linux-low.h +++ b/gdbserver/linux-low.h @@ -178,7 +178,7 @@ class linux_process_target : public process_stratum_target bool supports_read_auxv () override; - int read_auxv (CORE_ADDR offset, unsigned char *myaddr, + int read_auxv (int pid, CORE_ADDR offset, unsigned char *myaddr, unsigned int len) override; int insert_point (enum raw_bkpt_type type, CORE_ADDR addr, @@ -946,17 +946,16 @@ extern int have_ptrace_getregset; *VALP and return 1. If not found or if there is an error, return 0. */ -int linux_get_auxv (int wordsize, CORE_ADDR match, - CORE_ADDR *valp); +int linux_get_auxv (int pid, int wordsize, CORE_ADDR match, CORE_ADDR *valp); /* Fetch the AT_HWCAP entry from the auxv vector, where entries are length WORDSIZE. If no entry was found, return zero. */ -CORE_ADDR linux_get_hwcap (int wordsize); +CORE_ADDR linux_get_hwcap (int pid, int wordsize); /* Fetch the AT_HWCAP2 entry from the auxv vector, where entries are length WORDSIZE. If no entry was found, return zero. */ -CORE_ADDR linux_get_hwcap2 (int wordsize); +CORE_ADDR linux_get_hwcap2 (int pid, int wordsize); #endif /* GDBSERVER_LINUX_LOW_H */ diff --git a/gdbserver/linux-ppc-low.cc b/gdbserver/linux-ppc-low.cc index 08824887003b..1db20d998ffd 100644 --- a/gdbserver/linux-ppc-low.cc +++ b/gdbserver/linux-ppc-low.cc @@ -894,8 +894,8 @@ ppc_target::low_arch_setup () /* The value of current_process ()->tdesc needs to be set for this call. */ - ppc_hwcap = linux_get_hwcap (features.wordsize); - ppc_hwcap2 = linux_get_hwcap2 (features.wordsize); + ppc_hwcap = linux_get_hwcap (pid_of (current_thread), features.wordsize); + ppc_hwcap2 = linux_get_hwcap2 (pid_of (current_thread), features.wordsize); features.isa205 = ppc_linux_has_isa205 (ppc_hwcap); @@ -1097,7 +1097,7 @@ is_elfv2_inferior (void) const struct target_desc *tdesc = current_process ()->tdesc; int wordsize = register_size (tdesc, 0); - if (!linux_get_auxv (wordsize, AT_PHDR, &phdr)) + if (!linux_get_auxv (pid_of (current_thread), wordsize, AT_PHDR, &phdr)) return def_res; /* Assume ELF header is at the beginning of the page where program headers diff --git a/gdbserver/linux-s390-low.cc b/gdbserver/linux-s390-low.cc index 5adc28070574..2d030a806350 100644 --- a/gdbserver/linux-s390-low.cc +++ b/gdbserver/linux-s390-low.cc @@ -592,7 +592,7 @@ s390_target::low_arch_setup () /* Determine word size and HWCAP. */ int pid = pid_of (current_thread); int wordsize = s390_get_wordsize (pid); - unsigned long hwcap = linux_get_hwcap (wordsize); + unsigned long hwcap = linux_get_hwcap (pid, wordsize); /* Check whether the kernel supports extra register sets. */ int have_regset_last_break diff --git a/gdbserver/netbsd-low.cc b/gdbserver/netbsd-low.cc index f05bcd4e173f..03af80049457 100644 --- a/gdbserver/netbsd-low.cc +++ b/gdbserver/netbsd-low.cc @@ -581,11 +581,9 @@ netbsd_read_auxv(pid_t pid, void *offs, void *addr, size_t len) to debugger memory starting at MYADDR. */ int -netbsd_process_target::read_auxv (CORE_ADDR offset, +netbsd_process_target::read_auxv (int pid, CORE_ADDR offset, unsigned char *myaddr, unsigned int len) { - pid_t pid = pid_of (current_thread); - return netbsd_read_auxv (pid, (void *) (intptr_t) offset, myaddr, len); } diff --git a/gdbserver/netbsd-low.h b/gdbserver/netbsd-low.h index 06b4fd613571..eced7b3dd860 100644 --- a/gdbserver/netbsd-low.h +++ b/gdbserver/netbsd-low.h @@ -77,7 +77,7 @@ class netbsd_process_target : public process_stratum_target bool supports_read_auxv () override; - int read_auxv (CORE_ADDR offset, unsigned char *myaddr, + int read_auxv (int pid, CORE_ADDR offset, unsigned char *myaddr, unsigned int len) override; bool supports_hardware_single_step () override; diff --git a/gdbserver/server.cc b/gdbserver/server.cc index aaef38e00622..63c323071670 100644 --- a/gdbserver/server.cc +++ b/gdbserver/server.cc @@ -1443,7 +1443,7 @@ handle_qxfer_auxv (const char *annex, if (annex[0] != '\0' || current_thread == NULL) return -1; - return the_target->read_auxv (offset, readbuf, len); + return the_target->read_auxv (pid_of (current_thread), offset, readbuf, len); } /* Handle qXfer:exec-file:read. */ diff --git a/gdbserver/target.cc b/gdbserver/target.cc index c06a67600b1f..3651dbb9e862 100644 --- a/gdbserver/target.cc +++ b/gdbserver/target.cc @@ -344,8 +344,8 @@ process_stratum_target::supports_read_auxv () } int -process_stratum_target::read_auxv (CORE_ADDR offset, unsigned char *myaddr, - unsigned int len) +process_stratum_target::read_auxv (int pid, CORE_ADDR offset, + unsigned char *myaddr, unsigned int len) { gdb_assert_not_reached ("target op read_auxv not supported"); } diff --git a/gdbserver/target.h b/gdbserver/target.h index 18ab969dda70..fe7a80b645bc 100644 --- a/gdbserver/target.h +++ b/gdbserver/target.h @@ -175,7 +175,7 @@ class process_stratum_target /* Read auxiliary vector data from the inferior process. Read LEN bytes at OFFSET into a buffer at MYADDR. */ - virtual int read_auxv (CORE_ADDR offset, unsigned char *myaddr, + virtual int read_auxv (int pid, CORE_ADDR offset, unsigned char *myaddr, unsigned int len); /* Returns true if GDB Z breakpoint type TYPE is supported, false From patchwork Sat Nov 26 02:04:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61116 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BBDB43829993 for ; Sat, 26 Nov 2022 02:06:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BBDB43829993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669428368; bh=OLrilDjylr6Kh5rFPGEQzlwCupbN5neUtyyV4LHrl78=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=a83Wf18ZQcU4r2FwgAJz+E8EMXd9HqlYML+HpVUbOt+SQxgzsO6orPo2KoUhHJsXt jkRYtF6TMDwYSb6uPxB2p0+PNDUIxGYc94Bx8MifjZ+yPRf+a3yMpLI5tAB3vnHxnS plI80jB7QGA7ahd0E/KkGK3ZPMpxmq7krgzW4GRA= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-oi1-x229.google.com (mail-oi1-x229.google.com [IPv6:2607:f8b0:4864:20::229]) by sourceware.org (Postfix) with ESMTPS id 2C6B2382EF3A for ; Sat, 26 Nov 2022 02:05:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2C6B2382EF3A Received: by mail-oi1-x229.google.com with SMTP id c129so6144092oia.0 for ; Fri, 25 Nov 2022 18:05:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OLrilDjylr6Kh5rFPGEQzlwCupbN5neUtyyV4LHrl78=; b=2Kn2X7hUloP/ahUZ19PO9VnRzyn/vVD3pe+yuZwj8fU16hpWvJ5/ErmHY5p3DFpHi9 zT18xdjuJvdRkYgZYUBFGkSrBNtRzHe6bbD9C1t1MbdP3P/6mt9TmcFAi4QsDyHKaxBf NOB12eacfSM8gJ08v9zzbLkmnTIyUoLSXl87KzRm9jirSj64zOYiTf/Fp/uKpSjYShzK Y3tb346iz5ik0krk0LJ4AIpgWzevMvEsosctQje8+e44t2KmhBdNKfeyp4ctRKnP17wP HzGt1oLTE+rkg4INiPLj5wbajK2HzWf0qpvU4vra3BYfrQmPwzabseWSYUQmdNF4sUgR a9lw== X-Gm-Message-State: ANoB5pnxN5BTa0K2AkhQgiRkr0t9rOgYIX3Jrpy0dyqM53hQmzw3YkED ZCNDSa8zlIf+wwYcyJbhzuEebMg7RXZ2DQ== X-Google-Smtp-Source: AA0mqf4LqViGIO1CzNYko49fQNwtT0NY7qX8fOKI+gFdpMcJ+Vq4PnZ09/OSnHQiMOj2qypGd/hbOA== X-Received: by 2002:aca:ac43:0:b0:359:fcae:7c3f with SMTP id v64-20020acaac43000000b00359fcae7c3fmr10446344oie.68.1669428321477; Fri, 25 Nov 2022 18:05:21 -0800 (PST) Received: from localhost ([2804:14d:7e39:8470:41ee:c7fc:c991:eee6]) by smtp.gmail.com with ESMTPSA id cb13-20020a056830618d00b00655ca9a109bsm2301435otb.36.2022.11.25.18.05.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 18:05:21 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 3/6] gdbserver/linux-aarch64: Factor out function to get aarch64_features Date: Sat, 26 Nov 2022 02:04:49 +0000 Message-Id: <20221126020452.1686509-4-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" It will be used in a subsequent commit. There's no functional change. Reviewed-by: Luis Machado --- gdbserver/linux-aarch64-low.cc | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc index a6ed68f93029..cab4fc0a4674 100644 --- a/gdbserver/linux-aarch64-low.cc +++ b/gdbserver/linux-aarch64-low.cc @@ -652,6 +652,25 @@ aarch64_target::low_delete_process (arch_process_info *info) xfree (info); } +/* Matches HWCAP_PACA in kernel header arch/arm64/include/uapi/asm/hwcap.h. */ +#define AARCH64_HWCAP_PACA (1 << 30) + +static struct aarch64_features +aarch64_get_arch_features (const thread_info *thread) +{ + struct aarch64_features features; + int pid = pid_of (thread); + + features.vq = aarch64_sve_get_vq (lwpid_of (thread)); + /* A-profile PAC is 64-bit only. */ + features.pauth = linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA; + /* A-profile MTE is 64-bit only. */ + features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE; + features.tls = true; + + return features; +} + void aarch64_target::low_new_thread (lwp_info *lwp) { @@ -804,9 +823,6 @@ aarch64_adjust_register_sets (const struct aarch64_features &features) } } -/* Matches HWCAP_PACA in kernel header arch/arm64/include/uapi/asm/hwcap.h. */ -#define AARCH64_HWCAP_PACA (1 << 30) - /* Implementation of linux target ops method "low_arch_setup". */ void @@ -822,15 +838,8 @@ aarch64_target::low_arch_setup () if (is_elf64) { - struct aarch64_features features; - int pid = pid_of (current_thread); - - features.vq = aarch64_sve_get_vq (tid); - /* A-profile PAC is 64-bit only. */ - features.pauth = (linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA); - /* A-profile MTE is 64-bit only. */ - features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE; - features.tls = true; + struct aarch64_features features + = aarch64_get_arch_features (current_thread); current_process ()->tdesc = aarch64_linux_read_description (features); From patchwork Sat Nov 26 02:04:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61119 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A38F6382FADC for ; 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Fri, 25 Nov 2022 18:05:24 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 4/6] gdbserver/linux-aarch64: When thread stops, update its target description Date: Sat, 26 Nov 2022 02:04:50 +0000 Message-Id: <20221126020452.1686509-5-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This change allows aarch64-linux to support debugging programs where different threads have different SVE vector lengths. It requires gdbserver to support different inferior threads having different target descriptions. The arch_update_tdesc method is added to the linux_process_target class to allow aarch64-linux to probe the inferior's vq register and provide an updated thread target description reflecting the new vector length. After this change, all targets except SVE-supporting aarch64-linux will still use per-process target descriptions. Reviewed-by: Luis Machado --- gdbserver/gdbthread.h | 2 ++ gdbserver/linux-aarch64-low.cc | 37 +++++++++++++++++++++++++++++++++- gdbserver/linux-low.cc | 18 +++++++++++++++++ gdbserver/linux-low.h | 5 +++++ gdbserver/regcache.cc | 11 +++++++--- gdbserver/tdesc.cc | 3 +++ 6 files changed, 72 insertions(+), 4 deletions(-) diff --git a/gdbserver/gdbthread.h b/gdbserver/gdbthread.h index 8b897e73d33b..47b44d03b8e0 100644 --- a/gdbserver/gdbthread.h +++ b/gdbserver/gdbthread.h @@ -80,6 +80,8 @@ struct thread_info /* Branch trace target information for this thread. */ struct btrace_target_info *btrace = nullptr; + + const struct target_desc *tdesc = nullptr; }; extern std::list all_threads; diff --git a/gdbserver/linux-aarch64-low.cc b/gdbserver/linux-aarch64-low.cc index cab4fc0a4674..786ce4071279 100644 --- a/gdbserver/linux-aarch64-low.cc +++ b/gdbserver/linux-aarch64-low.cc @@ -99,6 +99,9 @@ protected: void low_arch_setup () override; + gdb::optional + arch_update_tdesc (const thread_info *thread) override; + bool low_cannot_fetch_register (int regno) override; bool low_cannot_store_register (int regno) override; @@ -184,6 +187,8 @@ struct arch_process_info same for each thread, it is reasonable for the data to live here. */ struct aarch64_debug_reg_state debug_reg_state; + + bool has_sve; }; /* Return true if the size of register 0 is 8 byte. */ @@ -840,8 +845,16 @@ aarch64_target::low_arch_setup () { struct aarch64_features features = aarch64_get_arch_features (current_thread); + const target_desc *tdesc = aarch64_linux_read_description (features); - current_process ()->tdesc = aarch64_linux_read_description (features); + /* Only SVE-enabled inferiors need per-thread target descriptions. */ + if (features.vq > 0) + { + current_thread->tdesc = tdesc; + current_process ()->priv->arch_private->has_sve = true; + } + + current_process ()->tdesc = tdesc; /* Adjust the register sets we should use for this particular set of features. */ @@ -853,6 +866,28 @@ aarch64_target::low_arch_setup () aarch64_linux_get_debug_reg_capacity (lwpid_of (current_thread)); } +/* Implementation of linux target ops method "arch_update_tdesc". */ + +gdb::optional +aarch64_target::arch_update_tdesc (const thread_info *thread) +{ + /* Only processes using SVE need to update the thread's target description. */ + if (!get_thread_process (thread)->priv->arch_private->has_sve) + return {}; + + const struct aarch64_features features = aarch64_get_arch_features (thread); + const struct target_desc *tdesc = aarch64_linux_read_description (features); + + if (tdesc == thread->tdesc) + return {}; + + /* Adjust the register sets we should use for this particular set of + features. */ + aarch64_adjust_register_sets(features); + + return tdesc; +} + /* Implementation of linux target ops method "get_regs_info". */ const regs_info * diff --git a/gdbserver/linux-low.cc b/gdbserver/linux-low.cc index fc496275d6a3..7c510e26f0f5 100644 --- a/gdbserver/linux-low.cc +++ b/gdbserver/linux-low.cc @@ -483,6 +483,12 @@ linux_process_target::arch_setup_thread (thread_info *thread) low_arch_setup (); } +gdb::optional +linux_process_target::arch_update_tdesc (const thread_info *thread) +{ + return {}; +} + int linux_process_target::handle_extended_wait (lwp_info **orig_event_lwp, int wstat) @@ -2348,6 +2354,18 @@ linux_process_target::filter_event (int lwpid, int wstat) return; } } + else + { + /* Give the arch code an opportunity to update the thread's target + description. */ + gdb::optional new_tdesc + = arch_update_tdesc (thread); + if (new_tdesc.has_value ()) + { + regcache_release (); + thread->tdesc = *new_tdesc; + } + } } if (WIFSTOPPED (wstat) && child->must_set_ptrace_flags) diff --git a/gdbserver/linux-low.h b/gdbserver/linux-low.h index 182a540f3bb3..ff14423e9e07 100644 --- a/gdbserver/linux-low.h +++ b/gdbserver/linux-low.h @@ -604,6 +604,11 @@ class linux_process_target : public process_stratum_target /* Architecture-specific setup for the current thread. */ virtual void low_arch_setup () = 0; + /* Allows arch-specific code to update the thread's target description when + the inferior stops. */ + virtual gdb::optional + arch_update_tdesc (const thread_info *thread); + /* Return false if we can fetch/store the register, true if we cannot fetch/store the register. */ virtual bool low_cannot_fetch_register (int regno) = 0; diff --git a/gdbserver/regcache.cc b/gdbserver/regcache.cc index 14236069f712..03ee88b3cfd1 100644 --- a/gdbserver/regcache.cc +++ b/gdbserver/regcache.cc @@ -39,11 +39,16 @@ get_thread_regcache (struct thread_info *thread, int fetch) have. */ if (regcache == NULL) { - struct process_info *proc = get_thread_process (thread); + /* First see if there's a thread-specific target description. */ + const target_desc *tdesc = thread->tdesc; - gdb_assert (proc->tdesc != NULL); + /* If not, get it from the process instead. */ + if (tdesc == nullptr) + tdesc = get_thread_process (thread)->tdesc; - regcache = new_register_cache (proc->tdesc); + gdb_assert (tdesc != nullptr); + + regcache = new_register_cache (tdesc); set_thread_regcache_data (thread, regcache); } diff --git a/gdbserver/tdesc.cc b/gdbserver/tdesc.cc index 5693cc6626fb..3665ab0540d5 100644 --- a/gdbserver/tdesc.cc +++ b/gdbserver/tdesc.cc @@ -129,6 +129,9 @@ current_target_desc (void) if (current_thread == NULL) return &default_description; + if (current_thread->tdesc != nullptr) + return current_thread->tdesc; + return current_process ()->tdesc; } From patchwork Sat Nov 26 02:04:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61118 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A383938451B3 for ; Sat, 26 Nov 2022 02:06:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A383938451B3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669428396; bh=1TcQ2kD+hdzMiaerEbxrg2ui2DFGcnc4+RyccB86tEE=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=uHWPNcJyV2sBxQ9r4deGAuz6NX32hjCKHcXL73eusKman6+J68m6YUiosnP1FF/lA IhFV0b6KNs0pg2446NWiuXUQIwYKFoBceJoIvmFYX+Lwlg2SLeiAasepNmpSNIcE1d tnG5bjPriRby2HaA2P2Vw1UEX7f55WNMzNOdEmBM= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by sourceware.org (Postfix) with ESMTPS id BEF93382EF36 for ; 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Fri, 25 Nov 2022 18:05:27 -0800 (PST) Received: from localhost ([2804:14d:7e39:8470:41ee:c7fc:c991:eee6]) by smtp.gmail.com with ESMTPSA id 67-20020a4a0946000000b0049ef7712ee5sm2136428ooa.11.2022.11.25.18.05.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 18:05:26 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 5/6] gdb/aarch64: Factor out most of the thread_architecture method Date: Sat, 26 Nov 2022 02:04:51 +0000 Message-Id: <20221126020452.1686509-6-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" The same logic will be used by a subsequent commit when remotely debugging an aarch64-linux target. The code isn't changed, just moved around. --- gdb/aarch64-linux-nat.c | 28 ++-------------------------- gdb/aarch64-tdep.c | 35 +++++++++++++++++++++++++++++++++++ gdb/aarch64-tdep.h | 2 ++ 3 files changed, 39 insertions(+), 26 deletions(-) diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index caefcb364852..ca230ea4fdb0 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -884,33 +884,9 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid) /* Find the current gdbarch the same way as process_stratum_target. */ inferior *inf = find_inferior_ptid (this, ptid); gdb_assert (inf != NULL); - - /* If this is a 32-bit architecture, then this is ARM, not AArch64. - There's no SVE vectors here, so just return the inferior - architecture. */ - if (gdbarch_bfd_arch_info (inf->gdbarch)->bits_per_word == 32) - return inf->gdbarch; - - /* Only return it if the current vector length matches the one in the tdep. */ - aarch64_gdbarch_tdep *tdep - = gdbarch_tdep (inf->gdbarch); uint64_t vq = aarch64_sve_get_vq (ptid.lwp ()); - if (vq == tdep->vq) - return inf->gdbarch; - - /* We reach here if the vector length for the thread is different from its - value at process start. Lookup gdbarch via info (potentially creating a - new one) by using a target description that corresponds to the new vq value - and the current architecture features. */ - - const struct target_desc *tdesc = gdbarch_target_desc (inf->gdbarch); - aarch64_features features = aarch64_features_from_target_desc (tdesc); - features.vq = vq; - - struct gdbarch_info info; - info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); - info.target_desc = aarch64_read_description (features); - return gdbarch_find_by_info (info); + + return aarch64_update_gdbarch (inf->gdbarch, vq); } /* Implement the "supports_memory_tagging" target_ops method. */ diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 07330356fdcb..ffc128d91f60 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3486,6 +3486,41 @@ aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum) || regnum == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base)); } +/* Helper function for the "thread_architecture" target_ops method. + + Returns a new gdbarch that is equivalent to the given gdbarch, but with SVE + registers reflecting the given vq value. */ + +struct gdbarch * +aarch64_update_gdbarch (struct gdbarch *gdbarch, uint64_t vq) +{ + /* If this is a 32-bit architecture, then this is ARM, not AArch64. + There's no SVE vectors here, so just return the inferior + architecture. */ + if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) + return gdbarch; + + /* Only return it if the current vector length matches the one in the + tdep. */ + aarch64_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + if (vq == tdep->vq) + return gdbarch; + + /* We reach here if the vector length for the thread is different from its + value at process start. Lookup gdbarch via info (potentially creating a + new one) by using a target description that corresponds to the new vq value + and the current architecture features. */ + + const struct target_desc *tdesc = gdbarch_target_desc (gdbarch); + aarch64_features features = aarch64_features_from_target_desc (tdesc); + features.vq = vq; + + struct gdbarch_info info; + info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64); + info.target_desc = aarch64_read_description (features); + return gdbarch_find_by_info (info); +} + /* Implement the stack_frame_destroyed_p gdbarch method. */ static int diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index 55ccf2e777d2..80b9b3281a2d 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -143,4 +143,6 @@ void aarch64_displaced_step_fixup (struct gdbarch *gdbarch, bool aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch); +struct gdbarch *aarch64_update_gdbarch (struct gdbarch *gdbarch, uint64_t vq); + #endif /* aarch64-tdep.h */ From patchwork Sat Nov 26 02:04:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 61120 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A204A38451B7 for ; Sat, 26 Nov 2022 02:07:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A204A38451B7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1669428424; bh=yxs5m0ICOUI8UResuPr+3K3lWWkmctogWLT2EGjmofw=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=IO8avxK6HA1te67a6kKg+ISoK152IGg/VFgO2gDvl9e+uLT3X/UFy/eSzWr3KVk2V NO20+mCMScPJrybli5B8nPT1qYex05wHahWDUJy6pGd7v0WXmQAJ+MnlVxIBLEsk6A 4QJ1MbNC1rboiNW2BtLcWmf9qA4kWVP2PZbS037c= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-ot1-x333.google.com (mail-ot1-x333.google.com [IPv6:2607:f8b0:4864:20::333]) by sourceware.org (Postfix) with ESMTPS id C3E2F388553D for ; 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Fri, 25 Nov 2022 18:05:30 -0800 (PST) Received: from localhost ([2804:14d:7e39:8470:41ee:c7fc:c991:eee6]) by smtp.gmail.com with ESMTPSA id a22-20020a9d6e96000000b0066c45517c8fsm2291520otr.52.2022.11.25.18.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Nov 2022 18:05:29 -0800 (PST) To: gdb-patches@sourceware.org Cc: Luis Machado , Thiago Jung Bauermann Subject: [PATCH v2 6/6] gdb/aarch64: Detect vector length changes when debugging remotely Date: Sat, 26 Nov 2022 02:04:52 +0000 Message-Id: <20221126020452.1686509-7-thiago.bauermann@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221126020452.1686509-1-thiago.bauermann@linaro.org> References: <20221126020452.1686509-1-thiago.bauermann@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Thiago Jung Bauermann via Gdb-patches From: Thiago Jung Bauermann Reply-To: Thiago Jung Bauermann Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" If the remote target provides an expedited VG register, use it to update the thread's gdbarch. This allows debugging programs that change their SVE vector length during runtime. This is accomplished by implementing the thread_architecture method in remote_target, which returns the gdbarch corresponding to the expedited registers provided by the last stop reply. To allow changing the architecture based on the expedited registers, add a new gdbarch method to allow arch-specific code to make the adjustment. Reviewed-by: Luis Machado --- gdb/aarch64-tdep.c | 26 +++++++++++++++++++++++- gdb/arch-utils.c | 9 +++++++++ gdb/arch-utils.h | 5 +++++ gdb/gdbarch-components.py | 16 +++++++++++++++ gdb/gdbarch-gen.h | 11 ++++++++++ gdb/gdbarch.c | 22 ++++++++++++++++++++ gdb/remote.c | 42 +++++++++++++++++++++++++++++++++++++++ 7 files changed, 130 insertions(+), 1 deletion(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index ffc128d91f60..764f693aee8d 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -3486,7 +3486,8 @@ aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum) || regnum == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base)); } -/* Helper function for the "thread_architecture" target_ops method. +/* Helper function for both the "update_architecture" gdbarch method and the + "thread_architecture" target_ops method. Returns a new gdbarch that is equivalent to the given gdbarch, but with SVE registers reflecting the given vq value. */ @@ -3521,6 +3522,28 @@ aarch64_update_gdbarch (struct gdbarch *gdbarch, uint64_t vq) return gdbarch_find_by_info (info); } +/* Implement the "update_architecture" gdbarch method. */ + +static struct gdbarch * +aarch64_update_architecture (struct gdbarch *gdbarch, + const std::vector ®cache) +{ + /* Look for the VG register. */ + auto it = find_if (regcache.cbegin (), regcache.cend (), + [] (const cached_reg_t ®) { + return reg.num == AARCH64_SVE_VG_REGNUM; + }); + + /* No VG register was provided. Don't change gdbarch. */ + if (it == regcache.cend ()) + return gdbarch; + + ULONGEST vg = extract_unsigned_integer (it->data, 8, + gdbarch_byte_order (gdbarch)); + + return aarch64_update_gdbarch (gdbarch, sve_vq_from_vg (vg)); +} + /* Implement the stack_frame_destroyed_p gdbarch method. */ static int @@ -3742,6 +3765,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_tdesc_pseudo_register_reggroup_p (gdbarch, aarch64_pseudo_register_reggroup_p); set_gdbarch_cannot_store_register (gdbarch, aarch64_cannot_store_register); + set_gdbarch_update_architecture (gdbarch, aarch64_update_architecture); /* ABI */ set_gdbarch_short_bit (gdbarch, 16); diff --git a/gdb/arch-utils.c b/gdb/arch-utils.c index 7b84daf046e2..2315aacb4bbe 100644 --- a/gdb/arch-utils.c +++ b/gdb/arch-utils.c @@ -1090,6 +1090,15 @@ default_get_return_buf_addr (struct type *val_type, frame_info_ptr cur_frame) return 0; } +/* See arch-utils.h. */ + +struct gdbarch * +default_update_architecture (struct gdbarch *gdbarch, + const std::vector ®cache) +{ + return gdbarch; +} + /* Non-zero if we want to trace architecture code. */ #ifndef GDBARCH_DEBUG diff --git a/gdb/arch-utils.h b/gdb/arch-utils.h index 46018a6fbbb6..e68a91f6753d 100644 --- a/gdb/arch-utils.h +++ b/gdb/arch-utils.h @@ -304,4 +304,9 @@ extern void default_read_core_file_mappings /* Default implementation of gdbarch default_get_return_buf_addr method. */ extern CORE_ADDR default_get_return_buf_addr (struct type *val_typegdbarch, frame_info_ptr cur_frame); + +/* Default implementation of gdbarch update_architecture method. */ +extern struct gdbarch * +default_update_architecture (struct gdbarch *gdbarch, + const std::vector ®cache); #endif /* ARCH_UTILS_H */ diff --git a/gdb/gdbarch-components.py b/gdb/gdbarch-components.py index 9b688998a7bd..fbb32c5e5853 100644 --- a/gdb/gdbarch-components.py +++ b/gdb/gdbarch-components.py @@ -2698,3 +2698,19 @@ Read core file mappings predefault="default_read_core_file_mappings", invalid=False, ) + +Method( + comment=""" +An architecture may change based on the current contents of its registers. +For instance, the length of the vector registers in AArch64's Scalable Vector +Extension is given by the contents of the VL pseudo-register. + +This method allows an architecture to provide a new gdbarch corresponding to +the registers in the given regcache. +""", + type="struct gdbarch *", + name="update_architecture", + params=[("const std::vector &", "regcache")], + predefault="default_update_architecture", + invalid=False, +) diff --git a/gdb/gdbarch-gen.h b/gdb/gdbarch-gen.h index a663316df166..a65699e7241f 100644 --- a/gdb/gdbarch-gen.h +++ b/gdb/gdbarch-gen.h @@ -1649,3 +1649,14 @@ extern void set_gdbarch_get_pc_address_flags (struct gdbarch *gdbarch, gdbarch_g typedef void (gdbarch_read_core_file_mappings_ftype) (struct gdbarch *gdbarch, struct bfd *cbfd, read_core_file_mappings_pre_loop_ftype pre_loop_cb, read_core_file_mappings_loop_ftype loop_cb); extern void gdbarch_read_core_file_mappings (struct gdbarch *gdbarch, struct bfd *cbfd, read_core_file_mappings_pre_loop_ftype pre_loop_cb, read_core_file_mappings_loop_ftype loop_cb); extern void set_gdbarch_read_core_file_mappings (struct gdbarch *gdbarch, gdbarch_read_core_file_mappings_ftype *read_core_file_mappings); + +/* An architecture may change based on the current contents of its registers. + For instance, the length of the vector registers in AArch64's Scalable Vector + Extension is given by the contents of the VL pseudo-register. + + This method allows an architecture to provide a new gdbarch corresponding to + the registers in the given regcache. */ + +typedef struct gdbarch * (gdbarch_update_architecture_ftype) (struct gdbarch *gdbarch, const std::vector ®cache); +extern struct gdbarch * gdbarch_update_architecture (struct gdbarch *gdbarch, const std::vector ®cache); +extern void set_gdbarch_update_architecture (struct gdbarch *gdbarch, gdbarch_update_architecture_ftype *update_architecture); diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index 3227e9458801..1b0a2c70db4c 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -255,6 +255,7 @@ struct gdbarch gdbarch_type_align_ftype *type_align = default_type_align; gdbarch_get_pc_address_flags_ftype *get_pc_address_flags = default_get_pc_address_flags; gdbarch_read_core_file_mappings_ftype *read_core_file_mappings = default_read_core_file_mappings; + gdbarch_update_architecture_ftype *update_architecture = default_update_architecture; }; /* Create a new ``struct gdbarch'' based on information provided by @@ -514,6 +515,7 @@ verify_gdbarch (struct gdbarch *gdbarch) /* Skip verify of type_align, invalid_p == 0 */ /* Skip verify of get_pc_address_flags, invalid_p == 0 */ /* Skip verify of read_core_file_mappings, invalid_p == 0 */ + /* Skip verify of update_architecture, invalid_p == 0 */ if (!log.empty ()) internal_error (_("verify_gdbarch: the following are invalid ...%s"), log.c_str ()); @@ -1352,6 +1354,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file) gdb_printf (file, "gdbarch_dump: read_core_file_mappings = <%s>\n", host_address_to_string (gdbarch->read_core_file_mappings)); + gdb_printf (file, + "gdbarch_dump: update_architecture = <%s>\n", + host_address_to_string (gdbarch->update_architecture)); if (gdbarch->dump_tdep != NULL) gdbarch->dump_tdep (gdbarch, file); } @@ -5314,3 +5319,20 @@ set_gdbarch_read_core_file_mappings (struct gdbarch *gdbarch, { gdbarch->read_core_file_mappings = read_core_file_mappings; } + +struct gdbarch * +gdbarch_update_architecture (struct gdbarch *gdbarch, const std::vector ®cache) +{ + gdb_assert (gdbarch != NULL); + gdb_assert (gdbarch->update_architecture != NULL); + if (gdbarch_debug >= 2) + gdb_printf (gdb_stdlog, "gdbarch_update_architecture called\n"); + return gdbarch->update_architecture (gdbarch, regcache); +} + +void +set_gdbarch_update_architecture (struct gdbarch *gdbarch, + gdbarch_update_architecture_ftype update_architecture) +{ + gdbarch->update_architecture = update_architecture; +} diff --git a/gdb/remote.c b/gdb/remote.c index 5118ecd0a312..eb60ed51585b 100644 --- a/gdb/remote.c +++ b/gdb/remote.c @@ -491,6 +491,8 @@ class remote_target : public process_stratum_target gdb::byte_vector thread_info_to_thread_handle (struct thread_info *tp) override; + struct gdbarch *thread_architecture (ptid_t ptid) override; + void stop (ptid_t) override; void interrupt () override; @@ -1150,6 +1152,10 @@ struct remote_thread_info : public private_thread_info to stop for a watchpoint. */ CORE_ADDR watch_data_address = 0; + /* The architecture corresponding to the expedited registers returned + in the last stop reply. */ + struct gdbarch *expedited_arch = nullptr; + /* Get the thread's resume state. */ enum resume_state get_resume_state () const { @@ -1168,6 +1174,8 @@ struct remote_thread_info : public private_thread_info m_resume_state = resume_state::RESUMED_PENDING_VCONT; m_resumed_pending_vcont_info.step = step; m_resumed_pending_vcont_info.sig = sig; + + expedited_arch = nullptr; } /* Get the information this thread's pending vCont-resumption. @@ -1185,6 +1193,8 @@ struct remote_thread_info : public private_thread_info void set_resumed () { m_resume_state = resume_state::RESUMED; + + expedited_arch = nullptr; } private: @@ -8068,6 +8078,21 @@ remote_target::process_stop_reply (struct stop_reply *stop_reply, /* Expedited registers. */ if (!stop_reply->regcache.empty ()) { + /* If GDB already knows about this thread, we can give the + architecture-specific code a chance to update the gdbarch based on + the expedited registers. */ + if (find_thread_ptid (this, ptid) != nullptr) + { + stop_reply->arch = gdbarch_update_architecture (stop_reply->arch, + stop_reply->regcache); + + /* Save stop_reply->arch so that it can be returned by the + thread_architecture method. */ + remote_thread_info *remote_thr = get_remote_thread_info (this, + ptid); + remote_thr->expedited_arch = stop_reply->arch; + } + struct regcache *regcache = get_thread_arch_regcache (this, ptid, stop_reply->arch); @@ -14382,6 +14407,23 @@ remote_target::thread_info_to_thread_handle (struct thread_info *tp) return priv->thread_handle; } +struct gdbarch * +remote_target::thread_architecture (ptid_t ptid) +{ + thread_info *thr = find_thread_ptid (this, ptid); + remote_thread_info *remote_thr = nullptr; + + if (thr != nullptr) + remote_thr = get_remote_thread_info (thr); + + if (remote_thr == nullptr || remote_thr->expedited_arch == nullptr) + /* The default thread_architecture implementation is the one from + process_stratum_target. */ + return process_stratum_target::thread_architecture(ptid); + + return remote_thr->expedited_arch; +} + bool remote_target::can_async_p () {