From patchwork Fri Nov 18 15:52:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 60835 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2230A384F6F2 for ; Fri, 18 Nov 2022 15:54:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2230A384F6F2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1668786856; bh=eWDbOhGl0260y12L2S4Bq3J8QRbJZj/p+pqdHBr4YLg=; h=To:CC:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=XxzE3Cc7gNcV9N+JfnDgEi5M4uBWnWpJr5XmC6UcY2QX2+iUxgw/ZMq5NIiuJpXrs ZPV+l7nOotD17W7bwrle5rDy3AlC5jQT4PDUU8oXRxpPxK5kiDi9ggRS8PCPV46iW1 yra4WftRtNFjvrtgw1ytcipa+FFEyvhP4VdNMcp0= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id A4D033857C51 for ; Fri, 18 Nov 2022 15:53:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A4D033857C51 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AICUqeP006454; Fri, 18 Nov 2022 16:53:45 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3kx0qecs1s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 18 Nov 2022 16:53:45 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2A832100034; Fri, 18 Nov 2022 16:53:40 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 04EE423C68D; Fri, 18 Nov 2022 16:53:40 +0100 (CET) Received: from jkgcxl0002.jkg.st.com (10.210.54.218) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Fri, 18 Nov 2022 16:53:39 +0100 To: CC: , , =?utf-8?q?Torbj=C3=B6rn_SVENS?= =?utf-8?q?SON?= Subject: [PATCH v2 1/4] gdb/arm: Update active msp/psp when switching stack Date: Fri, 18 Nov 2022 16:52:50 +0100 Message-ID: <20221118155252.113476-2-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> References: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_04,2022-11-18_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" For targets with secext, msp and psp can be seen as an alias for one of msp_s, msp_ns, psp_s or psp_ns. When switching active sp, the coresponding msp/psp needs to be switched too. Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 7cb3f5f3050..124a94dc87d 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -504,8 +504,23 @@ arm_cache_switch_prev_sp (struct arm_prologue_cache *cache, gdb_assert (arm_is_alternative_sp_register (tdep, sp_regnum)); if (tdep->have_sec_ext) - gdb_assert (sp_regnum != tdep->m_profile_msp_regnum - && sp_regnum != tdep->m_profile_psp_regnum); + { + gdb_assert (sp_regnum != tdep->m_profile_msp_regnum + && sp_regnum != tdep->m_profile_psp_regnum); + + if (sp_regnum == tdep->m_profile_msp_s_regnum + || sp_regnum == tdep->m_profile_psp_s_regnum) + { + cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; + cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; + } + else if (sp_regnum == tdep->m_profile_msp_ns_regnum + || sp_regnum == tdep->m_profile_psp_ns_regnum) + { + cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum; + cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum; + } + } cache->active_sp_regnum = sp_regnum; } From patchwork Fri Nov 18 15:52:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 60834 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D5DA3384D99C for ; Fri, 18 Nov 2022 15:54:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D5DA3384D99C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1668786855; bh=//pA12FaD48pFNBO3sdvFu1z7viZ4lOReT41xjwTrUs=; h=To:CC:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=kLHNwzW8NEJOZVEQIr+swq22mP+mMP5Ctfucq7Nm/LQ/DFw2DivdJlNJ5Q/eXkSbJ hqJPDbiTVRe3TQlQ4SeCls2vt2kjUMEphn3qIhz6dmuu2QziXGxzJrP/UiSvlE5RiD n4RtjDzfHNGlafebRp23yYrLzGzTWXopWfkduKQI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id A46C3385841C for ; Fri, 18 Nov 2022 15:53:47 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A46C3385841C Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AICElqF025082; Fri, 18 Nov 2022 16:53:45 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3kx0my4shn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 18 Nov 2022 16:53:45 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 73A4D100039; Fri, 18 Nov 2022 16:53:40 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 6D23223C691; Fri, 18 Nov 2022 16:53:40 +0100 (CET) Received: from jkgcxl0002.jkg.st.com (10.210.54.218) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Fri, 18 Nov 2022 16:53:40 +0100 To: CC: , , =?utf-8?q?Torbj=C3=B6rn_SVENS?= =?utf-8?q?SON?= Subject: [PATCH v2 2/4] gdb/arm: Ensure that stack pointers are in sync Date: Fri, 18 Nov 2022 16:52:51 +0100 Message-ID: <20221118155252.113476-3-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> References: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_04,2022-11-18_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Without this patch, sp might be secure, but msp or psp is non-secure (this state can not happen in the hardware). Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 86 ++++++++++++++++++++++++++++++++++---------------- 1 file changed, 58 insertions(+), 28 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 124a94dc87d..c011b2aa973 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -324,20 +324,6 @@ reconstruct_t_bit(struct gdbarch *gdbarch, CORE_ADDR lr, ULONGEST psr) return psr; } -/* Initialize stack pointers, and flag the active one. */ - -static inline void -arm_cache_init_sp (int regnum, CORE_ADDR* member, - struct arm_prologue_cache *cache, - frame_info_ptr frame) -{ - CORE_ADDR val = get_frame_register_unsigned (frame, regnum); - if (val == cache->sp) - cache->active_sp_regnum = regnum; - - *member = val; -} - /* Initialize CACHE fields for which zero is not adequate (CACHE is expected to have been ZALLOC'ed before calling this function). */ @@ -362,34 +348,78 @@ arm_cache_init (struct arm_prologue_cache *cache, frame_info_ptr frame) if (tdep->have_sec_ext) { - CORE_ADDR msp_val = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum); - CORE_ADDR psp_val = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum); - - arm_cache_init_sp (tdep->m_profile_msp_s_regnum, &cache->msp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_s_regnum, &cache->psp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_msp_ns_regnum, &cache->msp_ns, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_ns_regnum, &cache->psp_ns, cache, frame); - + const CORE_ADDR msp_val + = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum); + const CORE_ADDR psp_val + = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum); + + cache->msp_s + = get_frame_register_unsigned (frame, tdep->m_profile_msp_s_regnum); + cache->msp_ns + = get_frame_register_unsigned (frame, tdep->m_profile_msp_ns_regnum); + cache->psp_s + = get_frame_register_unsigned (frame, tdep->m_profile_psp_s_regnum); + cache->psp_ns + = get_frame_register_unsigned (frame, tdep->m_profile_psp_ns_regnum); + + /* Identify what msp is alias for (msp_s or msp_ns). */ if (msp_val == cache->msp_s) cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; else if (msp_val == cache->msp_ns) cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum; + else + { + warning (_("Invalid state, unable to determine msp alias.")); + cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; + } + + /* Identify what psp is alias for (psp_s or psp_ns). */ if (psp_val == cache->psp_s) cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; else if (psp_val == cache->psp_ns) cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum; + else + { + warning (_("Invalid state, unable to determine psp alias.")); + cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; + } - /* Use MSP_S as default stack pointer. */ - if (cache->active_sp_regnum == ARM_SP_REGNUM) - cache->active_sp_regnum = tdep->m_profile_msp_s_regnum; + /* Identify what sp is alias for (msp_s, msp_ns, psp_s or psp_ns). */ + if (msp_val == cache->sp) + cache->active_sp_regnum = cache->active_msp_regnum; + else if (psp_val == cache->sp) + cache->active_sp_regnum = cache->active_psp_regnum; + else + { + warning (_("Invalid state, unable to determine sp alias.")); + cache->active_sp_regnum = cache->active_msp_regnum; + } } else if (tdep->is_m) { - arm_cache_init_sp (tdep->m_profile_msp_regnum, &cache->msp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_regnum, &cache->psp_s, cache, frame); + cache->msp_s + = get_frame_register_unsigned (frame, tdep->m_profile_msp_s_regnum); + cache->psp_s + = get_frame_register_unsigned (frame, tdep->m_profile_psp_s_regnum); + + /* Identify what sp is alias for (msp or psp). */ + if (cache->msp_s == cache->sp) + cache->active_sp_regnum = tdep->m_profile_msp_regnum; + else if (cache->psp_s == cache->sp) + cache->active_sp_regnum = tdep->m_profile_psp_regnum; + else + { + warning (_("Invalid state, unable to determine sp alias.")); + cache->active_sp_regnum = tdep->m_profile_msp_regnum; + } } else - arm_cache_init_sp (ARM_SP_REGNUM, &cache->msp_s, cache, frame); + { + cache->msp_s + = get_frame_register_unsigned (frame, ARM_SP_REGNUM); + + cache->active_sp_regnum = ARM_SP_REGNUM; + } } /* Return the requested stack pointer value (in REGNUM), taking into From patchwork Fri Nov 18 15:52:52 2022 Content-Type: text/plain; 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Fri, 18 Nov 2022 16:53:40 +0100 To: CC: , , =?utf-8?q?Torbj=C3=B6rn_SVENS?= =?utf-8?q?SON?= , Yvan Roux Subject: [PATCH v2 3/4] gdb: dwarf2 generic implementation for caching function data Date: Fri, 18 Nov 2022 16:52:52 +0100 Message-ID: <20221118155252.113476-4-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> References: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_04,2022-11-18_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" When there is no dwarf2 data for a register, a function can be called to provide the value of this register. In some situations, it might not be trivial to determine the value to return and it would cause a performance bottleneck to do the computation each time. This patch allows the called function to have a "cache" object that it can use to store some metadata between calls to reduce the performance impact of the complex logic. The cache object is unique for each function and frame, so if there are more than one function pointer stored in the dwarf2_frame_cache->reg array, then the appropriate pointer will be supplied (the type is not known by the dwarf2 implementation). dwarf2_frame_get_fn_data can be used to retrieve the function unique cache object. dwarf2_frame_allocate_fn_data can be used to allocate and retrieve the function unqiue cache object. Signed-off-by: Torbjörn SVENSSON Signed-off-by: Yvan Roux --- gdb/dwarf2/frame.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ gdb/dwarf2/frame.h | 20 +++++++++++++++++-- 2 files changed, 66 insertions(+), 2 deletions(-) diff --git a/gdb/dwarf2/frame.c b/gdb/dwarf2/frame.c index 3f884abe1d5..bff3b706e7e 100644 --- a/gdb/dwarf2/frame.c +++ b/gdb/dwarf2/frame.c @@ -831,6 +831,14 @@ dwarf2_fetch_cfa_info (struct gdbarch *gdbarch, CORE_ADDR pc, } +struct dwarf2_frame_fn_data +{ + struct value *(*fn) (frame_info_ptr this_frame, void **this_cache, + int regnum); + void *data; + struct dwarf2_frame_fn_data* next; +}; + struct dwarf2_frame_cache { /* DWARF Call Frame Address. */ @@ -862,6 +870,8 @@ struct dwarf2_frame_cache dwarf2_tailcall_frame_unwind unwinder so this field does not apply for them. */ void *tailcall_cache; + + struct dwarf2_frame_fn_data *fn_data; }; static struct dwarf2_frame_cache * @@ -1221,6 +1231,44 @@ dwarf2_frame_prev_register (frame_info_ptr this_frame, void **this_cache, } } +void *dwarf2_frame_get_fn_data (frame_info_ptr this_frame, void **this_cache, + fn_prev_register fn) +{ + struct dwarf2_frame_fn_data *fn_data = nullptr; + struct dwarf2_frame_cache *cache + = dwarf2_frame_cache (this_frame, this_cache); + + /* Find the object for the function. */ + for (fn_data = cache->fn_data; fn_data; fn_data = fn_data->next) + if (fn_data->fn == fn) + return fn_data->data; + + return nullptr; +} + +void *dwarf2_frame_allocate_fn_data (frame_info_ptr this_frame, + void **this_cache, + fn_prev_register fn, unsigned long size) +{ + struct dwarf2_frame_fn_data *fn_data = nullptr; + struct dwarf2_frame_cache *cache + = dwarf2_frame_cache (this_frame, this_cache); + + /* First try to find an existing object. */ + void *data = dwarf2_frame_get_fn_data (this_frame, this_cache, fn); + if (data) + return data; + + /* No object found, lets create a new instance. */ + fn_data = FRAME_OBSTACK_ZALLOC (struct dwarf2_frame_fn_data); + fn_data->fn = fn; + fn_data->data = frame_obstack_zalloc (size); + fn_data->next = cache->fn_data; + cache->fn_data = fn_data; + + return fn_data->data; +} + /* Proxy for tailcall_frame_dealloc_cache for bottom frame of a virtual tail call frames chain. */ diff --git a/gdb/dwarf2/frame.h b/gdb/dwarf2/frame.h index 06c8a10c178..444afd9f8eb 100644 --- a/gdb/dwarf2/frame.h +++ b/gdb/dwarf2/frame.h @@ -66,6 +66,9 @@ enum dwarf2_frame_reg_rule /* Register state. */ +typedef struct value *(*fn_prev_register) (frame_info_ptr this_frame, + void **this_cache, int regnum); + struct dwarf2_frame_state_reg { /* Each register save state can be described in terms of a CFA slot, @@ -78,8 +81,7 @@ struct dwarf2_frame_state_reg const gdb_byte *start; ULONGEST len; } exp; - struct value *(*fn) (frame_info_ptr this_frame, void **this_cache, - int regnum); + fn_prev_register fn; } loc; enum dwarf2_frame_reg_rule how; }; @@ -262,4 +264,18 @@ extern int dwarf2_fetch_cfa_info (struct gdbarch *gdbarch, CORE_ADDR pc, const gdb_byte **cfa_start_out, const gdb_byte **cfa_end_out); + +/* Allocate a new instance of the function unique data. */ + +extern void *dwarf2_frame_allocate_fn_data (frame_info_ptr this_frame, + void **this_cache, + fn_prev_register fn, + unsigned long size); + +/* Retrieve the function unique data for this frame. */ + +extern void *dwarf2_frame_get_fn_data (frame_info_ptr this_frame, + void **this_cache, + fn_prev_register fn); + #endif /* dwarf2-frame.h */ From patchwork Fri Nov 18 15:52:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 60837 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5F8603852C66 for ; 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Fri, 18 Nov 2022 16:53:45 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3kx0ph4t0a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 18 Nov 2022 16:53:45 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 577D110003A; Fri, 18 Nov 2022 16:53:41 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 50CEA23C68D; Fri, 18 Nov 2022 16:53:41 +0100 (CET) Received: from jkgcxl0002.jkg.st.com (10.210.54.218) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Fri, 18 Nov 2022 16:53:40 +0100 To: CC: , , =?utf-8?q?Torbj=C3=B6rn_SVENS?= =?utf-8?q?SON?= , Yvan Roux Subject: [PATCH v2 4/4] gdb/arm: Use new dwarf2 function cache Date: Fri, 18 Nov 2022 16:52:53 +0100 Message-ID: <20221118155252.113476-5-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> References: <20221118155252.113476-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-18_04,2022-11-18_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This patch resolves the performance issue reported in pr/29738 by caching the values for the stack pointers for the inner frame. By doing so, the impact can be reduced to checking the state and returning the appropriate value. Signed-off-by: Torbjörn SVENSSON Signed-off-by: Yvan Roux --- gdb/arm-tdep.c | 96 +++++++++++++++++++++++++++++++++----------------- 1 file changed, 64 insertions(+), 32 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index c011b2aa973..59cd0964d96 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3953,6 +3953,18 @@ struct frame_base arm_normal_base = { arm_normal_frame_base }; +struct arm_dwarf2_prev_register_cache +{ + /* Cached value of the coresponding stack pointer for the inner frame. */ + CORE_ADDR sp; + CORE_ADDR msp; + CORE_ADDR msp_s; + CORE_ADDR msp_ns; + CORE_ADDR psp; + CORE_ADDR psp_s; + CORE_ADDR psp_ns; +}; + static struct value * arm_dwarf2_prev_register (frame_info_ptr this_frame, void **this_cache, int regnum) @@ -3961,6 +3973,48 @@ arm_dwarf2_prev_register (frame_info_ptr this_frame, void **this_cache, arm_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); CORE_ADDR lr; ULONGEST cpsr; + struct arm_dwarf2_prev_register_cache *cache + = (struct arm_dwarf2_prev_register_cache *) dwarf2_frame_get_fn_data ( + this_frame, this_cache, arm_dwarf2_prev_register); + + if (!cache) + { + const unsigned int size = sizeof (struct arm_dwarf2_prev_register_cache); + cache = (struct arm_dwarf2_prev_register_cache *) + dwarf2_frame_allocate_fn_data (this_frame, this_cache, + arm_dwarf2_prev_register, size); + + if (tdep->have_sec_ext) + { + cache->sp + = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); + + cache->msp_s + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_s_regnum); + cache->msp_ns + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_ns_regnum); + cache->psp_s + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_s_regnum); + cache->psp_ns + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_ns_regnum); + } + else if (tdep->is_m) + { + cache->sp + = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); + + cache->msp + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_regnum); + cache->psp + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_regnum); + } + } if (regnum == ARM_PC_REGNUM) { @@ -4000,33 +4054,18 @@ arm_dwarf2_prev_register (frame_info_ptr this_frame, void **this_cache, if (tdep->have_sec_ext) { - CORE_ADDR sp - = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); - CORE_ADDR msp_s - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_s_regnum); - CORE_ADDR msp_ns - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_ns_regnum); - CORE_ADDR psp_s - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_s_regnum); - CORE_ADDR psp_ns - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_ns_regnum); - bool is_msp = (regnum == tdep->m_profile_msp_regnum) - && (msp_s == sp || msp_ns == sp); + && (cache->msp_s == cache->sp || cache->msp_ns == cache->sp); bool is_msp_s = (regnum == tdep->m_profile_msp_s_regnum) - && (msp_s == sp); + && (cache->msp_s == cache->sp); bool is_msp_ns = (regnum == tdep->m_profile_msp_ns_regnum) - && (msp_ns == sp); + && (cache->msp_ns == cache->sp); bool is_psp = (regnum == tdep->m_profile_psp_regnum) - && (psp_s == sp || psp_ns == sp); + && (cache->psp_s == cache->sp || cache->psp_ns == cache->sp); bool is_psp_s = (regnum == tdep->m_profile_psp_s_regnum) - && (psp_s == sp); + && (cache->psp_s == cache->sp); bool is_psp_ns = (regnum == tdep->m_profile_psp_ns_regnum) - && (psp_ns == sp); + && (cache->psp_ns == cache->sp); override_with_sp_value = is_msp || is_msp_s || is_msp_ns || is_psp || is_psp_s || is_psp_ns; @@ -4034,17 +4073,10 @@ arm_dwarf2_prev_register (frame_info_ptr this_frame, void **this_cache, } else if (tdep->is_m) { - CORE_ADDR sp - = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); - CORE_ADDR msp - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_regnum); - CORE_ADDR psp - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_regnum); - - bool is_msp = (regnum == tdep->m_profile_msp_regnum) && (sp == msp); - bool is_psp = (regnum == tdep->m_profile_psp_regnum) && (sp == psp); + bool is_msp = (regnum == tdep->m_profile_msp_regnum) + && (cache->sp == cache->msp); + bool is_psp = (regnum == tdep->m_profile_psp_regnum) + && (cache->sp == cache->psp); override_with_sp_value = is_msp || is_psp; }