From patchwork Sat Nov 12 05:07:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 60477 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 419F23858025 for ; Sat, 12 Nov 2022 05:08:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 419F23858025 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1668229716; bh=5goOWz0mEJFuBhtOW16zyw2CQSpY0t4MVenS5UhwRWc=; h=Date:To:Subject:References:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=p9JoSkRXMTWm9Qu/eR4Ec4vzZoffi40E+Umr0p7w8hlR/4kwsLOzhUgL0wIhgz5E6 MwRdazF13mDcCe0cBdDlnwaSGCQoKKFOba/4+iAfhA2WVBF5YdZaN1QHFZt8G23Vpj RWBFwEZTAOWQqRXbY+lrTkjlEv24XQskFpX3QIiA= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id C49683858425 for ; Sat, 12 Nov 2022 05:08:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C49683858425 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2AC4lBR7002134; Sat, 12 Nov 2022 05:08:01 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3kt4s3ga34-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 12 Nov 2022 05:08:01 +0000 Received: from m0098404.ppops.net (m0098404.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2AC580Bx017785; Sat, 12 Nov 2022 05:08:01 GMT Received: from ppma05wdc.us.ibm.com (1b.90.2fa9.ip4.static.sl-reverse.com [169.47.144.27]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3kt4s3ga2n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 12 Nov 2022 05:08:00 +0000 Received: from pps.filterd (ppma05wdc.us.ibm.com [127.0.0.1]) by ppma05wdc.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 2AC56edF016172; Sat, 12 Nov 2022 05:07:59 GMT Received: from b01cxnp23034.gho.pok.ibm.com (b01cxnp23034.gho.pok.ibm.com [9.57.198.29]) by ppma05wdc.us.ibm.com with ESMTP id 3kt3498fp6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 12 Nov 2022 05:07:59 +0000 Received: from smtpav03.wdc07v.mail.ibm.com ([9.208.128.112]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2AC57woA9634424 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 12 Nov 2022 05:07:58 GMT Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 360C658054; Sat, 12 Nov 2022 05:07:58 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3413B58058; Sat, 12 Nov 2022 05:07:57 +0000 (GMT) Received: from toto.the-meissners.org (unknown [9.160.5.6]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Sat, 12 Nov 2022 05:07:57 +0000 (GMT) Date: Sat, 12 Nov 2022 00:07:55 -0500 To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt Subject: [PATCH 7] PowerPC: Add -mcpu=future saturating subtract built-ins. Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner , Will Schmidt References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: vnNtDK5uURzTh1f7ccuBiIT5sqDdLA0L X-Proofpoint-GUID: ZMZ0awtvRyWDG0edBXPbP94KFa0cq0xK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-12_02,2022-11-11_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211120031 X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_MANYTO, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Michael Meissner via Gcc-patches From: Michael Meissner Reply-To: Michael Meissner Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch adds support for a saturating subtract built-in function that may be added to a future PowerPC processor. Note, if it is added, the name of the built-in function may change before GCC 13 is released. If the name changes, we will submit a patch changing the name. I also added support for providing dense math built-in functions, even though at present, we have not added any new built-in functions for dense math. It is likely we will want to add new dense math built-in functions as the dense math support is fleshed out. I tested this patch on a little endian power10 system with long double using the tradiational IBM double double format. Assuming the other 6 patches for -mcpu=future are checked in (or at least the first patch), can I check this patch into the master branch for GCC 13. 2022-11-11 Michael Meissner gcc/ * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support for flagging invalid use of future built-in functions. (rs6000_builtin_is_supported): Add support for future built-in functions. * config/rs6000/rs6000-builtins.def (__builtin_saturate_subtract32): New built-in function for -mcpu=future. (__builtin_saturate_subtract64): Likewise. * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add stanzas for -mcpu=future built-ins. (stanza_map): Likewise. (enable_string): Likewise. (struct attrinfo): Likewise. (parse_bif_attrs): Likewise. (write_decls): Likewise. * config/rs6000/rs6000.md (sat_sub3): Add saturating subtract built-in insn declarations. (sat_sub3_dot): Likewise. (sat_sub3_dot2): Likewise. * doc/extend.texi (Future PowerPC built-ins): New section. gcc/testsuite/ * gcc.target/powerpc/subfus-1.c: New test. * gcc.target/powerpc/subfus-2.c: Likewise. * lib/target-supports.exp (check_effective_target_powerpc_future_ok): New effective target. --- gcc/config/rs6000/rs6000-builtin.cc | 17 ++++++ gcc/config/rs6000/rs6000-builtins.def | 11 ++++ gcc/config/rs6000/rs6000-gen-builtins.cc | 35 ++++++++++-- gcc/config/rs6000/rs6000.md | 60 +++++++++++++++++++++ gcc/doc/extend.texi | 24 +++++++++ gcc/testsuite/gcc.target/powerpc/subfus-1.c | 32 +++++++++++ gcc/testsuite/gcc.target/powerpc/subfus-2.c | 32 +++++++++++ gcc/testsuite/lib/target-supports.exp | 16 +++++- 8 files changed, 220 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/subfus-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/subfus-2.c diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index f4eba184db8..1ac00e4b26c 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -139,6 +139,17 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) case ENB_MMA: error ("%qs requires the %qs option", name, "-mmma"); break; + case ENB_FUTURE: + error ("%qs requires the %qs option", name, "-mcpu=future"); + break; + case ENB_FUTURE_64: + error ("%qs requires the %qs option and either the %qs or %qs option", + name, "-mcpu=future", "-m64", "-mpowerpc64"); + break; + case ENB_DM: + error ("%qs requires the %qs or %qs options", name, "-mcpu=future", + "-mdense-math"); + break; default: case ENB_ALWAYS: gcc_unreachable (); @@ -194,6 +205,12 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) return TARGET_HTM; case ENB_MMA: return TARGET_MMA; + case ENB_FUTURE: + return TARGET_FUTURE; + case ENB_FUTURE_64: + return TARGET_FUTURE && TARGET_POWERPC64; + case ENB_DM: + return TARGET_DENSE_MATH; default: gcc_unreachable (); } diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index f76f54793d7..ee141c1d99e 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -139,6 +139,8 @@ ; endian Needs special handling for endianness ; ibmld Restrict usage to the case when TFmode is IBM-128 ; ibm128 Restrict usage to the case where __ibm128 is supported or if ibmld +; future Restrict usage to future instructions +; dm Restrict usage to dense math ; ; Each attribute corresponds to extra processing required when ; the built-in is expanded. All such special processing should @@ -4108,3 +4110,12 @@ void __builtin_vsx_stxvp (v256, unsigned long, const v256 *); STXVP nothing {mma,pair} + +[future] + const signed int __builtin_saturate_subtract32 (signed int, signed int); + SAT_SUBSI sat_subsi3 {} + +[future-64] + const signed long __builtin_saturate_subtract64 (signed long, signed long); + SAT_SUBDI sat_subdi3 {} + diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc index 0bd7a535e5f..f4020141243 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.cc +++ b/gcc/config/rs6000/rs6000-gen-builtins.cc @@ -233,6 +233,9 @@ enum bif_stanza BSTZ_P10, BSTZ_P10_64, BSTZ_MMA, + BSTZ_FUTURE, + BSTZ_FUTURE_64, + BSTZ_DM, NUMBIFSTANZAS }; @@ -266,7 +269,10 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] = { "htm", BSTZ_HTM }, { "power10", BSTZ_P10 }, { "power10-64", BSTZ_P10_64 }, - { "mma", BSTZ_MMA } + { "mma", BSTZ_MMA }, + { "future", BSTZ_FUTURE }, + { "future-64", BSTZ_FUTURE_64 }, + { "dm", BSTZ_DM }, }; static const char *enable_string[NUMBIFSTANZAS] = @@ -291,7 +297,10 @@ static const char *enable_string[NUMBIFSTANZAS] = "ENB_HTM", "ENB_P10", "ENB_P10_64", - "ENB_MMA" + "ENB_MMA", + "ENB_FUTURE", + "ENB_FUTURE_64", + "ENB_DM", }; /* Function modifiers provide special handling for const, pure, and fpmath @@ -395,6 +404,8 @@ struct attrinfo bool isendian; bool isibmld; bool isibm128; + bool isfuture; + bool isdm; }; /* Fields associated with a function prototype (bif or overload). */ @@ -1477,7 +1488,8 @@ parse_bif_attrs (attrinfo *attrptr) "ldvec = %d, stvec = %d, reve = %d, pred = %d, htm = %d, " "htmspr = %d, htmcr = %d, mma = %d, quad = %d, pair = %d, " "mmaint = %d, no32bit = %d, 32bit = %d, cpu = %d, ldstmask = %d, " - "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d.\n", + "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d,", + "future = %d, dm = %d.\n", attrptr->isinit, attrptr->isset, attrptr->isextract, attrptr->isnosoft, attrptr->isldvec, attrptr->isstvec, attrptr->isreve, attrptr->ispred, attrptr->ishtm, attrptr->ishtmspr, @@ -1485,7 +1497,7 @@ parse_bif_attrs (attrinfo *attrptr) attrptr->ismmaint, attrptr->isno32bit, attrptr->is32bit, attrptr->iscpu, attrptr->isldstmask, attrptr->islxvrse, attrptr->islxvrze, attrptr->isendian, attrptr->isibmld, - attrptr->isibm128); + attrptr->isibm128, attrptr->isfuture, attrptr->isdm); #endif return PC_OK; @@ -2257,7 +2269,10 @@ write_decls (void) fprintf (header_file, " ENB_HTM,\n"); fprintf (header_file, " ENB_P10,\n"); fprintf (header_file, " ENB_P10_64,\n"); - fprintf (header_file, " ENB_MMA\n"); + fprintf (header_file, " ENB_MMA,\n"); + fprintf (header_file, " ENB_FUTURE,\n"); + fprintf (header_file, " ENB_FUTURE_64,\n"); + fprintf (header_file, " ENB_DM\n"); fprintf (header_file, "};\n\n"); fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n"); @@ -2301,6 +2316,8 @@ write_decls (void) fprintf (header_file, "#define bif_endian_bit\t\t(0x00200000)\n"); fprintf (header_file, "#define bif_ibmld_bit\t\t(0x00400000)\n"); fprintf (header_file, "#define bif_ibm128_bit\t\t(0x00800000)\n"); + fprintf (header_file, "#define bif_future_bit\t\t(0x01000000)\n"); + fprintf (header_file, "#define bif_dm_bit\t\t(0x02000000)\n"); fprintf (header_file, "\n"); fprintf (header_file, "#define bif_is_init(x)\t\t((x).bifattrs & bif_init_bit)\n"); @@ -2350,6 +2367,10 @@ write_decls (void) "#define bif_is_ibmld(x)\t((x).bifattrs & bif_ibmld_bit)\n"); fprintf (header_file, "#define bif_is_ibm128(x)\t((x).bifattrs & bif_ibm128_bit)\n"); + fprintf (header_file, + "#define bif_is_future(x)\t((x).bifattrs & bif_future_bit)\n"); + fprintf (header_file, + "#define bif_is_dm(x)\t((x).bifattrs & bif_dm_bit)\n"); fprintf (header_file, "\n"); fprintf (header_file, @@ -2548,6 +2569,10 @@ write_bif_static_init (void) fprintf (init_file, " | bif_ibmld_bit"); if (bifp->attrs.isibm128) fprintf (init_file, " | bif_ibm128_bit"); + if (bifp->attrs.isfuture) + fprintf (init_file, " | bif_future_bit"); + if (bifp->attrs.isdm) + fprintf (init_file, " | bif_dm_bit"); fprintf (init_file, ",\n"); fprintf (init_file, " /* restr_opnd */\t{%d, %d, %d},\n", bifp->proto.restr_opnd[0], bifp->proto.restr_opnd[1], diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4a5007dc539..e9dfb138603 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -15499,6 +15499,66 @@ (define_insn "hashchk" } [(set_attr "type" "load")]) +;; Signed saturation. + +;; The subfus instruction is defined as: SUBFUS RT,L,RA,RB. The extended +;; mnemonic that we use (subdus and subwus) has the arguments RA and RB +;; reversed (so it becomes a subtract instead of subtract from). + +(define_insn "sat_sub3" + [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") + (ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") + (match_operand:GPR 2 "gpc_reg_operand" "r")))] + "TARGET_FUTURE" + "subus %0,%1,%2" + [(set_attr "type" "add")]) + +(define_insn_and_split "*sat_sub3_dot" + [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y") + (compare:CC (ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (match_operand:GPR 2 "gpc_reg_operand" "r,r")) + (const_int 0))) + (clobber (match_scratch:GPR 0 "=r,r"))] + "TARGET_FUTURE" + "@ + subus. %0,%1,%2 + #" + "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)" + [(set (match_dup 0) + (ss_minus:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + "" + [(set_attr "type" "add") + (set_attr "dot" "yes") + (set_attr "length" "4,8")]) + +(define_insn_and_split "*sat_sub3_dot2" + [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y") + (compare:CC (ss_minus:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r") + (match_operand:GPR 2 "gpc_reg_operand" "r,r")) + (const_int 0))) + (set (match_operand:GPR 0 "gpc_reg_operand" "=r,r") + (ss_minus:GPR (match_dup 1) + (match_dup 2)))] + "TARGET_FUTURE" + "@ + subus. %0,%1,%2 + #" + "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)" + [(set (match_dup 0) + (ss_minus:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + "" + [(set_attr "type" "add") + (set_attr "dot" "yes") + (set_attr "length" "4,8")]) + (include "sync.md") (include "vector.md") diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 8da0db9770d..a195a6d2730 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -17938,6 +17938,7 @@ implementing assertions. * Basic PowerPC Built-in Functions Available on ISA 2.07:: * Basic PowerPC Built-in Functions Available on ISA 3.0:: * Basic PowerPC Built-in Functions Available on ISA 3.1:: +* Basic Built-in Functions that may be available on future PowerPCs:: @end menu This section describes PowerPC built-in functions that do not require @@ -18595,6 +18596,29 @@ ISA 3.1 @code{stxvrbx}, @code{stxvrhx}, @code{stxvrwx}, and @code{stxvrdx} instructions. @findex vec_xst_trunc +@node Basic Built-in Functions that may be available on future PowerPCs +@subsubsection Potential future PowerPC Built-in Functions + +The built-in functions described in this section may be available on +future PowerPC processors. At present, these built-ins exist to +allowing testing of new instructions. There is no guarantee that +these instructions will actually be implemented. + +The following built-in functions are available on Linux 64-bit systems +that use a potential future instruction set (@option{-mcpu=future}): + +@table @code +@item int __builtin_saturate_subtract32 (int, int) +Subtract the second operand from the first operand. If the value +would be less than 0, then the result is 0 instead of the negative +value of the subtraction. + +@item long __builtin_saturate_subtract64 (long, long) +Subtract the second operand from the first operand. If the value +would be less than 0, then the result is 0 instead of the negative +value of the subtraction. +@end table + @node PowerPC AltiVec/VSX Built-in Functions @subsection PowerPC AltiVec/VSX Built-in Functions diff --git a/gcc/testsuite/gcc.target/powerpc/subfus-1.c b/gcc/testsuite/gcc.target/powerpc/subfus-1.c new file mode 100644 index 00000000000..535e7f8483d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/subfus-1.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +/* Test whether the saturating subtract built-in generates subwus for 32-bit + subtracts. */ + +int do_sat_int (int a, int b) +{ + return __builtin_saturate_subtract32 (a, b); /* subwus */ +} + +int do_sat_int_dot (int a, int b, int *p) +{ + int r = __builtin_saturate_subtract32 (a, b); /* subwus. */ + if (r == 0) + *p = 0; + + return r; +} + +void do_sat_int_dot2 (int a, int b, int *p, int *q) +{ + if (__builtin_saturate_subtract32 (a, b)) /* subwus. */ + *p = 0; + + *q = a + b; + return; +} + +/* { dg-final { scan-assembler {\msubwus\M} } } */ +/* { dg-final { scan-assembler-not {\msubf\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/subfus-2.c b/gcc/testsuite/gcc.target/powerpc/subfus-2.c new file mode 100644 index 00000000000..b68e66dd2b0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/subfus-2.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-require-effective-target powerpc_future_ok } */ +/* { dg-options "-mdejagnu-cpu=future -O2" } */ + +/* Test whether the saturating subtract built-in generates subwus for 64-bit + subtracts. */ + +long do_sat_long (long a, long b) +{ + return __builtin_saturate_subtract64 (a, b); /* subwus */ +} + +long do_sat_long_dot (long a, long b, long *p) +{ + long r = __builtin_saturate_subtract64 (a, b); /* subwus. */ + if (r == 0) + *p = 0; + + return r; +} + +void do_sat_long_dot2 (long a, long b, long *p, long *q) +{ + if (__builtin_saturate_subtract64 (a, b)) /* subwus. */ + *p = 0; + + *q = a + b; + return; +} + +/* { dg-final { scan-assembler {\msubdus\M} } } */ +/* { dg-final { scan-assembler-not {\msubf\M} } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index b70ebf963f9..ca33a658f7e 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6534,8 +6534,8 @@ proc check_effective_target_power10_ok { } { } } -# Return 1 if this is a PowerPC target supporting -mcpu=future or -mdense-math -# which enables the dense math operations. +# Return 1 if this is a PowerPC target supporting -mcpu=future which enables +# the dense math operations. proc check_effective_target_powerpc_dense_math_ok { } { return [check_no_compiler_messages_nocache powerpc_dense_math_ok assembly { __vector_quad vq; @@ -6553,6 +6553,18 @@ proc check_effective_target_powerpc_dense_math_ok { } { } "-mcpu=future"] } +# Return 1 if this is a PowerPC target supporting -mcpu=future which enables +# the saturating subtract instruction. +proc check_effective_target_powerpc_future_ok { } { + return [check_no_compiler_messages powerpc_future_ok object { + #ifndef _ARCH_PWR_FUTURE + #error "not -mcpu=future" + #else + int dummy; + #endif + } "-mcpu=future"] +} + # Return 1 if this is a PowerPC target supporting -mfloat128 via either # software emulation on power7/power8 systems or hardware support on power9.