From patchwork Sat Nov 5 09:44:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomas Vanek X-Patchwork-Id: 59991 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0D7163857BBB for ; Sat, 5 Nov 2022 09:45:53 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp00.avonet.cz (smtp00.avonet.cz [217.112.162.55]) by sourceware.org (Postfix) with ESMTP id 6D5EB3858418 for ; Sat, 5 Nov 2022 09:45:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6D5EB3858418 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=fbl.cz Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=fbl.cz Received: from ktus.lan (217-115-245-101.cust.avonet.cz [217.115.245.101]) by smtp00.avonet.cz (Postfix) with ESMTP id 4N4CK96zz1z1xqS; Sat, 5 Nov 2022 10:45:17 +0100 (CET) From: Tomas Vanek To: gdb-patches@sourceware.org Subject: [RFC PATCH 1/5] gdb/arm: Introduce control_s and control_ns registers Date: Sat, 5 Nov 2022 10:44:32 +0100 Message-Id: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> X-Mailer: git-send-email 1.9.1 X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomas Vanek Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" The M-profile security extension registers will be used for stack selection in FNC_RETURN and return from secure to non-secure state. The presence of the registers is optional. If one or both are missing the security extension profile is accepted. The code using the registers must check m_profile_control_[n]?s_regnum for -1. Signed-off-by: Tomas Vanek --- gdb/arm-tdep.c | 20 ++++++++++++++++++++ gdb/arm-tdep.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 3105543..564ee43 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -9996,6 +9996,8 @@ enum arm_vfp_cprc_base_type int m_profile_psp_ns_regnum = -1; int m_profile_msp_s_regnum = -1; int m_profile_psp_s_regnum = -1; + int m_profile_control_s_regnum = -1; + int m_profile_control_ns_regnum = -1; int tls_regnum = 0; /* If we have an object to base this architecture on, try to determine @@ -10473,6 +10475,22 @@ enum arm_vfp_cprc_base_type } m_profile_psp_s_regnum = register_count++; + /* Regard the control_s and control_ns registers optional, + * accept the security extension feature even without them */ + valid_p = tdesc_numbered_register (feature, tdesc_data.get (), + register_count, "control_s"); + if (!valid_p) + warning (_("M-profile secext feature is missing required register control_s.")); + else + m_profile_control_s_regnum = register_count++; + + valid_p = tdesc_numbered_register (feature, tdesc_data.get (), + register_count, "control_ns"); + if (!valid_p) + warning (_("M-profile secext feature is missing required register control_ns.")); + else + m_profile_control_ns_regnum = register_count++; + have_sec_ext = true; } @@ -10553,6 +10571,8 @@ enum arm_vfp_cprc_base_type tdep->m_profile_psp_ns_regnum = m_profile_psp_ns_regnum; tdep->m_profile_msp_s_regnum = m_profile_msp_s_regnum; tdep->m_profile_psp_s_regnum = m_profile_psp_s_regnum; + tdep->m_profile_control_s_regnum = m_profile_control_s_regnum; + tdep->m_profile_control_ns_regnum = m_profile_control_ns_regnum; } arm_register_g_packet_guesses (gdbarch); diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h index bcd7e08..11670e9 100644 --- a/gdb/arm-tdep.h +++ b/gdb/arm-tdep.h @@ -133,6 +133,8 @@ struct arm_gdbarch_tdep : gdbarch_tdep_base int m_profile_psp_ns_regnum = ARM_SP_REGNUM; /* M-profile PSP_NS register number. */ int m_profile_msp_s_regnum = ARM_SP_REGNUM; /* M-profile MSP_S register number. */ int m_profile_psp_s_regnum = ARM_SP_REGNUM; /* M-profile PSP_S register number. */ + int m_profile_control_s_regnum = -1; /* M-profile CONTROL_S register number. */ + int m_profile_control_ns_regnum = -1; /* M-profile CONTROL_NS register number. */ int tls_regnum = 0; /* Number of the tpidruro register. */ From patchwork Sat Nov 5 09:44:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomas Vanek X-Patchwork-Id: 59989 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0D8C938582A7 for ; Sat, 5 Nov 2022 09:45:37 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp00.avonet.cz (smtp00.avonet.cz [217.112.162.55]) by sourceware.org (Postfix) with ESMTP id 6CF843858C54 for ; Sat, 5 Nov 2022 09:45:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6CF843858C54 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=fbl.cz Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=fbl.cz Received: from ktus.lan (217-115-245-101.cust.avonet.cz [217.115.245.101]) by smtp00.avonet.cz (Postfix) with ESMTP id 4N4CKC2Qwgz1xrp; Sat, 5 Nov 2022 10:45:19 +0100 (CET) From: Tomas Vanek To: gdb-patches@sourceware.org Subject: [RFC PATCH 2/5] gdb/arm: PR 29716 Fix FNC_RETURN stack selection in exception unwinder Date: Sat, 5 Nov 2022 10:44:33 +0100 Message-Id: <1667641476-31602-2-git-send-email-vanekt@fbl.cz> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> References: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomas Vanek Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Unwinding of FNC_RETURN selected the process stack whenever zero IPSR indicated thread mode. This does not comply Arm v8-M Architecture Reference Manual B3.8 Stack pointer IDMLS "In Thread mode, CONTROL.SPSEL determines whether the PE uses the main or process stack" Check SPSEL bit of CONTROL_S register. For simplicity the CONTROL_S is not tracked for changes in the inner frames, the CONTROL_S value is passed unchanged from the innermost frame. Signed-off-by: Tomas Vanek --- gdb/arm-tdep.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 564ee43..4180277 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3485,13 +3485,27 @@ struct frame_unwind arm_stub_unwind = { return cache; } - ULONGEST xpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM); - if ((xpsr & 0x1ff) != 0) - /* Handler mode: This is the mode that exceptions are handled in. */ - arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_msp_s_regnum); - else - /* Thread mode: This is the normal mode that programs run in. */ - arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_psp_s_regnum); + bool spsel = true; + if (tdep->m_profile_control_s_regnum >= 0) + { + ULONGEST control_s + = get_frame_register_unsigned (this_frame, + tdep->m_profile_control_s_regnum); + spsel = (control_s & (1 << 1)) != 0; + } + + bool s_process_stack = false; + if (spsel) + { + ULONGEST xpsr = get_frame_register_unsigned (this_frame, + ARM_PS_REGNUM); + s_process_stack = (xpsr & 0x1ff) == 0; + } + + arm_cache_switch_prev_sp (cache, tdep, + s_process_stack ? + tdep->m_profile_psp_s_regnum : + tdep->m_profile_msp_s_regnum); CORE_ADDR unwound_sp = arm_cache_get_prev_sp_value (cache, tdep); From patchwork Sat Nov 5 09:44:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomas Vanek X-Patchwork-Id: 59990 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3FB4B38582A0 for ; Sat, 5 Nov 2022 09:45:44 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp00.avonet.cz (smtp00.avonet.cz [217.112.162.55]) by sourceware.org (Postfix) with ESMTP id 251243858419 for ; Sat, 5 Nov 2022 09:45:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 251243858419 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=fbl.cz Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=fbl.cz Received: from ktus.lan (217-115-245-101.cust.avonet.cz [217.115.245.101]) by smtp00.avonet.cz (Postfix) with ESMTP id 4N4CKD4RtFz1xrv; Sat, 5 Nov 2022 10:45:20 +0100 (CET) From: Tomas Vanek To: gdb-patches@sourceware.org Subject: [RFC PATCH 3/5] gdb/dwarf2: Add dwarf2_frame_reg_rule for GDB register number Date: Sat, 5 Nov 2022 10:44:34 +0100 Message-Id: <1667641476-31602-3-git-send-email-vanekt@fbl.cz> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> References: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomas Vanek Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Arm M-profile security extension requires the dwarf2 unwinder to copy a value from a mode specific stack pointer to the general sp. We can achive this using DWARF2_FRAME_REG_SAVED_REG but it is complicated as the DWARF base register number has to be filled to reg->loc.reg (and dwarf2_frame_prev_register() in turn converts it back to the GDB register number). To avoid the useless conversion forth and back introduce a new item in enum dwarf2_frame_reg_rule for GDB internal use. DWARF2_FRAME_REG_SAVED_GDB_REG copies the value from a register indexed by GDB number. Signed-off-by: Tomas Vanek --- gdb/dwarf2/frame.c | 4 ++++ gdb/dwarf2/frame.h | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/gdb/dwarf2/frame.c b/gdb/dwarf2/frame.c index 3f884ab..a0e554f 100644 --- a/gdb/dwarf2/frame.c +++ b/gdb/dwarf2/frame.c @@ -1166,6 +1166,10 @@ struct dwarf2_frame_cache (gdbarch, cache->reg[regnum].loc.reg); return frame_unwind_got_register (this_frame, regnum, realnum); + case DWARF2_FRAME_REG_SAVED_GDB_REG: + realnum = cache->reg[regnum].loc.reg; + return frame_unwind_got_register (this_frame, regnum, realnum); + case DWARF2_FRAME_REG_SAVED_EXP: addr = execute_stack_op (cache->reg[regnum].loc.exp.start, cache->reg[regnum].loc.exp.len, diff --git a/gdb/dwarf2/frame.h b/gdb/dwarf2/frame.h index 06c8a10..848e924 100644 --- a/gdb/dwarf2/frame.h +++ b/gdb/dwarf2/frame.h @@ -61,7 +61,10 @@ enum dwarf2_frame_reg_rule DWARF2_FRAME_REG_RA, /* Return Address. */ DWARF2_FRAME_REG_RA_OFFSET, /* Return Address with offset. */ DWARF2_FRAME_REG_CFA, /* Call Frame Address. */ - DWARF2_FRAME_REG_CFA_OFFSET /* Call Frame Address with offset. */ + DWARF2_FRAME_REG_CFA_OFFSET, /* Call Frame Address with offset. */ + DWARF2_FRAME_REG_SAVED_GDB_REG + /* As DWARF2_FRAME_REG_SAVED_REG, loc.reg contains GDB register number, + not DWARF register number. */ }; /* Register state. */ From patchwork Sat Nov 5 09:44:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomas Vanek X-Patchwork-Id: 59992 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6581C3857B8E for ; Sat, 5 Nov 2022 09:45:59 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp00.avonet.cz (smtp00.avonet.cz [217.112.162.55]) by sourceware.org (Postfix) with ESMTP id AECEC385841B for ; Sat, 5 Nov 2022 09:45:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org AECEC385841B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=fbl.cz Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=fbl.cz Received: from ktus.lan (217-115-245-101.cust.avonet.cz [217.115.245.101]) by smtp00.avonet.cz (Postfix) with ESMTP id 4N4CKF6Tfcz1xry; Sat, 5 Nov 2022 10:45:21 +0100 (CET) From: Tomas Vanek To: gdb-patches@sourceware.org Subject: [RFC PATCH 4/5] gdb/arm: Unwinding of secure procedure with cmse_nonsecure_entry attribute Date: Sat, 5 Nov 2022 10:44:35 +0100 Message-Id: <1667641476-31602-4-git-send-email-vanekt@fbl.cz> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> References: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomas Vanek Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This patch depends on pending: "gdb/arm: PR 29738 Cache value for stack pointers for dwarf2 frames" A secure procedure with cmse_nonsecure_entry attribute is compiled with an epilogue ending by a return to the non-secure mode: bxns lr When a non-secure context called such procedure, the dwarf2 unwinder did not know about cmse_nonsecure_entry attribute, did not see 'bxns' at the return and therefore assumed a normal return keeping the security state unchanged. This caused incorrect unwinding of the frames following this one as the secure stack was used instead of non-secure. Detect a procedure with cmse_nonsecure_entry attribute when unwinding a secure frame. Change the security state to non-secure and use the proper stack if the cmse_nonsecure_entry was detected. The detection of the cmse_nonsecure_entry attribute is based on the split secure gateway veneer and the rest of procedure with the name prefixed by '__acle_se_'. This is documented in https://developer.arm.com/documentation/100748/0619/Security-features-supported-in-Arm-Compiler-for-Embedded/Overview-of-building-Secure-and-Non-secure-images-with-the-Armv8-M-Security-Extension and GCC conforms this model too. To choose main or process non-secure stack we need xPSR and SPSEL bit of CONTROL_NS. For simplicity CONTROL_NS is not tracked for changes in the inner frames, the CONTROL_NS value is passed unchanged from the innermost frame. Signed-off-by: Tomas Vanek --- gdb/arm-tdep.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 71 insertions(+), 8 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 4180277..4fac09b 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -5125,6 +5125,7 @@ enum arm_vfp_cprc_base_type frame_info_ptr this_frame) { arm_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + bool is_sp = (regnum == ARM_SP_REGNUM); if (is_pacbti_pseudo (gdbarch, regnum)) { @@ -5140,12 +5141,10 @@ enum arm_vfp_cprc_base_type reg->how = DWARF2_FRAME_REG_FN; reg->loc.fn = arm_dwarf2_prev_register; } - else if (regnum == ARM_SP_REGNUM) - reg->how = DWARF2_FRAME_REG_CFA; - else if (arm_is_alternative_sp_register (tdep, regnum)) + else if (is_sp || arm_is_alternative_sp_register (tdep, regnum)) { /* Identify what stack pointers that are synced with sp. */ - bool override_with_sp_value = false; + bool override_with_sp_value = is_sp; if (tdep->have_sec_ext) { @@ -5165,24 +5164,88 @@ enum arm_vfp_cprc_base_type = get_frame_register_unsigned (this_frame, tdep->m_profile_psp_ns_regnum); + bool is_secure = (sp == msp_s || sp == psp_s); + bool return_to_ns = false; + if (is_secure) + { + CORE_ADDR func = get_frame_func (this_frame); + struct bound_minimal_symbol sym + = lookup_minimal_symbol_by_pc (func); + if (sym.minsym) + { + const char *name = sym.minsym->natural_name (); + arm_debug_printf ("ret to ns check minsym %s", name); + return_to_ns = strncmp (name, "__acle_se_", 10) == 0; + } + } + + bool ns_process_stack = false; + if (return_to_ns && + (is_sp || + regnum == tdep->m_profile_msp_s_regnum || + regnum == tdep->m_profile_psp_s_regnum)) + { + bool spsel = true; + + if (tdep->m_profile_control_ns_regnum >= 0) + { + ULONGEST control_ns + = get_frame_register_unsigned (this_frame, + tdep->m_profile_control_ns_regnum); + spsel = (control_ns & (1 << 1)) != 0; + } + + if (spsel) + { + ULONGEST xpsr = get_frame_register_unsigned (this_frame, + ARM_PS_REGNUM); + ns_process_stack = (xpsr & 0x1ff) == 0; + } + + if (is_sp) + { + reg->how = DWARF2_FRAME_REG_SAVED_GDB_REG; + reg->loc.reg = ns_process_stack ? + tdep->m_profile_psp_ns_regnum : + tdep->m_profile_msp_ns_regnum; + return; + } + } + + if (return_to_ns) + { + if (regnum == tdep->m_profile_msp_regnum) + { + reg->how = DWARF2_FRAME_REG_SAVED_GDB_REG; + reg->loc.reg = tdep->m_profile_msp_ns_regnum; + return; + } + else if (regnum == tdep->m_profile_psp_regnum) + { + reg->how = DWARF2_FRAME_REG_SAVED_GDB_REG; + reg->loc.reg = tdep->m_profile_psp_ns_regnum; + return; + } + } + bool is_msp = (regnum == tdep->m_profile_msp_regnum) && (msp_s == sp || msp_ns == sp); bool is_msp_s = (regnum == tdep->m_profile_msp_s_regnum) - && (msp_s == sp); + && (msp_s == sp || (return_to_ns && !ns_process_stack)); bool is_msp_ns = (regnum == tdep->m_profile_msp_ns_regnum) && (msp_ns == sp); bool is_psp = (regnum == tdep->m_profile_psp_regnum) && (psp_s == sp || psp_ns == sp); bool is_psp_s = (regnum == tdep->m_profile_psp_s_regnum) - && (psp_s == sp); + && (psp_s == sp || (return_to_ns && ns_process_stack)); bool is_psp_ns = (regnum == tdep->m_profile_psp_ns_regnum) && (psp_ns == sp); - override_with_sp_value = is_msp || is_msp_s || is_msp_ns + override_with_sp_value = is_sp || is_msp || is_msp_s || is_msp_ns || is_psp || is_psp_s || is_psp_ns; } - else if (tdep->is_m) + else if (tdep->is_m && !is_sp) { CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); From patchwork Sat Nov 5 09:44:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomas Vanek X-Patchwork-Id: 59993 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EE8BA3857C75 for ; Sat, 5 Nov 2022 09:46:06 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp00.avonet.cz (smtp00.avonet.cz [217.112.162.55]) by sourceware.org (Postfix) with ESMTP id 44492385841E for ; Sat, 5 Nov 2022 09:45:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 44492385841E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=fbl.cz Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=fbl.cz Received: from ktus.lan (217-115-245-101.cust.avonet.cz [217.115.245.101]) by smtp00.avonet.cz (Postfix) with ESMTP id 4N4CKH5gx2z1xqS; Sat, 5 Nov 2022 10:45:23 +0100 (CET) From: Tomas Vanek To: gdb-patches@sourceware.org Subject: [RFC PATCH 5/5] HACK frame inner than comparison for Arm M-profile sec ext Date: Sat, 5 Nov 2022 10:44:36 +0100 Message-Id: <1667641476-31602-5-git-send-email-vanekt@fbl.cz> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> References: <1667641476-31602-1-git-send-email-vanekt@fbl.cz> X-Spam-Status: No, score=-13.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomas Vanek Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" !!This change is not intended to be merged to the GDB code!! Arm M-profile can use two stacks or four stack with the security extension. core_addr_lessthan() used in set_gdbarch_inner_than() can break stack unwinding with a false warning "previous frame inner to this frame (corrupt stack?)" when the active stack is switched to another one located below the first one. Unfortunately the settable comparison function used in set_gdbarch_inner_than() takes just lhs and rhs addresses as arguments. Therefore the possibility to avoid the comparison of addresses from two different stack is very limited or impossible. This hack abuses the internal RAM mapping to non-secure and secure/callable areas used in STM32L5 device to prevent false unwinding fails when switching secure/non-secure mode. How to solve the problem correctly? Please advise... Add a settable value "set arm unwind-inner-check 0" to switch off the inner frame check on user request? Rework frame_id_inner() and gdbarch to allow a smarter comparator with access to frame details? Signed-off-by: Tomas Vanek --- gdb/arm-tdep.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 4fac09b..1c683ca 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -876,6 +876,16 @@ class target_arm_instruction_reader : public arm_instruction_reader } } +static int +arm_m_sec_ext_inner_than (CORE_ADDR lhs, CORE_ADDR rhs) +{ + if ((lhs & 0xfff00000) == 0x20000000 + && (rhs & 0xfff00000) == 0x30000000) + return false; + + return (lhs < rhs); +} + /* Remove useless bits from addresses in a running program. */ static CORE_ADDR arm_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR val) @@ -10725,7 +10735,9 @@ enum arm_vfp_cprc_base_type set_gdbarch_skip_trampoline_code (gdbarch, arm_skip_stub); /* The stack grows downward. */ - set_gdbarch_inner_than (gdbarch, core_addr_lessthan); + set_gdbarch_inner_than (gdbarch, have_sec_ext ? + arm_m_sec_ext_inner_than : + core_addr_lessthan); /* Breakpoint manipulation. */ set_gdbarch_breakpoint_kind_from_pc (gdbarch, arm_breakpoint_kind_from_pc);