From patchwork Fri Nov 4 14:44:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 59939 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C25793858426 for ; Fri, 4 Nov 2022 14:45:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C25793858426 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667573137; bh=eWDbOhGl0260y12L2S4Bq3J8QRbJZj/p+pqdHBr4YLg=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=MSOewT3Y4cIfgecCiExuLCuUerm37KKlxaohgA6wznllEqUGl2TvBe2zw6jzqRQ65 crNjpNDjkPGGGHK4IKgfcLKrQGZ/UkmOw1em/NO/TB1zAQhXyBsmuSEbwdNo/Y3StZ VLKkc7LZXqYB+KKDFqelq9bH9lH2sWJh4AghksXw= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by sourceware.org (Postfix) with ESMTPS id 89FA13858421 for ; Fri, 4 Nov 2022 14:45:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 89FA13858421 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2A4ArF3d026678; Fri, 4 Nov 2022 15:45:11 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3kmpfjd9hb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 04 Nov 2022 15:45:11 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D326010002A; Fri, 4 Nov 2022 15:45:06 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id CEB4121FEA5; Fri, 4 Nov 2022 15:45:06 +0100 (CET) Received: from jkgcxl0002.jkg.st.com (10.210.54.218) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 4 Nov 2022 15:45:05 +0100 To: Subject: [PATCH 1/3] gdb/arm: Update active msp/psp when switching stack Date: Fri, 4 Nov 2022 15:44:37 +0100 Message-ID: <20221104144438.2786801-2-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> References: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-04_09,2022-11-03_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Cc: vanekt@volny.cz Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" For targets with secext, msp and psp can be seen as an alias for one of msp_s, msp_ns, psp_s or psp_ns. When switching active sp, the coresponding msp/psp needs to be switched too. Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 7cb3f5f3050..124a94dc87d 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -504,8 +504,23 @@ arm_cache_switch_prev_sp (struct arm_prologue_cache *cache, gdb_assert (arm_is_alternative_sp_register (tdep, sp_regnum)); if (tdep->have_sec_ext) - gdb_assert (sp_regnum != tdep->m_profile_msp_regnum - && sp_regnum != tdep->m_profile_psp_regnum); + { + gdb_assert (sp_regnum != tdep->m_profile_msp_regnum + && sp_regnum != tdep->m_profile_psp_regnum); + + if (sp_regnum == tdep->m_profile_msp_s_regnum + || sp_regnum == tdep->m_profile_psp_s_regnum) + { + cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; + cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; + } + else if (sp_regnum == tdep->m_profile_msp_ns_regnum + || sp_regnum == tdep->m_profile_psp_ns_regnum) + { + cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum; + cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum; + } + } cache->active_sp_regnum = sp_regnum; } From patchwork Fri Nov 4 14:44:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Torbjorn SVENSSON X-Patchwork-Id: 59941 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 758F3385843B for ; Fri, 4 Nov 2022 14:46:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 758F3385843B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667573162; bh=//pA12FaD48pFNBO3sdvFu1z7viZ4lOReT41xjwTrUs=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=alu1Fw3TlD4InuiZG8xWyr4hFiwLGMCtEgEUlCXxrLjUSlUwsVLIXNw70y7EtKP3u y8MDfC/wUS/UqDcjujsVDJuUDupSJp+FJuzPGoAQvjV7BgHtCE8wRtZIBaDElJUKS5 cf5GeX1wcgXZtPXHZg5Mv9fViI+9FJ6BvSd+il84= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id 33C9B385829A for ; Fri, 4 Nov 2022 14:45:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 33C9B385829A Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2A4BGCIt003970; Fri, 4 Nov 2022 15:45:22 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3kmpf7n4y9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 04 Nov 2022 15:45:22 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B68B510002A; Fri, 4 Nov 2022 15:45:17 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B29B421FEA5; Fri, 4 Nov 2022 15:45:17 +0100 (CET) Received: from jkgcxl0002.jkg.st.com (10.210.54.218) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Fri, 4 Nov 2022 15:45:14 +0100 To: Subject: [PATCH 2/3] gdb/arm: Ensure that stack pointers are in sync Date: Fri, 4 Nov 2022 15:44:39 +0100 Message-ID: <20221104144438.2786801-3-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> References: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-04_09,2022-11-03_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Cc: vanekt@volny.cz Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Without this patch, sp might be secure, but msp or psp is non-secure (this state can not happen in the hardware). Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 86 ++++++++++++++++++++++++++++++++++---------------- 1 file changed, 58 insertions(+), 28 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 124a94dc87d..c011b2aa973 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -324,20 +324,6 @@ reconstruct_t_bit(struct gdbarch *gdbarch, CORE_ADDR lr, ULONGEST psr) return psr; } -/* Initialize stack pointers, and flag the active one. */ - -static inline void -arm_cache_init_sp (int regnum, CORE_ADDR* member, - struct arm_prologue_cache *cache, - frame_info_ptr frame) -{ - CORE_ADDR val = get_frame_register_unsigned (frame, regnum); - if (val == cache->sp) - cache->active_sp_regnum = regnum; - - *member = val; -} - /* Initialize CACHE fields for which zero is not adequate (CACHE is expected to have been ZALLOC'ed before calling this function). */ @@ -362,34 +348,78 @@ arm_cache_init (struct arm_prologue_cache *cache, frame_info_ptr frame) if (tdep->have_sec_ext) { - CORE_ADDR msp_val = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum); - CORE_ADDR psp_val = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum); - - arm_cache_init_sp (tdep->m_profile_msp_s_regnum, &cache->msp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_s_regnum, &cache->psp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_msp_ns_regnum, &cache->msp_ns, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_ns_regnum, &cache->psp_ns, cache, frame); - + const CORE_ADDR msp_val + = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum); + const CORE_ADDR psp_val + = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum); + + cache->msp_s + = get_frame_register_unsigned (frame, tdep->m_profile_msp_s_regnum); + cache->msp_ns + = get_frame_register_unsigned (frame, tdep->m_profile_msp_ns_regnum); + cache->psp_s + = get_frame_register_unsigned (frame, tdep->m_profile_psp_s_regnum); + cache->psp_ns + = get_frame_register_unsigned (frame, tdep->m_profile_psp_ns_regnum); + + /* Identify what msp is alias for (msp_s or msp_ns). */ if (msp_val == cache->msp_s) cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; else if (msp_val == cache->msp_ns) cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum; + else + { + warning (_("Invalid state, unable to determine msp alias.")); + cache->active_msp_regnum = tdep->m_profile_msp_s_regnum; + } + + /* Identify what psp is alias for (psp_s or psp_ns). */ if (psp_val == cache->psp_s) cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; else if (psp_val == cache->psp_ns) cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum; + else + { + warning (_("Invalid state, unable to determine psp alias.")); + cache->active_psp_regnum = tdep->m_profile_psp_s_regnum; + } - /* Use MSP_S as default stack pointer. */ - if (cache->active_sp_regnum == ARM_SP_REGNUM) - cache->active_sp_regnum = tdep->m_profile_msp_s_regnum; + /* Identify what sp is alias for (msp_s, msp_ns, psp_s or psp_ns). */ + if (msp_val == cache->sp) + cache->active_sp_regnum = cache->active_msp_regnum; + else if (psp_val == cache->sp) + cache->active_sp_regnum = cache->active_psp_regnum; + else + { + warning (_("Invalid state, unable to determine sp alias.")); + cache->active_sp_regnum = cache->active_msp_regnum; + } } else if (tdep->is_m) { - arm_cache_init_sp (tdep->m_profile_msp_regnum, &cache->msp_s, cache, frame); - arm_cache_init_sp (tdep->m_profile_psp_regnum, &cache->psp_s, cache, frame); + cache->msp_s + = get_frame_register_unsigned (frame, tdep->m_profile_msp_s_regnum); + cache->psp_s + = get_frame_register_unsigned (frame, tdep->m_profile_psp_s_regnum); + + /* Identify what sp is alias for (msp or psp). */ + if (cache->msp_s == cache->sp) + cache->active_sp_regnum = tdep->m_profile_msp_regnum; + else if (cache->psp_s == cache->sp) + cache->active_sp_regnum = tdep->m_profile_psp_regnum; + else + { + warning (_("Invalid state, unable to determine sp alias.")); + cache->active_sp_regnum = tdep->m_profile_msp_regnum; + } } else - arm_cache_init_sp (ARM_SP_REGNUM, &cache->msp_s, cache, frame); + { + cache->msp_s + = get_frame_register_unsigned (frame, ARM_SP_REGNUM); + + cache->active_sp_regnum = ARM_SP_REGNUM; + } } /* Return the requested stack pointer value (in REGNUM), taking into From patchwork Fri Nov 4 14:44:41 2022 Content-Type: text/plain; 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Fri, 4 Nov 2022 15:45:23 +0100 To: Subject: [PATCH 3/3] gdb/arm: PR 29738 Cache value for stack pointers for dwarf2 frames Date: Fri, 4 Nov 2022 15:44:41 +0100 Message-ID: <20221104144438.2786801-4-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> References: <20221104144438.2786801-1-torbjorn.svensson@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.210.54.218] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-04_09,2022-11-03_01,2022-06-22_01 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON_via_Gdb-patches?= From: Torbjorn SVENSSON Reply-To: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= Cc: vanekt@volny.cz Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Without this patch, the number of calls to arm_dwarf2_prev_register would grow in a too rapid way when the number of frames increase. Signed-off-by: Torbjörn SVENSSON --- gdb/arm-tdep.c | 141 +++++++++++++++++++++++-------------------------- 1 file changed, 66 insertions(+), 75 deletions(-) diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index c011b2aa973..a6fb660bcbc 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -3992,78 +3992,6 @@ arm_dwarf2_prev_register (frame_info_ptr this_frame, void **this_cache, cpsr = reconstruct_t_bit (gdbarch, lr, cpsr); return frame_unwind_got_constant (this_frame, regnum, cpsr); } - else if (arm_is_alternative_sp_register (tdep, regnum)) - { - /* Handle the alternative SP registers on Cortex-M. */ - bool override_with_sp_value = false; - CORE_ADDR val; - - if (tdep->have_sec_ext) - { - CORE_ADDR sp - = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); - CORE_ADDR msp_s - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_s_regnum); - CORE_ADDR msp_ns - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_ns_regnum); - CORE_ADDR psp_s - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_s_regnum); - CORE_ADDR psp_ns - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_ns_regnum); - - bool is_msp = (regnum == tdep->m_profile_msp_regnum) - && (msp_s == sp || msp_ns == sp); - bool is_msp_s = (regnum == tdep->m_profile_msp_s_regnum) - && (msp_s == sp); - bool is_msp_ns = (regnum == tdep->m_profile_msp_ns_regnum) - && (msp_ns == sp); - bool is_psp = (regnum == tdep->m_profile_psp_regnum) - && (psp_s == sp || psp_ns == sp); - bool is_psp_s = (regnum == tdep->m_profile_psp_s_regnum) - && (psp_s == sp); - bool is_psp_ns = (regnum == tdep->m_profile_psp_ns_regnum) - && (psp_ns == sp); - - override_with_sp_value = is_msp || is_msp_s || is_msp_ns - || is_psp || is_psp_s || is_psp_ns; - - } - else if (tdep->is_m) - { - CORE_ADDR sp - = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); - CORE_ADDR msp - = get_frame_register_unsigned (this_frame, - tdep->m_profile_msp_regnum); - CORE_ADDR psp - = get_frame_register_unsigned (this_frame, - tdep->m_profile_psp_regnum); - - bool is_msp = (regnum == tdep->m_profile_msp_regnum) && (sp == msp); - bool is_psp = (regnum == tdep->m_profile_psp_regnum) && (sp == psp); - - override_with_sp_value = is_msp || is_psp; - } - - if (override_with_sp_value) - { - /* Use value of SP from previous frame. */ - frame_info_ptr prev_frame = get_prev_frame (this_frame); - if (prev_frame) - val = get_frame_register_unsigned (prev_frame, ARM_SP_REGNUM); - else - val = get_frame_base (this_frame); - } - else - /* Use value for the register from previous frame. */ - val = get_frame_register_unsigned (this_frame, regnum); - - return frame_unwind_got_constant (this_frame, regnum, val); - } internal_error (_("Unexpected register %d"), regnum); } @@ -5202,9 +5130,72 @@ arm_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, reg->how = DWARF2_FRAME_REG_CFA; else if (arm_is_alternative_sp_register (tdep, regnum)) { - /* Handle the alternative SP registers on Cortex-M. */ - reg->how = DWARF2_FRAME_REG_FN; - reg->loc.fn = arm_dwarf2_prev_register; + /* Identify what stack pointers that are synced with sp. */ + bool override_with_sp_value = false; + + if (tdep->have_sec_ext) + { + CORE_ADDR sp + = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); + + CORE_ADDR msp_s + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_s_regnum); + CORE_ADDR msp_ns + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_ns_regnum); + CORE_ADDR psp_s + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_s_regnum); + CORE_ADDR psp_ns + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_ns_regnum); + + bool is_msp = (regnum == tdep->m_profile_msp_regnum) + && (msp_s == sp || msp_ns == sp); + bool is_msp_s = (regnum == tdep->m_profile_msp_s_regnum) + && (msp_s == sp); + bool is_msp_ns = (regnum == tdep->m_profile_msp_ns_regnum) + && (msp_ns == sp); + bool is_psp = (regnum == tdep->m_profile_psp_regnum) + && (psp_s == sp || psp_ns == sp); + bool is_psp_s = (regnum == tdep->m_profile_psp_s_regnum) + && (psp_s == sp); + bool is_psp_ns = (regnum == tdep->m_profile_psp_ns_regnum) + && (psp_ns == sp); + + override_with_sp_value = is_msp || is_msp_s || is_msp_ns + || is_psp || is_psp_s || is_psp_ns; + + } + else if (tdep->is_m) + { + CORE_ADDR sp + = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); + + CORE_ADDR msp + = get_frame_register_unsigned (this_frame, + tdep->m_profile_msp_regnum); + CORE_ADDR psp + = get_frame_register_unsigned (this_frame, + tdep->m_profile_psp_regnum); + + bool is_msp = (regnum == tdep->m_profile_msp_regnum) && (sp == msp); + bool is_psp = (regnum == tdep->m_profile_psp_regnum) && (sp == psp); + + override_with_sp_value = is_msp || is_psp; + } + + if (override_with_sp_value) + { + /* Use the CFA value for this stack pointer register. */ + reg->how = DWARF2_FRAME_REG_CFA; + } + else + { + /* This frame does not have any update for this stack pointer. */ + reg->how = DWARF2_FRAME_REG_SAME_VALUE; + } } }