From patchwork Mon Oct 31 14:52:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shahab Vahedi X-Patchwork-Id: 59658 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 52BBD385380F for ; Mon, 31 Oct 2022 14:53:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 52BBD385380F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1667228012; bh=nVE8ocSL56w5n6lGSQ3+HQf/NrsbCM7aihO4tCK4Jsc=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Help:List-Subscribe:From:Reply-To:Cc:From; b=FcytbubmXlYkRPaGEeQyglJFEouQfk9NWA/7NhxMUQg4x/tVQaoBvOanw7viI2o4U Pk2+7IBS3MV2/bq76APukvTU+sUiwOFMBnx9iPbNvMcpnlSBs3GX0E9OJNemQO39U6 8vEETzstG5aCiY/zwevyFpWqiB6AeCH9iffoHhKU= X-Original-To: elfutils-devel@sourceware.org Delivered-To: elfutils-devel@sourceware.org Received: from mx0a-00230701.pphosted.com (mx0a-00230701.pphosted.com [148.163.156.19]) by sourceware.org (Postfix) with ESMTPS id 218D1385DC2E for ; Mon, 31 Oct 2022 14:53:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 218D1385DC2E Received: from pps.filterd (m0098571.ppops.net [127.0.0.1]) by mx0a-00230701.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 29VDYleK013385; Mon, 31 Oct 2022 07:52:59 -0700 Received: from smtprelay-out1.synopsys.com (smtprelay-out1.synopsys.com [149.117.73.133]) by mx0a-00230701.pphosted.com (PPS) with ESMTPS id 3kjfcbgbw4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Oct 2022 07:52:59 -0700 Received: from mailhost.synopsys.com (sv1-mailhost2.synopsys.com [10.205.2.132]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client CN "mailhost.synopsys.com", Issuer "SNPSica2" (verified OK)) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 2B38540162; Mon, 31 Oct 2022 14:52:58 +0000 (UTC) Received: from atlantis.internal.synopsys.com (atlantis.internal.synopsys.com [10.100.25.137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client did not present a certificate) by mailhost.synopsys.com (Postfix) with ESMTPSA id 4AF03A0078; Mon, 31 Oct 2022 14:52:56 +0000 (UTC) X-SNPS-Relay: synopsys.com To: elfutils-devel@sourceware.org Subject: [PATCH v2] Add support for ARCv2 Date: Mon, 31 Oct 2022 15:52:33 +0100 Message-Id: <20221031145233.17854-1-shahab@synopsys.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-GUID: -MfreLMztwbP1DvsVrDGm_K_FKzZvrQg X-Proofpoint-ORIG-GUID: -MfreLMztwbP1DvsVrDGm_K_FKzZvrQg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-31_17,2022-10-31_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_active_cloned_notspam policy=outbound_active_cloned score=0 mlxlogscore=999 mlxscore=0 malwarescore=0 spamscore=0 adultscore=0 clxscore=1011 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2210310093 X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: elfutils-devel@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Elfutils-devel mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-Patchwork-Original-From: Shahab Vahedi via Elfutils-devel From: Shahab Vahedi Reply-To: Shahab Vahedi Cc: Mark Wielaard , Shahab Vahedi , Claudiu Zissulescu Errors-To: elfutils-devel-bounces+patchwork=sourceware.org@sourceware.org Sender: "Elfutils-devel" This adds support for Synopsys ARCv2 processors. ARC target related macros have been added to libelf/elf.h. However, there are a few changes on existing ARC macros to correct them and be in sync with binutils. All the details of those changes are listed in libelf/ChangeLog. I am going to propose the same type of changes in glibc as well. There are no regressions in tests for an x86_64 build. Signed-off-by: Shahab Vahedi --- Chagelog: v2: - Add ChangeLog entries. - Reduced number of changes in libelf/elf.h - Reworded the commit message. backends/ChangeLog | 9 +++++ backends/Makefile.am | 7 +++- backends/arc_init.c | 55 ++++++++++++++++++++++++++ backends/arc_reloc.def | 87 +++++++++++++++++++++++++++++++++++++++++ backends/arc_symbol.c | 81 ++++++++++++++++++++++++++++++++++++++ libebl/ChangeLog | 5 +++ libebl/eblopenbackend.c | 2 + libelf/ChangeLog | 17 ++++++++ libelf/elf.h | 76 +++++++++++++++++++++++++---------- src/ChangeLog | 4 ++ src/elflint.c | 2 +- 11 files changed, 322 insertions(+), 23 deletions(-) create mode 100644 backends/arc_init.c create mode 100644 backends/arc_reloc.def create mode 100644 backends/arc_symbol.c diff --git a/backends/ChangeLog b/backends/ChangeLog index 5b0daffe..3562cbcd 100644 --- a/backends/ChangeLog +++ b/backends/ChangeLog @@ -1,3 +1,12 @@ +2022-10-31 Shahab Vahedi + + * Makefile.am (modules): Add arc. + (arc_SRCS): Added. + (libebl_backends_a_SOURCES): Append arc_SRCS. + * arc_init.c: New file. + * arc_reloc.def: New file. + * arc_symbol.c: New file. + 2022-08-09 Andreas Schwab * riscv_init.c (riscv_init): HOOK segment_type_name, diff --git a/backends/Makefile.am b/backends/Makefile.am index 9566377f..7f8e47a0 100644 --- a/backends/Makefile.am +++ b/backends/Makefile.am @@ -37,7 +37,7 @@ AM_CPPFLAGS += -I$(top_srcdir)/libebl -I$(top_srcdir)/libasm \ noinst_LIBRARIES = libebl_backends.a libebl_backends_pic.a modules = i386 sh x86_64 ia64 alpha arm aarch64 sparc ppc ppc64 s390 \ - m68k bpf riscv csky + m68k bpf riscv csky arc i386_SRCS = i386_init.c i386_symbol.c i386_corenote.c i386_cfi.c \ i386_retval.c i386_regs.c i386_auxv.c \ @@ -96,11 +96,14 @@ riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \ csky_regs.c csky_initreg.c csky_corenote.c +arc_SRCS = arc_init.c arc_symbol.c + libebl_backends_a_SOURCES = $(i386_SRCS) $(sh_SRCS) $(x86_64_SRCS) \ $(ia64_SRCS) $(alpha_SRCS) $(arm_SRCS) \ $(aarch64_SRCS) $(sparc_SRCS) $(ppc_SRCS) \ $(ppc64_SRCS) $(s390_SRCS) \ - $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) $(csky_SRCS) + $(m68k_SRCS) $(bpf_SRCS) $(riscv_SRCS) \ + $(csky_SRCS) $(arc_SRCS) libebl_backends_pic_a_SOURCES = am_libebl_backends_pic_a_OBJECTS = $(libebl_backends_a_SOURCES:.c=.os) diff --git a/backends/arc_init.c b/backends/arc_init.c new file mode 100644 index 00000000..a013bc4e --- /dev/null +++ b/backends/arc_init.c @@ -0,0 +1,55 @@ +/* Initialization of ARC specific backend library. + Copyright (C) 2022 Synopsys Inc. + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see . */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#define BACKEND arc_ +#define RELOC_PREFIX R_ARC_ +#include "libebl_CPU.h" + +/* This defines the common reloc hooks based on arc_reloc.def. */ +#include "common-reloc.c" + +Ebl * +arc_init (Elf *elf __attribute__ ((unused)), + GElf_Half machine __attribute__ ((unused)), + Ebl *eh) +{ + arc_init_reloc (eh); + HOOK (eh, machine_flag_check); + HOOK (eh, reloc_simple_type); + HOOK (eh, section_type_name); + + /* /bld/gcc-stage2/arc-snps-linux-gnu/libgcc/libgcc.map.in + #define __LIBGCC_DWARF_FRAME_REGISTERS__. */ + eh->frame_nregs = 146; + + return eh; +} diff --git a/backends/arc_reloc.def b/backends/arc_reloc.def new file mode 100644 index 00000000..dfa30629 --- /dev/null +++ b/backends/arc_reloc.def @@ -0,0 +1,87 @@ +/* List the relocation types for ARC. -*- C -*- + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see . */ + +/* NAME, REL|EXEC|DYN */ + +RELOC_TYPE (NONE, EXEC|DYN) +RELOC_TYPE (8, REL|EXEC|DYN) +RELOC_TYPE (16, REL|EXEC|DYN) +RELOC_TYPE (24, REL|EXEC|DYN) +RELOC_TYPE (32, REL|EXEC|DYN) +RELOC_TYPE (N8, REL|EXEC|DYN) +RELOC_TYPE (N16, REL|EXEC|DYN) +RELOC_TYPE (N24, REL|EXEC|DYN) +RELOC_TYPE (N32, REL|EXEC|DYN) +RELOC_TYPE (SDA, REL) +RELOC_TYPE (SECTOFF, REL) +RELOC_TYPE (S21H_PCREL, REL) +RELOC_TYPE (S21W_PCREL, REL) +RELOC_TYPE (S25H_PCREL, REL) +RELOC_TYPE (S25W_PCREL, REL) +RELOC_TYPE (SDA32, REL) +RELOC_TYPE (SDA_LDST, REL) +RELOC_TYPE (SDA_LDST1, REL) +RELOC_TYPE (SDA_LDST2, REL) +RELOC_TYPE (SDA16_LD, REL) +RELOC_TYPE (SDA16_LD1, REL) +RELOC_TYPE (SDA16_LD2, REL) +RELOC_TYPE (S13_PCREL, REL) +RELOC_TYPE (W, REL) +RELOC_TYPE (32_ME, REL) +RELOC_TYPE (N32_ME, REL) +RELOC_TYPE (SECTOFF_ME, REL) +RELOC_TYPE (SDA32_ME, REL) +RELOC_TYPE (W_ME, REL) +RELOC_TYPE (SDA_12, REL) +RELOC_TYPE (SDA16_ST2, REL) +RELOC_TYPE (32_PCREL, REL) +RELOC_TYPE (PC32, REL) +RELOC_TYPE (GOTPC32, REL) +RELOC_TYPE (PLT32, REL) +RELOC_TYPE (COPY, EXEC|DYN) +RELOC_TYPE (GLOB_DAT, EXEC|DYN) +RELOC_TYPE (JMP_SLOT, EXEC|DYN) +RELOC_TYPE (RELATIVE, EXEC|DYN) +RELOC_TYPE (GOTOFF, REL) +RELOC_TYPE (GOTPC, REL) +RELOC_TYPE (GOT32, REL) +RELOC_TYPE (S21W_PCREL_PLT, REL) +RELOC_TYPE (S25H_PCREL_PLT, REL) +RELOC_TYPE (JLI_SECTOFF, REL) +RELOC_TYPE (TLS_DTPMOD, REL) +RELOC_TYPE (TLS_DTPOFF, REL) +RELOC_TYPE (TLS_TPOFF, REL) +RELOC_TYPE (TLS_GD_GOT, REL) +RELOC_TYPE (TLS_GD_LD, REL) +RELOC_TYPE (TLS_GD_CALL, REL) +RELOC_TYPE (TLS_IE_GOT, REL) +RELOC_TYPE (TLS_DTPOFF_S9, REL) +RELOC_TYPE (TLS_LE_S9, REL) +RELOC_TYPE (TLS_LE_32, REL) +RELOC_TYPE (S25W_PCREL_PLT, REL) +RELOC_TYPE (S21H_PCREL_PLT, REL) +RELOC_TYPE (NPS_CMEM16, REL) diff --git a/backends/arc_symbol.c b/backends/arc_symbol.c new file mode 100644 index 00000000..e996c5d9 --- /dev/null +++ b/backends/arc_symbol.c @@ -0,0 +1,81 @@ +/* ARC specific symbolic name handling. + This file is part of elfutils. + + This file is free software; you can redistribute it and/or modify + it under the terms of either + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at + your option) any later version + + or + + * the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at + your option) any later version + + or both in parallel, as here. + + elfutils is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received copies of the GNU General Public License and + the GNU Lesser General Public License along with this program. If + not, see . */ + +#ifdef HAVE_CONFIG_H +# include +#endif + +#include +#include +#include +#include + +#define BACKEND arc_ +#include "libebl_CPU.h" + + +/* Check whether machine flags are valid. */ +bool +arc_machine_flag_check (GElf_Word flags) +{ + return ((flags &~ EF_ARC_ALL_MSK) == 0); +} + +/* Check for the simple reloc types. */ +Elf_Type +arc_reloc_simple_type (Ebl *ebl __attribute__ ((unused)), int type, + int *addsub __attribute ((unused))) +{ + switch (type) + { + case R_ARC_32: + return ELF_T_WORD; + case R_ARC_16: + return ELF_T_HALF; + case R_ARC_8: + return ELF_T_BYTE; + default: + return ELF_T_NUM; + } +} + +/* Return symbolic representation of section type. */ +const char * +arc_section_type_name (int type, + char *buf __attribute__ ((unused)), + size_t len __attribute__ ((unused))) +{ + switch (type) + { + case SHT_ARC_ATTRIBUTES: + return "ARC_ATTRIBUTES"; + default: + break; + } + + return NULL; +} diff --git a/libebl/ChangeLog b/libebl/ChangeLog index 6f55a5e7..3085e1eb 100644 --- a/libebl/ChangeLog +++ b/libebl/ChangeLog @@ -1,3 +1,8 @@ +2022-10-31 Shahab Vahedi + + * eblopenbackend.c (arc_init): New function declaration. + (machines): Add entry for arc. + 2022-10-21 Yonggang Luo * eblclosebackend.c: Remove dlfcn.h include. diff --git a/libebl/eblopenbackend.c b/libebl/eblopenbackend.c index 02f80653..f2288f63 100644 --- a/libebl/eblopenbackend.c +++ b/libebl/eblopenbackend.c @@ -55,6 +55,7 @@ Ebl *m68k_init (Elf *, GElf_Half, Ebl *); Ebl *bpf_init (Elf *, GElf_Half, Ebl *); Ebl *riscv_init (Elf *, GElf_Half, Ebl *); Ebl *csky_init (Elf *, GElf_Half, Ebl *); +Ebl *arc_init (Elf *, GElf_Half, Ebl *); /* This table should contain the complete list of architectures as far as the ELF specification is concerned. */ @@ -150,6 +151,7 @@ static const struct { riscv_init, "elf_riscv", "riscv", 5, EM_RISCV, ELFCLASS64, ELFDATA2LSB }, { riscv_init, "elf_riscv", "riscv", 5, EM_RISCV, ELFCLASS32, ELFDATA2LSB }, { csky_init, "elf_csky", "csky", 4, EM_CSKY, ELFCLASS32, ELFDATA2LSB }, + { arc_init, "elf_arc", "arc", 3, EM_ARCV2, ELFCLASS32, ELFDATA2LSB }, }; #define nmachines (sizeof (machines) / sizeof (machines[0])) diff --git a/libelf/ChangeLog b/libelf/ChangeLog index 8107c71e..9cafa947 100644 --- a/libelf/ChangeLog +++ b/libelf/ChangeLog @@ -1,3 +1,20 @@ +2022-10-31 Shahab Vahedi + + * elf.h: Add arc machines, CPUs, OSABIs, attribute, and relocations. + (R_ARC_B26): Removed. + (R_ARC_SDA_12): New. + (R_ARC_SDA16_ST2): New. + (R_ARC_32_PCREL): New. + (R_ARC_JUMP_SLOT): Renamed to R_ARC_JMP_SLOT. + (R_ARC_GOT32): New. + (R_ARC_S21W_PCREL_PLT): New. + (R_ARC_S25H_PCREL_PLT): New. + (R_ARC_JLI_SECTOFF): New. + (R_ARC_TLS_DTPOFF_S9): 0x4a -> 0x49. + (R_ARC_S25W_PCREL_PLT): New. + (R_ARC_S21H_PCREL_PLT): New. + (R_ARC_NPS_CMEM16): New. + 2022-10-28 Mark Wielaard * elf.h: Update from glibc. diff --git a/libelf/elf.h b/libelf/elf.h index f51300bc..0fc899f7 100644 --- a/libelf/elf.h +++ b/libelf/elf.h @@ -4156,24 +4156,50 @@ enum #define R_LARCH_GNU_VTINHERIT 57 #define R_LARCH_GNU_VTENTRY 58 +/* ARC specific declarations. */ + +/* Processor specific flags for the Ehdr e_flags field. */ +#define EF_ARC_MACH_MSK 0x000000ff +#define EF_ARC_OSABI_MSK 0x00000f00 +#define EF_ARC_ALL_MSK (EF_ARC_MACH_MSK | EF_ARC_OSABI_MSK) + +/* Various CPU types. These numbers are exposed in the ELF header flags + (e_flags field), and so must never change. */ +#define E_ARC_MACH_ARC600 0x00000002 +#define E_ARC_MACH_ARC601 0x00000004 +#define E_ARC_MACH_ARC700 0x00000003 +#define EF_ARC_CPU_ARCV2EM 0x00000005 +#define EF_ARC_CPU_ARCV2HS 0x00000006 +#define EF_ARC_CPU_ARC64 0x00000007 + +/* ARC Linux specific ABIs. */ +#define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */ +#define E_ARC_OSABI_V2 0x00000200 +#define E_ARC_OSABI_V3 0x00000300 +#define E_ARC_OSABI_V4 0x00000400 +#define E_ARC_OSABI_CURRENT E_ARC_OSABI_V4 +/* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. */ + +/* Processor specific values for the Shdr sh_type field. */ +#define SHT_ARC_ATTRIBUTES (SHT_LOPROC + 1) /* ARC attributes section. */ /* ARCompact/ARCv2 specific relocs. */ -#define R_ARC_NONE 0x0 -#define R_ARC_8 0x1 -#define R_ARC_16 0x2 -#define R_ARC_24 0x3 -#define R_ARC_32 0x4 -#define R_ARC_B26 0x5 -#define R_ARC_B22_PCREL 0x6 -#define R_ARC_H30 0x7 -#define R_ARC_N8 0x8 -#define R_ARC_N16 0x9 -#define R_ARC_N24 0xA -#define R_ARC_N32 0xB -#define R_ARC_SDA 0xC -#define R_ARC_SECTOFF 0xD -#define R_ARC_S21H_PCREL 0xE -#define R_ARC_S21W_PCREL 0xF +#define R_ARC_NONE 0x00 +#define R_ARC_8 0x01 +#define R_ARC_16 0x02 +#define R_ARC_24 0x03 +#define R_ARC_32 0x04 + +#define R_ARC_B22_PCREL 0x06 +#define R_ARC_H30 0x07 +#define R_ARC_N8 0x08 +#define R_ARC_N16 0x09 +#define R_ARC_N24 0x0A +#define R_ARC_N32 0x0B +#define R_ARC_SDA 0x0C +#define R_ARC_SECTOFF 0x0D +#define R_ARC_S21H_PCREL 0x0E +#define R_ARC_S21W_PCREL 0x0F #define R_ARC_S25H_PCREL 0x10 #define R_ARC_S25W_PCREL 0x11 #define R_ARC_SDA32 0x12 @@ -4203,16 +4229,23 @@ enum #define R_ARC_SECTOFF_ME_2 0x2A #define R_ARC_SECTOFF_1 0x2B #define R_ARC_SECTOFF_2 0x2C +#define R_ARC_SDA_12 0x2D +#define R_ARC_SDA16_ST2 0x30 +#define R_ARC_32_PCREL 0x31 #define R_ARC_PC32 0x32 #define R_ARC_GOTPC32 0x33 #define R_ARC_PLT32 0x34 #define R_ARC_COPY 0x35 #define R_ARC_GLOB_DAT 0x36 -#define R_ARC_JUMP_SLOT 0x37 +#define R_ARC_JMP_SLOT 0x37 #define R_ARC_RELATIVE 0x38 #define R_ARC_GOTOFF 0x39 #define R_ARC_GOTPC 0x3A #define R_ARC_GOT32 0x3B +#define R_ARC_S21W_PCREL_PLT 0x3C +#define R_ARC_S25H_PCREL_PLT 0x3D + +#define R_ARC_JLI_SECTOFF 0x3F #define R_ARC_TLS_DTPMOD 0x42 #define R_ARC_TLS_DTPOFF 0x43 @@ -4221,9 +4254,12 @@ enum #define R_ARC_TLS_GD_LD 0x46 #define R_ARC_TLS_GD_CALL 0x47 #define R_ARC_TLS_IE_GOT 0x48 -#define R_ARC_TLS_DTPOFF_S9 0x4a -#define R_ARC_TLS_LE_S9 0x4a -#define R_ARC_TLS_LE_32 0x4b +#define R_ARC_TLS_DTPOFF_S9 0x49 +#define R_ARC_TLS_LE_S9 0x4A +#define R_ARC_TLS_LE_32 0x4B +#define R_ARC_S25W_PCREL_PLT 0x4C +#define R_ARC_S21H_PCREL_PLT 0x4D +#define R_ARC_NPS_CMEM16 0x4E /* OpenRISC 1000 specific relocs. */ #define R_OR1K_NONE 0 diff --git a/src/ChangeLog b/src/ChangeLog index d3399a5c..bc58e96a 100644 --- a/src/ChangeLog +++ b/src/ChangeLog @@ -1,3 +1,7 @@ +2022-10-31 Shahab Vahedi + + * elflint.c (valid_e_machine): Add EM_ARC. + 2022-10-28 Arsen Arsenović * readelf.c (options): Add Binutils-style --syms alias. diff --git a/src/elflint.c b/src/elflint.c index 565cffdc..71521d6a 100644 --- a/src/elflint.c +++ b/src/elflint.c @@ -329,7 +329,7 @@ static const int valid_e_machine[] = EM_CRIS, EM_JAVELIN, EM_FIREPATH, EM_ZSP, EM_MMIX, EM_HUANY, EM_PRISM, EM_AVR, EM_FR30, EM_D10V, EM_D30V, EM_V850, EM_M32R, EM_MN10300, EM_MN10200, EM_PJ, EM_OPENRISC, EM_ARC_A5, EM_XTENSA, EM_ALPHA, - EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF, EM_RISCV, EM_CSKY + EM_TILEGX, EM_TILEPRO, EM_AARCH64, EM_BPF, EM_RISCV, EM_CSKY, EM_ARC }; #define nvalid_e_machine \ (sizeof (valid_e_machine) / sizeof (valid_e_machine[0]))