From patchwork Thu Oct 20 09:32:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59131 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C93F63AAA076 for ; Thu, 20 Oct 2022 09:33:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C93F63AAA076 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258428; bh=N64IVYqRs1KZ0jngodYFomJBw/rxpI0DP8JOnKm7jmI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ukTb03gNMk9ohlWQTgD587USkdMJ6Ifb7aH29HSXK7tr7GuZsGiw8BMJahXgnUSg+ lgvlMzzu4FsS3fU2SG96m+R59Lm6zOUOV7xgOUOvABz8jH6VevqvKxwhELFEWRYEJW zwa2gx6okPGjzpzArtHQXVrBAXxKwHbKeJ2ZUgnA= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 13B8139494B3 for ; Thu, 20 Oct 2022 09:33:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 13B8139494B3 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 66F38300089; Thu, 20 Oct 2022 09:33:04 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib Date: Thu, 20 Oct 2022 09:32:06 +0000 Message-Id: <8b99d666e78ba5b9d32c7889a2161c70b3da88df.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Gnulib generates a warning if the system version of certain functions are used (to redirect the developer to use Gnulib version). It caused a compiler error when... - Compiled with Clang - -Werror is specified (by default) - C++ standard used by Clang is before C++17 (by default as of 15.0.0) when this unit test is activated. This issue is raised as PR28413. However, previous proposal to fix this issue (a "fix" to Gnulib): was rejected because it ruins the intent of Gnulib warnings. So, we need a Binutils/GDB-side solution. This commit tries to address this issue on the GDB side. We have "include/diagnostics.h" to disable certain warnings only when necessary. This commit suppresses the Gnulib warnings by surrounding entire #include block with DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS to disable Gnulib- generated warnings on all standard C++ header files. --- gdb/unittests/string_view-selftests.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/gdb/unittests/string_view-selftests.c b/gdb/unittests/string_view-selftests.c index 2d7261d18d3..441d533b54e 100644 --- a/gdb/unittests/string_view-selftests.c +++ b/gdb/unittests/string_view-selftests.c @@ -23,6 +23,11 @@ #define GNULIB_NAMESPACE gnulib +#include "diagnostics.h" + +DIAGNOSTIC_PUSH +DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS + #include "defs.h" #include "gdbsupport/selftest.h" #include "gdbsupport/gdb_string_view.h" @@ -34,6 +39,8 @@ #include #include +DIAGNOSTIC_POP + /* libstdc++'s testsuite uses VERIFY. */ #define VERIFY SELF_CHECK From patchwork Thu Oct 20 09:32:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59144 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7927C3850207 for ; Thu, 20 Oct 2022 09:36:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7927C3850207 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258595; bh=a39D+JEBFWkt60Xlc0Ik9VXp/KP0HhLBkvIl/XwRUvo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=SOrAglsKbC4m+gKpNTszmxX6lMa/oK0fo3pCabf6nJql/wfaIAaJhpUD/FJzeRWM/ 1foQNqH5S+3MjO8tqaoejagE5VUA2OZOwtCKtTina+rEUF1IfwZA0Yz7z4vDHrbrWd Sq3moO/hXnVw/TfhOo3h8KMbXOgVFGtgWTS0xC/E= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 91B883AA9C32 for ; Thu, 20 Oct 2022 09:33:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 91B883AA9C32 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id E4ED1300089; Thu, 20 Oct 2022 09:33:14 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 02/40] sim: Check known getrusage declaration existence Date: Thu, 20 Oct 2022 09:32:07 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). Such getrusage function declarations are placed in three files under sim/ppc and to avoid defining those on the modern environments, this commit will make the configuration script to find the known declaration of getrusage and defines HAVE_DECL_GETRUSAGE if it finds one. If we find one (and we *will* in most modern environments), we don't need to rely on the deprecated declarations. --- sim/config.h.in | 4 ++++ sim/configure | 32 ++++++++++++++++++++++++++++++++ sim/configure.ac | 10 ++++++++++ 3 files changed, 46 insertions(+) diff --git a/sim/config.h.in b/sim/config.h.in index 9a94b289e46..bc7ec588ec6 100644 --- a/sim/config.h.in +++ b/sim/config.h.in @@ -44,6 +44,10 @@ /* Is the prototype for getopt in in the expected format? */ #undef HAVE_DECL_GETOPT +/* Is the prototype for getrusage in in the expected format? + */ +#undef HAVE_DECL_GETRUSAGE + /* Define to 1 if you have the declaration of `tzname', and to 0 if you don't. */ #undef HAVE_DECL_TZNAME diff --git a/sim/configure b/sim/configure index dac7f085be1..fbdd256d374 100755 --- a/sim/configure +++ b/sim/configure @@ -16460,6 +16460,38 @@ $as_echo "#define HAVE_DECL_GETOPT 1" >>confdefs.h fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a known getrusage prototype in sys/resource.h" >&5 +$as_echo_n "checking for a known getrusage prototype in sys/resource.h... " >&6; } +if ${sim_cv_decl_getrusage_sys_resource_h+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +int +main () +{ +extern int getrusage (int, struct rusage *); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + sim_cv_decl_getrusage_sys_resource_h=yes +else + sim_cv_decl_getrusage_sys_resource_h=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi + +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $sim_cv_decl_getrusage_sys_resource_h" >&5 +$as_echo "$sim_cv_decl_getrusage_sys_resource_h" >&6; } +if test $sim_cv_decl_getrusage_sys_resource_h = yes; then + +$as_echo "#define HAVE_DECL_GETRUSAGE 1" >>confdefs.h + +fi + diff --git a/sim/configure.ac b/sim/configure.ac index be0cfdbea32..9411fc10f9d 100644 --- a/sim/configure.ac +++ b/sim/configure.ac @@ -187,6 +187,16 @@ if test $sim_cv_decl_getopt_unistd_h = yes; then [Is the prototype for getopt in in the expected format?]) fi +AC_MSG_CHECKING(for a known getrusage prototype in sys/resource.h) +AC_CACHE_VAL(sim_cv_decl_getrusage_sys_resource_h, +[AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include ], [extern int getrusage (int, struct rusage *);])], +sim_cv_decl_getrusage_sys_resource_h=yes, sim_cv_decl_getrusage_sys_resource_h=no)]) +AC_MSG_RESULT($sim_cv_decl_getrusage_sys_resource_h) +if test $sim_cv_decl_getrusage_sys_resource_h = yes; then + AC_DEFINE([HAVE_DECL_GETRUSAGE], 1, + [Is the prototype for getrusage in in the expected format?]) +fi + dnl These are unfortunate. They are conditionally called by other sim macros dnl but always used by common/Make-common.in. So we have to subst here even dnl when the rest of the code is in the respective macros. Once we merge the From patchwork Thu Oct 20 09:32:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59137 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 97D853933334 for ; Thu, 20 Oct 2022 09:35:26 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 97D853933334 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258526; bh=B5G44DajOyB10PokRhettBJ6jvso4sYKEZzAjZcSbBg=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=t4ln7uPjM0eJ8qF/f6IIOaA2gI/rQfxkcsWL/YCYw7gjQmGgebN6qse0ImAyTuZb9 1eQhEyb5eH1B98k5ydIVEVsAkwlfwccRqGYSUkMDa5TmRBy8H7xipdn2UUDiXU3syo wxI5h0SkattMnBANYO7b7KQAJUAaT4miCVdxZvQI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 19192382EA0E for ; Thu, 20 Oct 2022 09:33:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 19192382EA0E Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 6E2A7300089; Thu, 20 Oct 2022 09:33:25 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 03/40] sim/aarch64: Remove unused functions Date: Thu, 20 Oct 2022 09:32:08 +0000 Message-Id: <796962a87e569feeafb5ef636de3c79000ae152c.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a unused static function ("-Wunused-function"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit removes unused functions from the AArch64 simulator. --- sim/aarch64/simulator.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c index 516a7830522..5881725cefd 100644 --- a/sim/aarch64/simulator.c +++ b/sim/aarch64/simulator.c @@ -83,22 +83,6 @@ } \ while (0) -/* Helper functions used by expandLogicalImmediate. */ - -/* for i = 1, ... N result = 1 other bits are zero */ -static inline uint64_t -ones (int N) -{ - return (N == 64 ? (uint64_t)-1UL : ((1UL << N) - 1)); -} - -/* result<0> to val */ -static inline uint64_t -pickbit (uint64_t val, int N) -{ - return pickbits64 (val, N, N); -} - static uint64_t expand_logical_immediate (uint32_t S, uint32_t R, uint32_t N) { From patchwork Thu Oct 20 09:32:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59146 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E6475383FBAF for ; Thu, 20 Oct 2022 09:37:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E6475383FBAF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258627; bh=JxV3ciybJkNqNC9aG2pC+dxADzmKpySrBJqCnJyoR7Q=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=d7vclgde9h5LIU9uenH04rLpSj4DFjF7ibw4yR6hAdIan/gkblhHmz8xkV0pa1WRO yH/6HtggEUFj2kIo8tuWuAPHj1B3LzI5fqWr+MnxENsZ7aoNW4E8yRctmcDYN3PvwX 8OfQ3YJA/00xqGt8pDKsiVpna45T8iAS0Toa0x8Y= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 92548383159B for ; Thu, 20 Oct 2022 09:33:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 92548383159B Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id EAF14300089; Thu, 20 Oct 2022 09:33:35 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU Date: Thu, 20 Oct 2022 09:32:09 +0000 Message-Id: <65223c79fdfd7faf132275415cd9da9852c5bec3.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" GCC / Clang generate a warning if a variable may be used uninitialized on some cases (Clang: "-Wsometimes-uninitialized"). When the program is being built by Clang with the default configuration, it causes a build failure (unless "--disable-werror" is specified). Those error occur on sim/cris/semcrisv{10,32}f-switch.c but they are CGEN-generated files. The real cause of this problem is in cpu/cris.cpu which does not initialize certain variables. This commit ensures such variables are initialized to zero by default. Note that this commit itself does not regenerate CRIS CPU related files with CGEN because it still has several issues preventing regeneration. They are to be fixed in the later commits. cpu/ChangeLog: * cris.cpu: Initialize condres, newval and tmpres variables. --- cpu/cris.cpu | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cpu/cris.cpu b/cpu/cris.cpu index 97b44581e78..cd85f4e94e2 100644 --- a/cpu/cris.cpu +++ b/cpu/cris.cpu @@ -541,6 +541,7 @@ (sequence BI ((SI tmpcond) (BI condres)) + (set condres 0) (set tmpcond condno) (.splice cond @@ -2655,6 +2656,7 @@ (sequence ((SI rno) (SI newval)) (set rno (regno Pd)) + (set newval 0) (.splice cond ; No sanity check for constant special register here, since the @@ -3698,6 +3700,7 @@ (sequence SI ((SI tmpcode) (SI tmpval) (SI tmpres)) + (set tmpres 0) (set tmpcode swapcode) (set tmpval val) (.splice From patchwork Thu Oct 20 09:32:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59136 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id ED814383A5EC for ; Thu, 20 Oct 2022 09:35:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ED814383A5EC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258511; bh=0V/tdGhkIsaaiO8Fr+ntbQ2+n7+CJ8QCkEclPJyfQjw=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=aSO6+vwgfQD1vthB7LCS8a/HvUnyJKN9Q05Tynuo/OPeDeoKhmV78VCAOJVBGfmfq Vt8klOVH8c8YuZdIzOS4P36FuAAQzGvosrBdGDpqp8xXrkoQJhfBJO3h6+Vz0VVsS8 +NBOwq22OnApysiyNyfhzagVnPMaVq/8rYPGlsqA= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 257D73860767 for ; Thu, 20 Oct 2022 09:33:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 257D73860767 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 74B9D300089; Thu, 20 Oct 2022 09:33:46 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32 Date: Thu, 20 Oct 2022 09:32:10 +0000 Message-Id: <24baefe92148f4b7968115ba13de9b0c863a65f6.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Because CRIS v32 model does not define u-stall virtual unit, CGEN-generated sim/cris/decodev32.h does not define the function declaration of crisv32f_model_crisv32_u_stall. It led to a hack in commit 4e6e8ba7c565 ("sim: cris: clean up missing func prototype warnings"), manually adding the declaration of crisv32f_model_crisv32_u_stall. To **not** touch CGEN-generated files manually, this commit adds u-stall virtual unit for CRIS v32 to let CGEN generate the function declaration of crisv32f_model_crisv32_u_stall automatically. This is still hackish but less than the previous one. cpu/ChangeLog: * cris.cpu: Add u-stall virtual unit to CRIS v32. --- cpu/cris.cpu | 1 + 1 file changed, 1 insertion(+) diff --git a/cpu/cris.cpu b/cpu/cris.cpu index cd85f4e94e2..a2d054f954c 100644 --- a/cpu/cris.cpu +++ b/cpu/cris.cpu @@ -284,6 +284,7 @@ (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ()) (unit u-const32 "Fetch 32-bit operand" () 1 1 () () () ()) (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ()) + (unit u-stall "Stall unit" () 1 1 () () () ()) ; For v32, we need to keep track of inputs (for movem destination ; cycle penalties) and output (for e.g. memory source and jump From patchwork Thu Oct 20 09:32:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59140 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 66D4C38CE996 for ; Thu, 20 Oct 2022 09:36:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 66D4C38CE996 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258560; bh=wSc7GsQVfWfQxciF0C3o8qc3GaZdVuMxvyAiY+Il5HY=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=qesNRn3FL1evzaa5LM1rRwpsqF+9f85yyrV0Al1CCPMyH23DYDbHMGpjNO+PHIMr1 oBS0P9w9Tfn/QLUM2m8XyiVcDdyaN6tOPMfRT5vH9z1bJPlGaJD8Mrx6g6MpSe5wVp R4YhpwRWkMTUIdZSeik4UjMT+0qD9t91kYTBNmLU= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id A4AA53830382 for ; Thu, 20 Oct 2022 09:33:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A4AA53830382 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 0343F300089; Thu, 20 Oct 2022 09:33:56 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 06/40] sim/cris: Move declarations of f_specific_init Date: Thu, 20 Oct 2022 09:32:11 +0000 Message-Id: <3904a5c3e80f8548150d8088a92059dd728c7ff8.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Declarations for MY (f_specific_init) functions are defined in CGEN- generated header files: sim/cris/decodev10.h (crisv10f_specific_init) and sim/cris/decodev32.h (crisv32f_specific_init). However, those declarations are manually added by the commit 4e6e8ba7c565 ("sim: cris: clean up missing func prototype warnings") as a hack and not a CGEN-generated part. Those definitions are required by $(builddir)/sim/cris/mloopv{10,32}f.c, generated from $(srcdir)/sim/cris/mloop.in. If we define a declaration in mloop.in, we no longer need manually added one. This commit adds a template for function declaration so that we no longer have to touch CGEN-generated code. With this and the previous commit "cpu/cris: Add stall unit to CRIS v32", we can now safely regenerate CRIS CPU declarations with CGEN. --- sim/cris/cris-tmpl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c index 9f0c06e755e..8694d38b2af 100644 --- a/sim/cris/cris-tmpl.c +++ b/sim/cris/cris-tmpl.c @@ -264,6 +264,8 @@ MY (make_thread_cpu_data) (SIM_CPU *current_cpu, void *context) /* Hook function for per-cpu simulator initialization. */ +extern void MY (f_specific_init) (SIM_CPU *); + void MY (f_specific_init) (SIM_CPU *current_cpu) { From patchwork Thu Oct 20 09:32:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59151 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A3BFF392B8F1 for ; Thu, 20 Oct 2022 09:37:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A3BFF392B8F1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258660; bh=m/rtH/VKkbVKFMtdSHn0eho7NdrXEF175jcMkuXR46w=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=xvFTmHbBHbCepAMzELFJ+NK7AFOEi5077wmZcFNmmzSpLtdhIvJcl2JOYlTtaYOUZ Gapw0HBrf1r/PWvK2M53se/DidlFmE0l1ZnINEa2cXiHrA/jrsOiPQcUfjZkT9LFjO WuGuDCFOqbmtsT8zh0LD5T02IQ36yyroVRHE9bB4= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 52CD93835556 for ; Thu, 20 Oct 2022 09:34:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 52CD93835556 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 80030300089; Thu, 20 Oct 2022 09:34:07 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 07/40] sim/cris: Regenerate with CGEN Date: Thu, 20 Oct 2022 09:32:12 +0000 Message-Id: <69ef2d7dd519ed572511890a215a0f6d74e53384.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" All CRIS-related files are regenerated by custom CGEN that is modified by the author (CGEN change will be separately upstreamed). --- sim/cris/arch.c | 5 +++-- sim/cris/arch.h | 21 +++++++++++++++------ sim/cris/cpuall.h | 5 +++-- sim/cris/cpuv10.c | 6 ++++-- sim/cris/cpuv10.h | 5 +++-- sim/cris/cpuv32.c | 6 ++++-- sim/cris/cpuv32.h | 5 +++-- sim/cris/decodev10.c | 21 +++++++++++---------- sim/cris/decodev10.h | 6 +++--- sim/cris/decodev32.c | 21 +++++++++++---------- sim/cris/decodev32.h | 8 ++++---- sim/cris/modelv10.c | 5 +++-- sim/cris/modelv32.c | 5 +++-- sim/cris/semcrisv10f-switch.c | 20 +++++++++++++------- sim/cris/semcrisv32f-switch.c | 20 +++++++++++++------- 15 files changed, 96 insertions(+), 63 deletions(-) diff --git a/sim/cris/arch.c b/sim/cris/arch.c index 1d50838f0a1..b502c239fca 100644 --- a/sim/cris/arch.c +++ b/sim/cris/arch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/arch.h b/sim/cris/arch.h index 037b463438d..57d51236c03 100644 --- a/sim/cris/arch.h +++ b/sim/cris/arch.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,13 +17,22 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef CRIS_ARCH_H #define CRIS_ARCH_H +#define TARGET_BIG_ENDIAN 1 + +#define WI SI +#define UWI USI +#define AI USI + +#define IAI USI + /* Enum declaration for model types. */ typedef enum model_type { MODEL_CRISV10, MODEL_CRISV32, MODEL_MAX @@ -36,10 +45,10 @@ typedef enum unit_type { UNIT_NONE, UNIT_CRISV10_U_MOVEM, UNIT_CRISV10_U_MULTIPLY, UNIT_CRISV10_U_SKIP4 , UNIT_CRISV10_U_STALL, UNIT_CRISV10_U_CONST32, UNIT_CRISV10_U_CONST16, UNIT_CRISV10_U_MEM , UNIT_CRISV10_U_EXEC, UNIT_CRISV32_U_EXEC_TO_SR, UNIT_CRISV32_U_EXEC_MOVEM, UNIT_CRISV32_U_EXEC - , UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16, UNIT_CRISV32_U_JUMP - , UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH, UNIT_CRISV32_U_MULTIPLY - , UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W, UNIT_CRISV32_U_MEM_R - , UNIT_CRISV32_U_MEM, UNIT_MAX + , UNIT_CRISV32_U_STALL, UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16 + , UNIT_CRISV32_U_JUMP, UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH + , UNIT_CRISV32_U_MULTIPLY, UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W + , UNIT_CRISV32_U_MEM_R, UNIT_CRISV32_U_MEM, UNIT_MAX } UNIT_TYPE; #define MAX_UNITS (4) diff --git a/sim/cris/cpuall.h b/sim/cris/cpuall.h index 145646f4ed0..c600f5d3a31 100644 --- a/sim/cris/cpuall.h +++ b/sim/cris/cpuall.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/cpuv10.c b/sim/cris/cpuv10.c index d53aa556e73..d188590e486 100644 --- a/sim/cris/cpuv10.c +++ b/sim/cris/cpuv10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -490,3 +491,4 @@ crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval) { CPU (h_prefixreg_pre_v32) = newval; } + diff --git a/sim/cris/cpuv10.h b/sim/cris/cpuv10.h index 30555c8244e..296279ff918 100644 --- a/sim/cris/cpuv10.h +++ b/sim/cris/cpuv10.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/cpuv32.c b/sim/cris/cpuv32.c index ad9af980aa1..997ef2c7533 100644 --- a/sim/cris/cpuv32.c +++ b/sim/cris/cpuv32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -586,3 +587,4 @@ crisv32f_h_prefixreg_v32_set (SIM_CPU *current_cpu, SI newval) { SET_H_PREFIXREG_V32 (newval); } + diff --git a/sim/cris/cpuv32.h b/sim/cris/cpuv32.h index b23eff4f52a..affb72f99b8 100644 --- a/sim/cris/cpuv32.h +++ b/sim/cris/cpuv32.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c index 257961ae160..ebf511c1a2d 100644 --- a/sim/cris/decodev10.c +++ b/sim/cris/decodev10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -41,12 +42,12 @@ static IDESC crisv10f_insn_data[CRISV10F_INSN__MAX]; static const struct insn_sem crisv10f_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY }, { CRIS_INSN_NOP, CRISV10F_INSN_NOP, CRISV10F_SFMT_NOP }, { CRIS_INSN_MOVE_B_R, CRISV10F_INSN_MOVE_B_R, CRISV10F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_W_R, CRISV10F_INSN_MOVE_W_R, CRISV10F_SFMT_MOVE_B_R }, @@ -254,7 +255,7 @@ static const struct insn_sem crisv10f_insn_sem[] = static const struct insn_sem crisv10f_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ @@ -303,7 +304,7 @@ crisv10f_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = crisv10f_insn_sem, tend = t + ARRAY_SIZE (crisv10f_insn_sem); + for (t = crisv10f_insn_sem, tend = t + sizeof (crisv10f_insn_sem) / sizeof (*t); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); diff --git a/sim/cris/decodev10.h b/sim/cris/decodev10.h index c742c2fe9c6..a3307ad8d21 100644 --- a/sim/cris/decodev10.h +++ b/sim/cris/decodev10.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -30,7 +31,6 @@ extern const IDESC *crisv10f_decode (SIM_CPU *, IADDR, extern void crisv10f_init_idesc_table (SIM_CPU *); extern void crisv10f_sem_init_idesc_table (SIM_CPU *); extern void crisv10f_semf_init_idesc_table (SIM_CPU *); -extern void crisv10f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv10f. */ typedef enum crisv10f_insn_type { diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c index d6afafa377f..c382f9f6b2f 100644 --- a/sim/cris/decodev32.c +++ b/sim/cris/decodev32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -41,12 +42,12 @@ static IDESC crisv32f_insn_data[CRISV32F_INSN__MAX]; static const struct insn_sem crisv32f_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY }, { CRIS_INSN_MOVE_B_R, CRISV32F_INSN_MOVE_B_R, CRISV32F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_W_R, CRISV32F_INSN_MOVE_W_R, CRISV32F_SFMT_MOVE_B_R }, { CRIS_INSN_MOVE_D_R, CRISV32F_INSN_MOVE_D_R, CRISV32F_SFMT_MOVE_D_R }, @@ -258,7 +259,7 @@ static const struct insn_sem crisv32f_insn_sem[] = static const struct insn_sem crisv32f_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ @@ -307,7 +308,7 @@ crisv32f_init_idesc_table (SIM_CPU *cpu) init_idesc (cpu, id, t); /* Now fill in the values for the chosen cpu. */ - for (t = crisv32f_insn_sem, tend = t + ARRAY_SIZE (crisv32f_insn_sem); + for (t = crisv32f_insn_sem, tend = t + sizeof (crisv32f_insn_sem) / sizeof (*t); t != tend; ++t) { init_idesc (cpu, & table[t->index], t); diff --git a/sim/cris/decodev32.h b/sim/cris/decodev32.h index aae993b7881..94c483b03a1 100644 --- a/sim/cris/decodev32.h +++ b/sim/cris/decodev32.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -30,7 +31,6 @@ extern const IDESC *crisv32f_decode (SIM_CPU *, IADDR, extern void crisv32f_init_idesc_table (SIM_CPU *); extern void crisv32f_sem_init_idesc_table (SIM_CPU *); extern void crisv32f_semf_init_idesc_table (SIM_CPU *); -extern void crisv32f_specific_init (SIM_CPU *); /* Enum declaration for instructions in cpu family crisv32f. */ typedef enum crisv32f_insn_type { @@ -126,8 +126,8 @@ typedef enum crisv32f_sfmt_type { extern int crisv32f_model_crisv32_u_exec_to_sr (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Pd*/); extern int crisv32f_model_crisv32_u_exec_movem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Rd*/); extern int crisv32f_model_crisv32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rd*/, INT /*Rs*/, INT /*Rd*/); -extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_stall (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); +extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const32 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_const16 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); extern int crisv32f_model_crisv32_u_jump (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Pd*/); diff --git a/sim/cris/modelv10.c b/sim/cris/modelv10.c index 2ff4f5262b2..1f0d5fa367d 100644 --- a/sim/cris/modelv10.c +++ b/sim/cris/modelv10.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c index 86087f99ff4..f056fd41c26 100644 --- a/sim/cris/modelv32.c +++ b/sim/cris/modelv32.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c index f31b29442fd..a2f1505405e 100644 --- a/sim/cris/semcrisv10f-switch.c +++ b/sim/cris/semcrisv10f-switch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -260,7 +261,7 @@ This file is part of the GNU simulators. /* If hyper-fast [well not unnecessarily slow] execution is selected, turn off frills like tracing and profiling. */ -/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something +/* FIXME: A better way would be to have TRACE_RESULT check for something that can cause it to be optimized out. Another way would be to emit special handlers into the instruction "stream". */ @@ -3379,6 +3380,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); SI tmp_rno; SI tmp_newval; tmp_rno = FLD (f_operand2); + tmp_newval = 0; if (EQSI (tmp_rno, 5)) { tmp_newval = EXTHISI (({ SI tmp_addr; HI tmp_tmp_mem; @@ -10993,7 +10995,8 @@ SET_H_VBIT_MOVE (0); tmp_tmpd = ({ SI tmp_tmpcode; SI tmp_tmpval; SI tmp_tmpres; - tmp_tmpcode = FLD (f_operand2); + tmp_tmpres = 0; +; tmp_tmpcode = FLD (f_operand2); ; tmp_tmpval = tmp_tmps; ; if (EQSI (tmp_tmpcode, 0)) { tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); @@ -12060,7 +12063,8 @@ if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -12192,7 +12196,8 @@ if (tmp_truthval) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -13065,7 +13070,8 @@ SET_H_VBIT_MOVE (0); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c index ab15d6ee36c..bf06e8aa6ca 100644 --- a/sim/cris/semcrisv32f-switch.c +++ b/sim/cris/semcrisv32f-switch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2022 Free Software Foundation, Inc. +Copyright (C) 1996-2022 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see . + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -264,7 +265,7 @@ This file is part of the GNU simulators. /* If hyper-fast [well not unnecessarily slow] execution is selected, turn off frills like tracing and profiling. */ -/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something +/* FIXME: A better way would be to have TRACE_RESULT check for something that can cause it to be optimized out. Another way would be to emit special handlers into the instruction "stream". */ @@ -3291,6 +3292,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register"); SI tmp_rno; SI tmp_newval; tmp_rno = FLD (f_operand2); + tmp_newval = 0; if (EQSI (tmp_rno, 2)) { tmp_newval = ({ SI tmp_addr; SI tmp_tmp_mem; @@ -11263,7 +11265,8 @@ SET_H_VBIT_MOVE (0); tmp_tmpd = ({ SI tmp_tmpcode; SI tmp_tmpval; SI tmp_tmpres; - tmp_tmpcode = FLD (f_operand2); + tmp_tmpres = 0; +; tmp_tmpcode = FLD (f_operand2); ; tmp_tmpval = tmp_tmps; ; if (EQSI (tmp_tmpcode, 0)) { tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0); @@ -12460,7 +12463,8 @@ crisv32f_rfg_handler (current_cpu, pc); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -12592,7 +12596,8 @@ if (tmp_truthval) { BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } @@ -13380,7 +13385,8 @@ SET_H_VBIT_MOVE (0); BI tmp_truthval; tmp_truthval = ({ SI tmp_tmpcond; BI tmp_condres; - tmp_tmpcond = FLD (f_operand2); + tmp_condres = 0; +; tmp_tmpcond = FLD (f_operand2); ; if (EQSI (tmp_tmpcond, 0)) { tmp_condres = NOTBI (CPU (h_cbit)); } From patchwork Thu Oct 20 09:32:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59143 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 506263838B9F for ; Thu, 20 Oct 2022 09:36:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 506263838B9F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258595; bh=mh5pcwfk7F0V3+jIBs86h22ivIAPp2tE8vB0Aj6IkAk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=BQrCRM+QDwUzZt9/kNWATnDyVCg6QXK5fWMwyn3yeuZ4ILCMZOxYNeebCJHbftux/ 4iiabU+H8sHidXj6de22GuPeFCIAI1AUBvNLdIKGWx1z7gH1nS/ByW8FfflAJmoYTM MjT7D2xBD1qADTQm7aZHgRPq3wlLxWKWuHBMWOw0= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id CAEED38E52DA for ; Thu, 20 Oct 2022 09:34:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CAEED38E52DA Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 0EB06300089; Thu, 20 Oct 2022 09:34:18 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 08/40] sim/erc32: Insert void parameter Date: Thu, 20 Oct 2022 09:32:13 +0000 Message-Id: <26a3eaf4f5d2e0db6977738ddfd65d82b36e38b2.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit replaces () with (void) to avoid this warning. --- sim/erc32/func.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sim/erc32/func.c b/sim/erc32/func.c index 4d1942065b8..af92c9f7d48 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg) #ifdef ERRINJ void -errinj() +errinj (void) { int err; @@ -322,7 +322,7 @@ errinj() } void -errinjstart() +errinjstart (void) { if (errper) event(errinj, 0, (random()%errper)); } @@ -855,7 +855,7 @@ event(void (*cfunc) (), int32_t arg, uint64_t delta) #if 0 /* apparently not used */ void -stop_event() +stop_event(void) { } #endif From patchwork Thu Oct 20 09:32:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59135 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A187338E52F4 for ; Thu, 20 Oct 2022 09:35:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A187338E52F4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258508; bh=5elJjbQhbcPSYjFChLwoZplVAFvOG1mbeTzZbnT9G98=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=cX2kUXEeA3agut5p3EU0VDzOZnNQ87JdZGLDHV6Xa1a6BSVczXMpb8VkXklQ/3uon 1YOvrXV4GX5HOJlQJNBb6ugk1r7+nCubTeYcOFvroHU1csSXiPqvTTYCRpZ6zBwv/f 71tL1tYtPqANTcXlLnFI0Nqx8MShmmeJPVeExI6s= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 37D0E3939200 for ; Thu, 20 Oct 2022 09:34:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 37D0E3939200 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 8ADAA300089; Thu, 20 Oct 2022 09:34:28 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 09/40] sim/erc32: Use int32_t as event callback argument Date: Thu, 20 Oct 2022 09:32:14 +0000 Message-Id: <057c2f8392410494c3bc5dc98052246508e6a73e.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if an argument is passed to a function without prototype (zero arguments, even without (void)). Such calls are deprecated forms of indefinite arguments passing ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). To fix that, this commit makes struct evcell to use int32_t as a callback (cfunc) argument of an event. --- sim/erc32/erc32.c | 28 ++++++++++++++-------------- sim/erc32/func.c | 8 ++++---- sim/erc32/sis.h | 4 ++-- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c index 0206c02e6f0..d7cc1f1cf3b 100644 --- a/sim/erc32/erc32.c +++ b/sim/erc32/erc32.c @@ -274,19 +274,19 @@ static void port_init (void); static uint32_t read_uart (uint32_t addr); static void write_uart (uint32_t addr, uint32_t data); static void flush_uart (void); -static void uarta_tx (void); -static void uartb_tx (void); -static void uart_rx (void *arg); -static void uart_intr (void *arg); +static void uarta_tx (int32_t); +static void uartb_tx (int32_t); +static void uart_rx (int32_t); +static void uart_intr (int32_t); static void uart_irq_start (void); -static void wdog_intr (void *arg); +static void wdog_intr (int32_t); static void wdog_start (void); -static void rtc_intr (void *arg); +static void rtc_intr (int32_t); static void rtc_start (void); static uint32_t rtc_counter_read (void); static void rtc_scaler_set (uint32_t val); static void rtc_reload_set (uint32_t val); -static void gpt_intr (void *arg); +static void gpt_intr (int32_t); static void gpt_start (void); static uint32_t gpt_counter_read (void); static void gpt_scaler_set (uint32_t val); @@ -1245,7 +1245,7 @@ flush_uart(void) ATTRIBUTE_UNUSED static void -uarta_tx(void) +uarta_tx(int32_t arg ATTRIBUTE_UNUSED) { while (f1open && fwrite(&uarta_sreg, 1, 1, f1out) != 1); @@ -1261,7 +1261,7 @@ uarta_tx(void) ATTRIBUTE_UNUSED static void -uartb_tx(void) +uartb_tx(int32_t arg ATTRIBUTE_UNUSED) { while (f2open && fwrite(&uartb_sreg, 1, 1, f2out) != 1); if (uart_stat_reg & UARTB_HRE) { @@ -1276,7 +1276,7 @@ uartb_tx(void) ATTRIBUTE_UNUSED static void -uart_rx(void *arg) +uart_rx(int32_t arg ATTRIBUTE_UNUSED) { int32_t rsize; char rxd; @@ -1318,7 +1318,7 @@ uart_rx(void *arg) } static void -uart_intr(void *arg) +uart_intr(int32_t arg ATTRIBUTE_UNUSED) { read_uart(0xE8); /* Check for UART interrupts every 1000 clk */ flush_uart(); /* Flush UART ports */ @@ -1341,7 +1341,7 @@ uart_irq_start(void) /* Watch-dog */ static void -wdog_intr(void *arg) +wdog_intr(int32_t arg ATTRIBUTE_UNUSED) { if (wdog_status == disabled) { wdog_status = stopped; @@ -1379,7 +1379,7 @@ wdog_start(void) static void -rtc_intr(void *arg) +rtc_intr(int32_t arg ATTRIBUTE_UNUSED) { if (rtc_counter == 0) { @@ -1430,7 +1430,7 @@ rtc_reload_set(uint32_t val) } static void -gpt_intr(void *arg) +gpt_intr(int32_t arg ATTRIBUTE_UNUSED) { if (gpt_counter == 0) { mec_irq(12); diff --git a/sim/erc32/func.c b/sim/erc32/func.c index af92c9f7d48..6971ae0129d 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg) #ifdef ERRINJ void -errinj (void) +errinj (int32_t arg ATTRIBUTE_UNUSED) { int err; @@ -887,8 +887,8 @@ advance_time(struct pstate *sregs) { struct evcell *evrem; - void (*cfunc) (); - uint32_t arg; + void (*cfunc) (int32_t); + int32_t arg; uint64_t endtime; #ifdef STAT @@ -926,7 +926,7 @@ int wait_for_irq(void) { struct evcell *evrem; - void (*cfunc) (); + void (*cfunc) (int32_t); int32_t arg; uint64_t endtime; diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index 71033137f2c..36346cae641 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -124,7 +124,7 @@ struct pstate { }; struct evcell { - void (*cfunc) (); + void (*cfunc) (int32_t); int32_t arg; uint64_t time; struct evcell *nxt; @@ -183,7 +183,7 @@ extern void init_signals (void); struct disassemble_info; extern void dis_mem (uint32_t addr, uint32_t len, struct disassemble_info *info); -extern void event (void (*cfunc) (), int32_t arg, uint64_t delta); +extern void event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta); extern void set_int (int32_t level, void (*callback) (), int32_t arg); extern void advance_time (struct pstate *sregs); extern uint32_t now (void); From patchwork Thu Oct 20 09:32:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59139 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 253173837688 for ; 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Thu, 20 Oct 2022 09:34:39 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 10/40] sim/erc32: Use int32_t as IRQ callback argument Date: Thu, 20 Oct 2022 09:32:15 +0000 Message-Id: <8c05aec20557191434485be347d37177a2ec5ff2.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if an argument is passed to a function without prototype (zero arguments, even without (void)). Such calls are deprecated forms of indefinite arguments passing ("-Wdeprecated-non-prototype"). On the default configuration, it (somehow) doesn't cause a build failure but a warning is generated. But because the cause is the same as the issue the author fixed in "sim/erc32: Use int32_t as event callback argument", it would be better to fix it now to prevent problems in the future. To fix the issue, this commit makes struct irqcall to use int32_t as a callback (callback) argument of an IRQ. --- sim/erc32/func.c | 2 +- sim/erc32/sis.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/sim/erc32/func.c b/sim/erc32/func.c index 6971ae0129d..527df172660 100644 --- a/sim/erc32/func.c +++ b/sim/erc32/func.c @@ -874,7 +874,7 @@ init_event(void) } void -set_int(int32_t level, void (*callback) (), int32_t arg) +set_int(int32_t level, void (*callback) (int32_t), int32_t arg) { irqarr[level & 0x0f].callback = callback; irqarr[level & 0x0f].arg = arg; diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index 36346cae641..df6b22c47b0 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -137,7 +137,7 @@ struct estate { }; struct irqcell { - void (*callback) (); + void (*callback) (int32_t); int32_t arg; }; @@ -184,7 +184,7 @@ struct disassemble_info; extern void dis_mem (uint32_t addr, uint32_t len, struct disassemble_info *info); extern void event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta); -extern void set_int (int32_t level, void (*callback) (), int32_t arg); +extern void set_int (int32_t level, void (*callback) (int32_t), int32_t arg); extern void advance_time (struct pstate *sregs); extern uint32_t now (void); extern int wait_for_irq (void); From patchwork Thu Oct 20 09:32:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59153 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 590DD395C028 for ; Thu, 20 Oct 2022 09:38:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 590DD395C028 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258694; bh=r0aaAv7OLLsxbWQ3RLGxINi4GmezOuh09aFpYxc1dNk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=i2OiTz55H8IR/HTAtNChi5I6O91pEHb77dtQIvodfyYhS3JXMPLE2x/iAFX5ufTeF LtQ6b2xZB5eBPfNPm7ogHHgT+EbGy6Znt/58sb+nVMr+vPmvvF7y8XbAx6sTWVeQLC Gw5NI4G4MmDzsn2T8We9it2FnOWA1+S+b358sl8k= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 565FA381F73E for ; Thu, 20 Oct 2022 09:34:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 565FA381F73E Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 96C9D300089; Thu, 20 Oct 2022 09:34:49 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 11/40] cpu/frv: Initialize some variables Date: Thu, 20 Oct 2022 09:32:16 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). Despite that this will not cause a build failure even on the default configuration (with "--enable-werror"), it is better to be fixed. The cause of this warning, sim/frv/sem.c is generated by CGEN from cpu/frv.cpu. This commit adds initialization of some variables that caused GCC warnings. cpu/ChangeLog: * frv.cpu (cmpb): Initialize cc variable. (load-double-gr-u-semantics, clddu) Initialize address variable. --- cpu/frv.cpu | 3 +++ 1 file changed, 3 insertions(+) diff --git a/cpu/frv.cpu b/cpu/frv.cpu index cdb169eddc1..6af8c3ab347 100644 --- a/cpu/frv.cpu +++ b/cpu/frv.cpu @@ -4266,6 +4266,7 @@ "cmpb$pack $GRi,$GRj,$ICCi_1" (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) (sequence ((QI cc)) + (set cc 0) (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) @@ -4655,6 +4656,7 @@ (define-pmacro (load-double-gr-u-semantics) (sequence ((WI address)) + (set address 0) (load-double-semantics 0 DI GR address GRj) (if (ne (index-of GRi) (index-of GRdoublek)) (sequence () @@ -5309,6 +5311,7 @@ (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) (if (eq CCi (or cond 2)) (sequence ((WI address)) + (set address 0) (load-double-semantics 0 DI GR address GRj) (if (ne (index-of GRi) (index-of GRdoublek)) (set GRi address)))) From patchwork Thu Oct 20 09:32:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59147 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AD2F1384B838 for ; Thu, 20 Oct 2022 09:37:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AD2F1384B838 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258628; bh=6MbyPSDWyccNdQGOpn8PqXl6YuGySOgOqdD4aX9G714=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=VsPPzrQfi/lo5TreVNgMewC1+h4kl05aismvt3kh/DDUZYiJjwj5MOPcfaP3wGi2a pzZRlfwNKt8pCj8GhiE3wJyBG5MRGJsHyaljb7qIUqm9vKxJeKDtdePxrB0OA7skGM J+xyc8ahF8r9h3cspwwGLuZsuytVNDsjgjAd72X4= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id CAD5E394260D for ; Thu, 20 Oct 2022 09:35:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CAD5E394260D Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 216DB300089; Thu, 20 Oct 2022 09:35:00 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 12/40] sim/frv: Initialize nesr variable Date: Thu, 20 Oct 2022 09:32:17 +0000 Message-Id: <021dbd238af5dfe74523ed229d2156a155a6bb9e.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). Despite that GCC will not cause a build failure even when "--enable-werror" is specified, it would be nice to get rid of it. This commit initializes the variable nesr when declared. --- sim/frv/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/frv/traps.c b/sim/frv/traps.c index 0c9eacd0bfd..b142c7890ad 100644 --- a/sim/frv/traps.c +++ b/sim/frv/traps.c @@ -432,7 +432,7 @@ frvbf_check_non_excepting_load ( int do_elos; SI NE_flags[2]; SI NE_base; - SI nesr; + SI nesr = 0; SI ne_index; FRV_REGISTER_CONTROL *control; From patchwork Thu Oct 20 09:32:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59141 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8C170392B8FC for ; Thu, 20 Oct 2022 09:36:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8C170392B8FC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258574; bh=MGjjAtofhE6Ai2oDjLokUBs2cW0GuvduJsSG0JqLG4I=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=mM44r9p8B8hJH/qavqfj/61NbTcC7HgDY1aUa9QkheI7OfgOIXhM3DzYMrjAE6Ut3 nkyN4HVfq/zc79ycjxNJS54T8i7S/TM5e23EvEmg1oXLjJMYh36JxPnywERtDps4wb gF3BJB2uvqFe97fmOhjPpHRISmH5HSaFEXQcKDYo= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 5923A39F7B11 for ; Thu, 20 Oct 2022 09:35:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5923A39F7B11 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 9F056300089; Thu, 20 Oct 2022 09:35:10 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 13/40] sim/frv: Initialize some variables Date: Thu, 20 Oct 2022 09:32:18 +0000 Message-Id: <51a03f7097921cc48954210cf99e370ae8982ec8.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This commit is strongly related to "cpu/frv: Initialize some variables" and applies corresponding changes to sim/frv/sem.c. Note: This commit touches CGEN-generated files directly. Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/sem.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sim/frv/sem.c b/sim/frv/sem.c index cc7cbeee318..28610f4eac7 100644 --- a/sim/frv/sem.c +++ b/sim/frv/sem.c @@ -3054,6 +3054,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { QI tmp_cc; + tmp_cc = 0; if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) { tmp_cc = ANDQI (tmp_cc, 7); } else { @@ -4545,6 +4546,7 @@ SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -4591,6 +4593,7 @@ SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (tmp_do_op) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); @@ -6706,6 +6709,7 @@ SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { { SI tmp_address; + tmp_address = 0; if (NESI (FLD (f_GRk), 0)) { { tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); From patchwork Thu Oct 20 09:32:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59145 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 979B1395C045 for ; Thu, 20 Oct 2022 09:36:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 979B1395C045 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258608; bh=+O/2Nf3yFN+IfPKXi+OoTC8HAxlnanxuy/DRnN1lGKA=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZhbTjStoylJ0kLmUcByzPbMT2TkH0uMws7yz40wHc6Xa8Q6Zo1NXd4YGEWbzE8n3r vHkksaUjbsKRRdTp20qRwlXUpdbmHIEOYlyne8dAfLLAyuLvR334N29ULDOwVPv5Um i45TM3yb4H4C/ESeG1DD1GmQ1HGq0ouf9vm/SL04= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id E359E38207CD for ; Thu, 20 Oct 2022 09:35:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E359E38207CD Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 2B98F300089; Thu, 20 Oct 2022 09:35:21 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 14/40] sim/frv: Add explicit casts Date: Thu, 20 Oct 2022 09:32:19 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the FR-V instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/frv/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/frv/decode.c b/sim/frv/decode.c index 307b593e148..9c4a97833ad 100644 --- a/sim/frv/decode.c +++ b/sim/frv/decode.c @@ -39,12 +39,12 @@ static IDESC frvbf_insn_data[FRVBF_INSN__MAX]; static const struct insn_sem frvbf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY }, { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD }, { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD }, { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD }, @@ -792,7 +792,7 @@ static const struct insn_sem frvbf_insn_sem[] = static const struct insn_sem frvbf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:32:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59150 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 44096396E42B for ; Thu, 20 Oct 2022 09:37:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 44096396E42B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258660; bh=cqjVfRw22ZK50iTwDmJFzzfAC5M71DRek8GtIBTQibQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=eOq5izxeVVQ4wDAuIuBNeUq+kS7gCVlExW86IMad15Dbc8wLCDK7CLp2fR9AlFyek 78/sYGsO6XV8pzV71xnpH8gMYJksgH2ZVd+/9FDIq58ux5e40zwvBYwwfpePk+S7TB 0cGGOM9WY9NUMXDZNBdjRaRsYHsbo3aCXkQZUnLQ= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 579103834822 for ; Thu, 20 Oct 2022 09:35:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 579103834822 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A97E4300089; Thu, 20 Oct 2022 09:35:31 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Date: Thu, 20 Oct 2022 09:32:20 +0000 Message-Id: <5ab303a5bdfc1da7832f8fa22f57678c9ef1a5fa.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a redundant self-assignment ("-Wself-assign"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). However, removing self-assignments in step_once function makes the code less readable. Instead, this commit inserts dummy addition to match the comments "Value added == 0". This is redundant but will suppress warnings and matches with other branches better. It will be also optimized away so we can ignore performance impact on this. --- sim/h8300/compile.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 9be7dd565a9..f7d8d590b69 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch? */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0x6; /* Value added == 6. */ @@ -4174,7 +4174,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && h && (6 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0xfa; /* Value added == 0xfa. */ From patchwork Thu Oct 20 09:32:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59156 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8B49C38E9D21 for ; Thu, 20 Oct 2022 09:38:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8B49C38E9D21 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258727; bh=49IUbsfcxVS5X7UmOx7WcoTHJppV20TW+OE+Os7D8Fk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=uu32Gnu22clJ7QrEgUPkQCBf7w+F0/b5DBl533hpRNxyDonUGIp/R6iC8wvvkZ3gv mqhuRTeRgvYdNhpRCZt2hVBsYNg4FJ/E4rczWoKiiPPMBfbjH+azsA/ZBfoKbJ3hJn FcAHJfa4vuRO7Ln4RWFBwauhJwVlWu0f6KwSLhsI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id D58583875A03 for ; Thu, 20 Oct 2022 09:35:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D58583875A03 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 3351C300089; Thu, 20 Oct 2022 09:35:42 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 16/40] sim/lm32: fix some missing function declaration warnings Date: Thu, 20 Oct 2022 09:32:21 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" From: Andrew Burgess In the lm32 simulator, I was seeing some warnings about missing function declarations. The lm32 simulator has a weird header structure, in order to pull in the full cpu.h header we need to define WANT_CPU_LM32BF. This is done in some files, but not in others. Critically, it's not done in some files that then use functions declared in cpu.h In this commit I added the missing #define so that the full cpu.h can be included. After doing this there are still a few functions that are used undeclared, these functions appear to be missing any declarations at all, so I've added some to cpu.h. With this done all the warnings when compiling lm32 are resolved for both gcc and clang, so I've removed the SIM_WERROR_CFLAGS line from Makefile.in, this allows lm32 to build with -Werror. --- sim/lm32/Makefile.in | 3 --- sim/lm32/cpu.h | 11 +++++++++++ sim/lm32/dv-lm32cpu.c | 3 +++ sim/lm32/user.c | 3 +++ 4 files changed, 17 insertions(+), 3 deletions(-) diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index d827b711d45..db15bef47a7 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -24,9 +24,6 @@ SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \ SIM_EXTRA_CLEAN = lm32-clean -# Some modules don't build cleanly yet. -dv-lm32cpu.o mloop.o sem.o traps.o user.o: SIM_WERROR_CFLAGS = - ## COMMON_POST_CONFIG_FRAG arch = lm32 diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h index 05b98be8cf1..d025065f2ba 100644 --- a/sim/lm32/cpu.h +++ b/sim/lm32/cpu.h @@ -163,6 +163,17 @@ struct scache { struct argbuf argbuf; }; +/* From traps.c. */ +extern USI lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0); +extern USI lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern USI lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2); +extern void lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1); +extern USI lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc); +extern USI lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc); + +/* From user.c. */ +extern UINT lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm); + /* Macros to simplify extraction, reading and semantic code. These define and assign the local vars that contain the insn's fields. */ diff --git a/sim/lm32/dv-lm32cpu.c b/sim/lm32/dv-lm32cpu.c index b97580e80a3..15a08eee815 100644 --- a/sim/lm32/dv-lm32cpu.c +++ b/sim/lm32/dv-lm32cpu.c @@ -18,6 +18,9 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + /* This must come before any other includes. */ #include "defs.h" diff --git a/sim/lm32/user.c b/sim/lm32/user.c index 3cc21a208ee..d301d482c1b 100644 --- a/sim/lm32/user.c +++ b/sim/lm32/user.c @@ -21,6 +21,9 @@ /* This must come before any other includes. */ #include "defs.h" +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + #include "sim-main.h" /* Handle user defined instructions. */ From patchwork Thu Oct 20 09:32:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59142 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id ABAEE38B13D6 for ; Thu, 20 Oct 2022 09:36:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ABAEE38B13D6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258583; bh=QWdii4iUfSav0OGT3OIIl+amP8T5LgLr7ez/z5okIAE=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=wSNVe+CIF5XfsfTttAI27WUP1pap3grWvmV+ED+4QHZXTTqlqibD2oLxmPFS22+w0 3hj8yxNICqgOEfd6+tVnZf6HVZbUyYla3GZGp9wKDdYIN00iviCFE0+tXApaeMwvJI 7Jz3A3Fpy2+YVKrm12KDGoHsIgR7vrKgiJeAmc9A= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 65D2A395B438 for ; Thu, 20 Oct 2022 09:35:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 65D2A395B438 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id B41D9300089; Thu, 20 Oct 2022 09:35:52 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 17/40] sim/lm32: Add explicit casts Date: Thu, 20 Oct 2022 09:32:22 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the LatticeMico32 instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN or sim/lm32 to resolve. --- sim/lm32/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/lm32/decode.c b/sim/lm32/decode.c index 9faef289132..889a0de9026 100644 --- a/sim/lm32/decode.c +++ b/sim/lm32/decode.c @@ -39,12 +39,12 @@ static IDESC lm32bf_insn_data[LM32BF_INSN__MAX]; static const struct insn_sem lm32bf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY }, { LM32_INSN_ADD, LM32BF_INSN_ADD, LM32BF_SFMT_ADD }, { LM32_INSN_ADDI, LM32BF_INSN_ADDI, LM32BF_SFMT_ADDI }, { LM32_INSN_AND, LM32BF_INSN_AND, LM32BF_SFMT_ADD }, @@ -111,7 +111,7 @@ static const struct insn_sem lm32bf_insn_sem[] = static const struct insn_sem lm32bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:32:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59148 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AC60338D1B18 for ; Thu, 20 Oct 2022 09:37:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AC60338D1B18 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258643; bh=3LWhfDVBPd2V2FXhMsRF5720kZSZz2r3g09vC5t6G/o=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=TvoawkPzrl+Dwd6r3hOtO07fzsZ47B77rqvRfrUnRG3ScTNHsvCbT/r/JFjhC5Kab GC+LXcleoJI7aKvuU5Aw1DtkrZof/dctsOXPc6oOsZTErUwRoePoJpIdwOTWdsq62l C0gpA5KmDLnfb0ZjrGkdIpLae0QtVUq9RBvrxYHI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 77399395BC29 for ; Thu, 20 Oct 2022 09:36:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 77399395BC29 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id C9A85300089; Thu, 20 Oct 2022 09:36:13 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 19/40] sim/m32r: Initialize "list" variable Date: Thu, 20 Oct 2022 09:32:24 +0000 Message-Id: <6559cc9db4127924fbd8a753b6674c72f466ca24.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" The variable "list" is only initialized when arg1 > 0 and when arg1 == 0, an uninitialized value is passed to translate_endian_h2t function. Although this behavior is harmless, this commit adds initialization to avoid a GCC warning ("-Wmaybe-uninitialized"). --- sim/m32r/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c index 267d54881da..12a87b4a697 100644 --- a/sim/m32r/traps.c +++ b/sim/m32r/traps.c @@ -547,7 +547,7 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num) case TARGET_LINUX_SYS_getgroups32: case TARGET_LINUX_SYS_getgroups: { - gid_t *list; + gid_t *list = NULL; if (arg1 > 0) list = (gid_t *) malloc (arg1 * sizeof(gid_t)); From patchwork Thu Oct 20 09:32:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59160 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0D336389EC5F for ; Thu, 20 Oct 2022 09:39:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0D336389EC5F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258761; bh=2Jyojvpf0wDc6yfE/QUT7dFufCy6iFELlB0jSBeT5oc=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=PGlJikDjhE84uzEJFOgP8kFgmqN5ZEZ13i9C+6vqCIVUJ8OoVdCa74wgWgWXyIcUX rHTLjKVU5sLVBvLl4N8m9tEDdBbaTBROWWK3NkLB2bTY0/KuZe4dy21h+SomqboaKE 5GiVKDjN7JDbS12iuOt4IvY3HHCXpCFen/LjYIcQ= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 07E9F382C7C7 for ; Thu, 20 Oct 2022 09:36:26 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 07E9F382C7C7 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 52FC5300089; Thu, 20 Oct 2022 09:36:24 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 20/40] sim/m32r: Prepare required functions Date: Thu, 20 Oct 2022 09:32:25 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This commit includes necessary header files and creates duplicated declarations from other header files. Duplicated declarations are necessary on M32R because, despite that some m32rbf functions are used by m32rx and m32r2, we cannot include two or more CPU header files: "cpu.h", "cpux.h" and "cpu2.h". --- sim/m32r/m32r2.c | 5 +++++ sim/m32r/m32rx.c | 5 +++++ sim/m32r/sim-if.c | 4 ++++ sim/m32r/traps.c | 15 +++++++++++++++ 4 files changed, 29 insertions(+) diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c index 9c8daa5b8c6..13c2990a6ab 100644 --- a/sim/m32r/m32r2.c +++ b/sim/m32r/m32r2.c @@ -26,6 +26,11 @@ #include "sim-main.h" #include "cgen-mem.h" #include "cgen-ops.h" +#include "decode.h" + +/* From cpu.h. */ +extern CPUREG_FETCH_FN m32rbf_fetch_register; +extern CPUREG_STORE_FN m32rbf_store_register; /* The contents of BUF are in target byte order. */ diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c index 07098036d02..2fde1bb043f 100644 --- a/sim/m32r/m32rx.c +++ b/sim/m32r/m32rx.c @@ -26,6 +26,11 @@ along with this program. If not, see . */ #include "sim-main.h" #include "cgen-mem.h" #include "cgen-ops.h" +#include "decode.h" + +/* From cpu.h. */ +extern CPUREG_FETCH_FN m32rbf_fetch_register; +extern CPUREG_STORE_FN m32rbf_store_register; /* The contents of BUF are in target byte order. */ diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c index 878a0d5f576..3530b8d711c 100644 --- a/sim/m32r/sim-if.c +++ b/sim/m32r/sim-if.c @@ -25,6 +25,7 @@ #include "sim/callback.h" #include "sim-main.h" +#include "sim-hw.h" #include "sim-options.h" #include "libiberty.h" #include "bfd.h" @@ -33,6 +34,9 @@ #define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */ +/* From cpu.h. */ +void m32rbf_h_cr_set (SIM_CPU *, UINT, USI); + static void free_state (SIM_DESC); static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose); diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c index 12a87b4a697..f0fb218a11d 100644 --- a/sim/m32r/traps.c +++ b/sim/m32r/traps.c @@ -55,6 +55,21 @@ #include #endif +/* From cpu.h, cpux.h and cpu2.h. */ +SI m32rbf_h_gr_get (SIM_CPU *, UINT); +void m32rbf_h_gr_set (SIM_CPU *, UINT, SI); +USI m32rbf_h_cr_get (SIM_CPU *, UINT); +void m32rbf_h_cr_set (SIM_CPU *, UINT, USI); +UQI m32rbf_h_psw_get (SIM_CPU *); +void m32rbf_h_psw_set (SIM_CPU *, UQI); +void m32rbf_h_bpsw_set (SIM_CPU *, UQI); +UQI m32rxf_h_psw_get (SIM_CPU *); +void m32rxf_h_psw_set (SIM_CPU *, UQI); +void m32rxf_h_bpsw_set (SIM_CPU *, UQI); +UQI m32r2f_h_psw_get (SIM_CPU *); +void m32r2f_h_psw_set (SIM_CPU *, UQI); +void m32r2f_h_bpsw_set (SIM_CPU *, UQI); + #define TRAP_LINUX_SYSCALL 2 #define TRAP_FLUSH_CACHE 12 /* The semantic code invokes this for invalid (unrecognized) instructions. */ From patchwork Thu Oct 20 09:32:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59152 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6F9B8382C7F0 for ; Thu, 20 Oct 2022 09:37:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6F9B8382C7F0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258676; bh=/3W2c22l9gOsYeluXtUmFCFw/3nCU20j0c60Xi0SR3A=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=Kb5oSoyy3iggXa7Q8YUbzqoNhR1Ae4oqCqc8j7peiY79dR0fnIyeAUEv/X3ba7UiV 3PFBQLbl86uLN5KOJskNITE4jYHUShJdypqcWNbaVvYsVch/rbzF5NRVeOrSzeI1r9 dP6mrpJlOT/Gd4EW4m5Vj4GPx2VhVAuY4xCKlIPQ= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 7E292395A03A for ; Thu, 20 Oct 2022 09:36:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7E292395A03A Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id CF68D300089; Thu, 20 Oct 2022 09:36:34 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 21/40] sim/m32r: Declare all required functions Date: Thu, 20 Oct 2022 09:32:26 +0000 Message-Id: <4a4ba144b84972f5b244be4d6e0900fbaae8c62f.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This commit declares all required functions in m32r-sim.h. They should be defined in "cpu.h", "cpux.h" and "cpu2.h" but we currently cannot do that. It also moves declarations of four functions out of two #ifndef blocks to make those function available on all cases. --- sim/m32r/m32r-sim.h | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h index 0c5103b0784..189be8868e1 100644 --- a/sim/m32r/m32r-sim.h +++ b/sim/m32r/m32r-sim.h @@ -42,9 +42,6 @@ extern int m32r_decode_gdb_ctrl_regnum (int); #define GET_H_SM() ((CPU (h_psw) & 0x80) != 0) #ifndef GET_H_CR -extern USI m32rbf_h_cr_get_handler (SIM_CPU *, UINT); -extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI); - #define GET_H_CR(regno) \ XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno)) #define SET_H_CR(regno, val) \ @@ -52,9 +49,6 @@ extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI); #endif #ifndef GET_H_PSW -extern UQI m32rbf_h_psw_get_handler (SIM_CPU *); -extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); - #define GET_H_PSW() \ XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu) #define SET_H_PSW(val) \ @@ -68,8 +62,26 @@ extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); The correct solution is to fix the code in cgen/sim.scm to generate prototypes for each of the functions it generates. */ +extern USI m32rbf_h_cr_get_handler (SIM_CPU *, UINT); +extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI); +extern USI m32rxf_h_cr_get_handler (SIM_CPU *, UINT); +extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI); +extern USI m32r2f_h_cr_get_handler (SIM_CPU *, UINT); +extern void m32r2f_h_cr_set_handler (SIM_CPU *, UINT, USI); +extern UQI m32rbf_h_psw_get_handler (SIM_CPU *); +extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); +extern UQI m32rxf_h_psw_get_handler (SIM_CPU *); +extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI); +extern UQI m32r2f_h_psw_get_handler (SIM_CPU *); +extern void m32r2f_h_psw_set_handler (SIM_CPU *, UQI); extern DI m32rbf_h_accum_get_handler (SIM_CPU *); extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI); +extern DI m32rxf_h_accum_get_handler (SIM_CPU *); +extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI); +extern DI m32r2f_h_accum_get_handler (SIM_CPU *); +extern void m32r2f_h_accum_set_handler (SIM_CPU *, DI); +extern DI m32rxf_h_accums_get_handler (SIM_CPU *, UINT); +extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI); extern DI m32r2f_h_accums_get_handler (SIM_CPU *, UINT); extern void m32r2f_h_accums_set_handler (SIM_CPU *, UINT, DI); From patchwork Thu Oct 20 09:32:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59157 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1977138E9D1C for ; Thu, 20 Oct 2022 09:38:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1977138E9D1C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258728; bh=lhPrc6ldQVn5MVnn3m7xcurdBduYWL9K2YcNIO/MAEU=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=bKzE+uWnBkOeMOUWxiZDauWskSOYs0QIlGwfixwsWeYH7MMFAZd3fb34jgYn7qlk+ FKqiygAmrinDKs7yIZUhFPvwcQAlD7hlU7lQDQre8BqK+DSyxXpYSWd7GYIo8JyY2O nW1zaISvwpihNQPfb9QSB84c7zrYCthF/Axu2nSk= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 01B5B3898397 for ; Thu, 20 Oct 2022 09:36:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 01B5B3898397 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 549A6300089; Thu, 20 Oct 2022 09:36:45 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 22/40] sim/m32r: Fixes to Linux emulator Date: Thu, 20 Oct 2022 09:32:27 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" This commit fixes various M32R Linux emulator issues. 1. Some header files were missing a. for ioctl b. for setfsuid/setfsgid (Linux 1.2 or later) c. for flock (a syscall on Linux 2.0 or later) d. for sendfile (Linux 2.2 or later) 2. syslog function must be called as a syscall rather than POSIX syslog because we are emulating Linux system calls on the Linux host. 3. ftime function is deprecated but used intentionally. We have to disable deprecated function warning. --- sim/m32r/traps.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c index f0fb218a11d..de275b06a40 100644 --- a/sim/m32r/traps.c +++ b/sim/m32r/traps.c @@ -20,6 +20,7 @@ /* This must come before any other includes. */ #include "defs.h" +#include "diagnostics.h" #include "portability.h" #include "sim-main.h" #include "sim-signal.h" @@ -38,9 +39,14 @@ NB: The emulation is also missing argument conversion (endian & bitsize) even on Linux hosts. */ #ifdef __linux__ +#include +#include +#include #include #include #include +#include +#include #include #include #include @@ -397,7 +403,10 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num) { struct timeb t; +DIAGNOSTIC_PUSH +DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS result = ftime (&t); +DIAGNOSTIC_POP errcode = errno; if (result != 0) @@ -851,7 +860,7 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num) break; case TARGET_LINUX_SYS_syslog: - result = syslog (arg1, (char *) t2h_addr (cb, &s, arg2)); + result = syscall (SYS_syslog, arg1, (char *) t2h_addr (cb, &s, arg2), arg3); errcode = errno; break; From patchwork Thu Oct 20 09:32:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59149 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A0E7538D1B2B for ; Thu, 20 Oct 2022 09:37:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A0E7538D1B2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258644; bh=6ywPKfugakqXUah/Uj0ILNv98Y/efCXp4EJWGsa0Cs4=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=VqnQ1vymu9FGDePVgzl6bT73csRDDcRhY/3mNINmZpgc9/OCfOk4M3J52e5GGajBB TcdxdHF9rFU7ySxUa1BoveQ7SLYx8kBsxiB7+Ujk6S62EWKvLbqP9YNslasSm3eh5p X/dZUTGzrrjqbL/dp/JIxez6dS9eLPp6wwk84m0I= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 7BB87385022C for ; Thu, 20 Oct 2022 09:36:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7BB87385022C Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id CEEDC300089; Thu, 20 Oct 2022 09:36:55 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 23/40] sim/m32r: Add explicit casts Date: Thu, 20 Oct 2022 09:32:28 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the M32R instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN or sim/m32r to resolve. --- sim/m32r/decode.c | 14 +++++++------- sim/m32r/decode2.c | 14 +++++++------- sim/m32r/decodex.c | 14 +++++++------- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c index 4b4b9f922e2..8066425c0d6 100644 --- a/sim/m32r/decode.c +++ b/sim/m32r/decode.c @@ -39,12 +39,12 @@ static IDESC m32rbf_insn_data[M32RBF_INSN__MAX]; static const struct insn_sem m32rbf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, @@ -153,7 +153,7 @@ static const struct insn_sem m32rbf_insn_sem[] = static const struct insn_sem m32rbf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c index 00b216b83fc..4833a3aa9ab 100644 --- a/sim/m32r/decode2.c +++ b/sim/m32r/decode2.c @@ -43,12 +43,12 @@ static IDESC m32r2f_insn_data[M32R2F_INSN__MAX]; static const struct insn_sem m32r2f_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_AFTER, M32R2F_INSN_X_AFTER, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEFORE, M32R2F_INSN_X_BEFORE, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CTI_CHAIN, M32R2F_INSN_X_CTI_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CHAIN, M32R2F_INSN_X_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEGIN, M32R2F_INSN_X_BEGIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32R2F_INSN_X_AFTER, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32R2F_INSN_X_BEFORE, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32R2F_INSN_X_CTI_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32R2F_INSN_X_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32R2F_INSN_X_BEGIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }, { M32R_INSN_ADD, M32R2F_INSN_ADD, M32R2F_SFMT_ADD, M32R2F_INSN_PAR_ADD, M32R2F_INSN_WRITE_ADD }, { M32R_INSN_ADD3, M32R2F_INSN_ADD3, M32R2F_SFMT_ADD3, NOPAR, NOPAR }, { M32R_INSN_AND, M32R2F_INSN_AND, M32R2F_SFMT_ADD, M32R2F_INSN_PAR_AND, M32R2F_INSN_WRITE_AND }, @@ -186,7 +186,7 @@ static const struct insn_sem m32r2f_insn_sem[] = static const struct insn_sem m32r2f_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR }; /* Initialize an IDESC from the compile-time computable parts. */ diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c index 19bb1e5b8ff..4d77350b99a 100644 --- a/sim/m32r/decodex.c +++ b/sim/m32r/decodex.c @@ -43,12 +43,12 @@ static IDESC m32rxf_insn_data[M32RXF_INSN__MAX]; static const struct insn_sem m32rxf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, { M32R_INSN_ADD, M32RXF_INSN_ADD, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD }, { M32R_INSN_ADD3, M32RXF_INSN_ADD3, M32RXF_SFMT_ADD3, NOPAR, NOPAR }, { M32R_INSN_AND, M32RXF_INSN_AND, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_AND, M32RXF_INSN_WRITE_AND }, @@ -179,7 +179,7 @@ static const struct insn_sem m32rxf_insn_sem[] = static const struct insn_sem m32rxf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:32:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59155 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 490D23982424 for ; Thu, 20 Oct 2022 09:38:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 490D23982424 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258709; bh=6wbI116fbWtKYgCF2FM653s6bDcsXaHpo2sAzKe4sRM=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=NmY7yjvLyW4c1T3uMHEANhcgUcNy18be92JIUybBS3VYbAhqjMFsyCCWN48LxwTQV 0RcAFxGOEU2iau2SFo98o6j39SxHCXDhXnWL9zILBCSVz/s3P4A2V5V2KjYmvPxCu+ 711qRJ1uH8bXilK1KqsKZkGkml8oc2vL4ce4W6sE= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 24B2338376A6 for ; Thu, 20 Oct 2022 09:37:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 24B2338376A6 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 54F88300089; Thu, 20 Oct 2022 09:37:06 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 24/40] sim/mips: Fix enum type-related issues on cp1.c Date: Thu, 20 Oct 2022 09:32:29 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts and change a type on sim/mips/cp1.c. --- sim/mips/cp1.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c index 196173c0227..56a40c00623 100644 --- a/sim/mips/cp1.c +++ b/sim/mips/cp1.c @@ -1178,7 +1178,7 @@ inner_rsqrt(uint64_t op1, uint32_t res; sim_fpu_32to (&wop1, op1); status |= sim_fpu_sqrt (&ans, &wop1); - status |= sim_fpu_round_32 (&ans, status, round); + status |= sim_fpu_round_32 (&ans, (sim_fpu_round) status, (sim_fpu_denorm) round); wop1 = ans; op_status = sim_fpu_inv (&ans, &wop1); op_status |= sim_fpu_round_32 (&ans, round, denorm); @@ -1216,7 +1216,7 @@ fp_inv_sqrt(sim_cpu *cpu, FP_formats fmt) { sim_fpu_round round = rounding_mode (GETRM()); - sim_fpu_round denorm = denorm_mode (cpu); + sim_fpu_denorm denorm = denorm_mode (cpu); sim_fpu_status status = 0; uint64_t result = 0; @@ -1903,8 +1903,8 @@ convert_ps (sim_cpu *cpu, result = (((uint64_t)res_u) << 32) | (uint64_t)res_l; break; case fmt_ps: - status_u |= sim_fpu_round_32 (&wop_u, 0, round); - status_l |= sim_fpu_round_32 (&wop_l, 0, round); + status_u |= sim_fpu_round_32 (&wop_u, 0, (sim_fpu_denorm) round); + status_l |= sim_fpu_round_32 (&wop_l, 0, (sim_fpu_denorm) round); sim_fpu_to32 (&res_u, &wop_u); sim_fpu_to32 (&res_l, &wop_l); result = FP_PS_cat(res_u, res_l); From patchwork Thu Oct 20 09:32:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59164 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C22A0396E074 for ; Thu, 20 Oct 2022 09:39:51 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C22A0396E074 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258791; bh=pOnfs/8cdrnY7ljoZDuPEQKtU2C1FTGwUTNyhn+vdYQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=NLokQvdrfOTSZXs4X4xs+GpnSsKPIefH5bNo4GMjLWBfgaQhlnCithkln26SNrfc8 rt+b6eogLU7/F6JPiZkNlEtRi2FtbNjDGiQ9gOUNSIFF/FuY7ISr7DVifBAM7lePgX 0OxzJhA5kFYWiVfhlPgzJwnAJgxdKTUV+Z0VSxsc= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 9721D3829BA1 for ; Thu, 20 Oct 2022 09:37:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9721D3829BA1 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id ECDED300089; Thu, 20 Oct 2022 09:37:16 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 25/40] sim/mn10300: Add an explicit cast Date: Thu, 20 Oct 2022 09:32:30 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds an explicit cast. --- sim/mn10300/op_utils.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sim/mn10300/op_utils.c b/sim/mn10300/op_utils.c index 2fccf2da207..34b1b8e3951 100644 --- a/sim/mn10300/op_utils.c +++ b/sim/mn10300/op_utils.c @@ -152,8 +152,9 @@ do_syscall (SIM_DESC sd) if (cb_target_to_host_syscall (STATE_CALLBACK (sd), func) == CB_SYS_exit) { /* EXIT - caller can look in parm1 to work out the reason */ - sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC, - (parm1 == 0xdead ? SIM_SIGABRT : sim_exited), parm1); + sim_engine_halt ( + simulator, STATE_CPU (simulator, 0), NULL, PC, + (parm1 == 0xdead ? (enum sim_stop) SIM_SIGABRT : sim_exited), parm1); } else { From patchwork Thu Oct 20 09:32:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59159 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2859F3839DC9 for ; Thu, 20 Oct 2022 09:39:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2859F3839DC9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258742; bh=uvW6vPoj2shIo/FL6qELwQ6+PtRunQIt4n2aeqImKqc=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=pmegR1GsJtqIpxkvd9JydK8QXc8Aw5qVG5NewYeNx1QIQuk09z/dxs+GXICdPMpa5 mF7lqyYe3g1I8yg8CLGnPpalIsEJXgjTBquGAuC2AjRzgxC60wyoxL8IieWeSs5VdQ Hwrpe79GmOfQ59fMJwwJfi6CclNSXA99n+7m1Glo= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 2529A388551B for ; Thu, 20 Oct 2022 09:37:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2529A388551B Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 76B21300089; Thu, 20 Oct 2022 09:37:27 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 26/40] sim/ppc: Remove getrusage declarations if possible Date: Thu, 20 Oct 2022 09:32:31 +0000 Message-Id: <4f666ba3e017785495a6d9e1242c827b4f74424c.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit removes redundant and indefinite getrusage function declarations if the known getrusage declaration is found. --- sim/ppc/emul_netbsd.c | 2 ++ sim/ppc/emul_unix.c | 2 ++ sim/ppc/mon.c | 2 ++ 3 files changed, 6 insertions(+) diff --git a/sim/ppc/emul_netbsd.c b/sim/ppc/emul_netbsd.c index 322b584a3f1..072a5df5598 100644 --- a/sim/ppc/emul_netbsd.c +++ b/sim/ppc/emul_netbsd.c @@ -48,8 +48,10 @@ #ifdef HAVE_GETRUSAGE #include +#ifndef HAVE_DECL_GETRUSAGE int getrusage(); #endif +#endif #if HAVE_SYS_IOCTL_H #include diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c index 57691d4befc..6d4c2dad944 100644 --- a/sim/ppc/emul_unix.c +++ b/sim/ppc/emul_unix.c @@ -95,8 +95,10 @@ #ifdef HAVE_GETRUSAGE #include +#ifndef HAVE_DECL_GETRUSAGE int getrusage(); #endif +#endif #if HAVE_DIRENT_H # include diff --git a/sim/ppc/mon.c b/sim/ppc/mon.c index 4e29ec99879..3e88829f688 100644 --- a/sim/ppc/mon.c +++ b/sim/ppc/mon.c @@ -38,8 +38,10 @@ #ifdef HAVE_SYS_RESOURCE_H #include +#ifndef HAVE_DECL_GETRUSAGE int getrusage(); #endif +#endif #include "basics.h" #include "cpu.h" From patchwork Thu Oct 20 09:32:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59166 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 840003838142 for ; Thu, 20 Oct 2022 09:40:20 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 840003838142 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258820; bh=yqe+9xqYRzEE8NhHHNPEgLOeyKin8uFA7n01D+cWxFg=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=YmbJ9spmZh9QrQe9hGA6LgdXMd18MnMsUP89ZC50AAvjU5nC4+tjuSCqtHOtEdvks tJ/NeoMuMEept3GpRhy5Oi8UDuB7kgchPY0cR8PFN4GEh2ZdYIFUGyZNjqNjeOCFiM EwOW5KHllwtIH0KZefaZe5kNJaCzvxtQN2KTV+k4= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id A3B86395B820 for ; Thu, 20 Oct 2022 09:37:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A3B86395B820 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 0226C300089; Thu, 20 Oct 2022 09:37:37 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 27/40] sim/ppc: Add extra parenthesis to avoid ambiguity Date: Thu, 20 Oct 2022 09:32:32 +0000 Message-Id: <24f4d89aafc682360eb2b37005096f4b5b31124f.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if it considers that an expression is misleading due to a lack of parenthesis ("-Wparentheses"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds extra parenthesis to avoid ambiguity. --- sim/ppc/altivec.igen | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen index 63fe95a53d5..eda7af9dd6a 100644 --- a/sim/ppc/altivec.igen +++ b/sim/ppc/altivec.igen @@ -231,7 +231,7 @@ void::model-function::ppc_insn_vr_vscr:itable_index index, model_data *model_ptr busy_ptr->vscr_busy = 1; if (out_vmask) - busy_ptr->nr_writebacks = 1 + (PPC_ONE_BIT_SET_P(out_vmask)) ? 1 : 2; + busy_ptr->nr_writebacks = (1 + (PPC_ONE_BIT_SET_P(out_vmask))) ? 1 : 2; if (WITH_TRACE && ppc_trace[trace_model]) model_trace_altivec_make_busy(model_ptr, vr_mask, 0); From patchwork Thu Oct 20 09:32:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59162 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1F22A396D833 for ; Thu, 20 Oct 2022 09:39:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1F22A396D833 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258775; bh=yrpNTZ34RAg8DFUmRR7+QOweOqku/hmB7SOiApJX2MI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=sW46C2PGrCtTQVaeRwhJ8QkA5VMsnuUtX/EWAiKqaSG8MY1+uXh51spHlibSfFY3P SYwhZNvzgTvaTJnUeedS/QHcvgYLrJ48WUBQEGls12ZE+2V06zyNiG4rHusiImnZa9 rdOnJvnnkui5g1zsSGi2k6FzoqigsyaIGsGGL1D8= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 26C8838B13DE for ; Thu, 20 Oct 2022 09:37:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 26C8838B13DE Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 7B9EC300089; Thu, 20 Oct 2022 09:37:48 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 28/40] sim/ppc: Initialize stat type buffer Date: Thu, 20 Oct 2022 09:32:33 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" On do_fstat function, stat typed buffer buf is passed to write_buf function uninitialized when fdbad(fd) is not zero. This commit initializes the buffer with the default value. --- sim/ppc/emul_netbsd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/ppc/emul_netbsd.c b/sim/ppc/emul_netbsd.c index 072a5df5598..34ad86ccbe9 100644 --- a/sim/ppc/emul_netbsd.c +++ b/sim/ppc/emul_netbsd.c @@ -881,7 +881,7 @@ do_fstat(os_emul_data *emul, { int fd = cpu_registers(processor)->gpr[arg0]; unsigned_word stat_buf_addr = cpu_registers(processor)->gpr[arg0+1]; - struct stat buf; + struct stat buf = {}; int status; #ifdef SYS_fstat SYS(fstat); From patchwork Thu Oct 20 09:32:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59154 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 519B9395BC11 for ; Thu, 20 Oct 2022 09:38:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 519B9395BC11 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258707; bh=zCoLZHM+eaf3yGR6AIyLcxMzILJAIglng1oAdADa6hQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=xbgo6IDSmRa1HqVsD9Pby8vR0/lmS9d8olkDXzVbtebVlV+oHPWft3xLSZbTkfw8u JxcSzLUAxohzUpZ681yDfODrdapl2sxHsle7snPcMgcAEdGrNIFy6PFFiV0PksQg+0 xElB/dzN8ld8fkU4J76TI9Vxp9xc0vSsw6X1wkGw= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 9FB49395A060 for ; Thu, 20 Oct 2022 09:38:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 9FB49395A060 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 015EE300089; Thu, 20 Oct 2022 09:37:58 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 29/40] sim/ppc: Fix indentation on generated code Date: Thu, 20 Oct 2022 09:32:34 +0000 Message-Id: <04f72f880579950f6196da72073a3698582fda0b.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a block statement and another adjacent statement with a misleading indent ("-Wmisleading-indentation"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). The cause of this warning, $(builddir)/sim/ppc/semantics.c is generated by $(srcdir)/sim/ppc/igen.c and this commit fixes generating misleading indentation by removing two spaces. --- sim/ppc/igen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c index 27b48638276..786ea540d57 100644 --- a/sim/ppc/igen.c +++ b/sim/ppc/igen.c @@ -233,7 +233,7 @@ gen_semantics_c(insn_table *table, lf_printf(file, " option_mpc860c0 = 0;\n"); lf_printf(file, " if (tree_find_property(root, \"/options/mpc860c0\"))\n"); lf_printf(file, " option_mpc860c0 = tree_find_integer_property(root, \"/options/mpc860c0\");\n"); - lf_printf(file, " option_mpc860c0 *= 4; /* convert word count to byte count */\n"); + lf_printf(file, " option_mpc860c0 *= 4; /* convert word count to byte count */\n"); lf_printf(file, "}\n"); lf_printf(file, "\n"); if (generate_expanded_instructions) From patchwork Thu Oct 20 09:32:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59158 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E2A3638A817A for ; Thu, 20 Oct 2022 09:39:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E2A3638A817A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258740; bh=R/toRILIdgVeh5Or4MzlwsPwrxE9N1wKmEnr0I9VvtI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=GDCxfZvCtspv0rh75Ohee92yvUYAa74GRG3V8XFGvvYfiMiMvqScxXk4CuaKDjWqR deeZVvPgIiQf/69KchRtKYiZ/scX4OENAHftL0ztNC22amppBO+0u/WrKfG2agQ9sh A+GySfGF0aqRV4QDu5fYEuMZ0lzkJNNHTlnaqH9g= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 3646A3953829 for ; Thu, 20 Oct 2022 09:38:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3646A3953829 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 7BA10300089; Thu, 20 Oct 2022 09:38:09 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 30/40] sim/ppc: Use TRACE with initialized entry_point Date: Thu, 20 Oct 2022 09:32:35 +0000 Message-Id: <0093fc2d9dbff0f912ef48fd61a412b3a6378c3c.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" On a TRACE call on sim_create_inferior, a variable entry_point is not initialized. This commit moves the TRACE call to where the entry_point is initialized. --- sim/ppc/sim_calls.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/ppc/sim_calls.c b/sim/ppc/sim_calls.c index 729f6dcb6f3..eddce4ac00a 100644 --- a/sim/ppc/sim_calls.c +++ b/sim/ppc/sim_calls.c @@ -161,8 +161,6 @@ sim_create_inferior (SIM_DESC sd, char * const *envp) { unsigned_word entry_point; - TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n", - entry_point)); if (simulator == NULL) error ("No program loaded"); @@ -171,6 +169,8 @@ sim_create_inferior (SIM_DESC sd, entry_point = bfd_get_start_address (abfd); else entry_point = 0xfff00000; /* ??? */ + TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n", + entry_point)); psim_init(simulator); psim_stack(simulator, argv, envp); From patchwork Thu Oct 20 09:32:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59169 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C935F394C836 for ; Thu, 20 Oct 2022 09:40:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C935F394C836 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258859; bh=5T9786hv/pye271HKZf0ZVyUUQfszErpXTZx3GN8mQs=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=SVXHLC76lZaMEinaGnfsVM95j5Vno2+3cxLv++K+qM14aJTbow/TA/nVao1I0munb Lii71FMT8pMjkzISs6oLwpEjb9yvysbqvA7rwaLLTqY3N5MpZaNfaU80r1EvXqqz+E 2GNWeZT2KCTOsOTcBn6xaGVw4hQYVl4Ze4jeZ10w= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id A0240383AF67 for ; Thu, 20 Oct 2022 09:38:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A0240383AF67 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 04F07300089; Thu, 20 Oct 2022 09:38:20 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 31/40] sim/ppc: Initialize help variables Date: Thu, 20 Oct 2022 09:32:36 +0000 Message-Id: <91681f1c5c0144e59196ec40e456f214cc74568d.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" GCC / Clang generate a warning if a variables is used uninitialized on some cases. On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit initializes two help variables with { 0 }. --- sim/ppc/hw_sem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/ppc/hw_sem.c b/sim/ppc/hw_sem.c index 937e2ad6f81..034191b10b7 100644 --- a/sim/ppc/hw_sem.c +++ b/sim/ppc/hw_sem.c @@ -109,7 +109,7 @@ hw_sem_init_data(device *me) hw_sem_device *sem = (hw_sem_device*)device_data(me); const device_unit *d; int status; - union semun help; + union semun help = { 0 }; /* initialize the properties of the sem */ @@ -188,7 +188,7 @@ hw_sem_io_read_buffer(device *me, struct sembuf sb; int status; uint32_t u32; - union semun help; + union semun help = { 0 }; /* do we need to worry about out of range addresses? */ From patchwork Thu Oct 20 09:32:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59161 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 00BAB385086F for ; Thu, 20 Oct 2022 09:39:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 00BAB385086F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258773; bh=NdIWY66BsGfa0wYt2RYedEsTRKRcqRqc+c9Kc93f0GE=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=a65rVkdbU4CVmgJuuhL+MfjkRCh0Bu+5z7/+23gMssZMLS33MgUmM3CGdJFuROhQq YUzN/pN3gS3nQOIChslsQqX0ccZg1eb91b2cmMCPNIOFJ/JS8Titn10np64w6o35Gv VIMv29GLSXtxuGE2anEwNhNlmWotl1tEMvSntSJk= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 2E6C038376A6 for ; Thu, 20 Oct 2022 09:38:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2E6C038376A6 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 830CE300089; Thu, 20 Oct 2022 09:38:30 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 32/40] sim/ppc: Add an explicit cast Date: Thu, 20 Oct 2022 09:32:37 +0000 Message-Id: <8d3ab3bfabd02995d344ace8016e5b09c14462eb.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds an explicit cast to hw_phb_decode type. --- sim/ppc/hw_phb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c index a3c19264235..a99a51d9cf9 100644 --- a/sim/ppc/hw_phb.c +++ b/sim/ppc/hw_phb.c @@ -319,7 +319,7 @@ hw_phb_attach_address(device *me, /* attach it to the relevent bus */ DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n", device_path(client), - hw_phb_decode_name(type), + hw_phb_decode_name((hw_phb_decode)type), pci_space->name, (unsigned long)addr, (unsigned long)nr_bytes)); From patchwork Thu Oct 20 09:32:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59171 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4358F383AF55 for ; Thu, 20 Oct 2022 09:41:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4358F383AF55 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258893; bh=qxMaTBbIsACihTDkVrVAyaiE6f9F9Hd4Xhs3qaZJf48=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=NUhrWrgWHsoy5wuxi8o+CRN0s1YGtJsEOpSTglAWRxh2JrgFLuUiYLVOyFreNUZSX NNM5oYGoNcmZrzCDi+iY/HXJjt/1JfVRLwsCLwVf8Gjy4TLHnSWsS6Py6sJxTaQzIq t9cMrTWWXCG24yVyRa/5DwcGyi8lk/FbTiuZCVkI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id BAAF53831D94 for ; Thu, 20 Oct 2022 09:38:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BAAF53831D94 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 100C1300089; Thu, 20 Oct 2022 09:38:41 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 33/40] sim/ppc: Initialize reg and control_nr Date: Thu, 20 Oct 2022 09:32:38 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). Despite that GCC will not cause a build failure even when "--enable-werror" is specified, it would be nice to get rid of it. This commit initializes variables "reg" and "control_nr" when declared. --- sim/ppc/hw_ide.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sim/ppc/hw_ide.c b/sim/ppc/hw_ide.c index af61eeccab6..b4ac8e99204 100644 --- a/sim/ppc/hw_ide.c +++ b/sim/ppc/hw_ide.c @@ -729,8 +729,8 @@ hw_ide_io_read_buffer(device *me, unsigned_word cia) { hw_ide_device *ide = (hw_ide_device *)device_data(me); - int control_nr; - int reg; + int control_nr = 0; + int reg = 0; ide_controller *controller; /* find the interface */ @@ -783,8 +783,8 @@ hw_ide_io_write_buffer(device *me, unsigned_word cia) { hw_ide_device *ide = (hw_ide_device *)device_data(me); - int control_nr; - int reg; + int control_nr = 0; + int reg = 0; ide_controller *controller; /* find the interface */ From patchwork Thu Oct 20 09:32:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59165 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 12521383FBA9 for ; Thu, 20 Oct 2022 09:40:07 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 12521383FBA9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258807; bh=0SR6L9Zdhdk51RUuCUZx3shMzauYnlZxE7y0TXyOjCQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ijSJQXW0ghN+HI2sCaxQYEz9nf/I2EWKcZcYrcIMbQgT5fZGEwOUGP9Zf3GOFNSje 5X/lPfMq54aN9kM7I+5nBWri2v1MU8IbF9T9LmnCK7QFxarB9VXz8pOMOqG+/82jIP 4b7C2z4ei8p3+w96flB3VA79b7qBsepr/3JGomwU= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 391D8398AC3F for ; Thu, 20 Oct 2022 09:38:53 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 391D8398AC3F Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 8BBA2300089; Thu, 20 Oct 2022 09:38:51 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 34/40] sim/rx: Mark unused function Date: Thu, 20 Oct 2022 09:32:39 +0000 Message-Id: <568d957b97fadfee53f3450dfd083ca895d1f0bf.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a unused static function ("-Wunused-function"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). Although that this is completely unused, the author considers that this is _happened to be_ unused and choose to keep this function for now. Instead, this commit adds ATTRIBUTE_UNUSED. --- sim/rx/rx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/rx/rx.c b/sim/rx/rx.c index 70b1b9729b7..8646c20d108 100644 --- a/sim/rx/rx.c +++ b/sim/rx/rx.c @@ -754,7 +754,7 @@ typedef union { float f; } FloatInt; -static inline int +static inline int ATTRIBUTE_UNUSED float2int (float f) { FloatInt fi; From patchwork Thu Oct 20 09:32:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59167 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BF498395B46C for ; Thu, 20 Oct 2022 09:40:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BF498395B46C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258835; bh=9yaiREs4hr+8MWXAgIaar2Q8T/GS3dNAAD3l3KlEt6M=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=n5EvTpWCursHBh4WVCHDGWWtcErIukt+rs9+1O7s9igdnprnAdQ9xy8e3qp6zd0dU ii0cqQAulGPOgRMygbqkaPSMqrefWIcZ0ZIdN8k0hTfGKfYbQ4zeZCTl9p49DYDQe7 9VpoE7i9n+YdUWMVuPdye5bXOdKywXaX7v54o9i4= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id B81E938EA2E1 for ; Thu, 20 Oct 2022 09:39:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B81E938EA2E1 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 15BE8300089; Thu, 20 Oct 2022 09:39:02 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 35/40] sim/sh: Initialize some variables Date: Thu, 20 Oct 2022 09:32:40 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if a variable may be used uninitialized on some cases ("-Wsometimes-uninitialized"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). The cause of this error, $(builddir)/sim/sh/ppi.c is generated from $(srcdir)/sim/sh/gencode.c. Clang will detect the variable res may be used uninitialized when used on some cases. Likewise, GCC generates a warning if a variable may be used uninitialized on some cases ("-Wmaybe-uninitialized"). GCC will detect variables res, res_grd, carry, overflow and greater_equal may be used uninitialized on some cases. Despite that GCC will not cause a build failure even when "--enable-werror" is specified, it would be better to fix this as well since the cause is in the same function. --- sim/sh/gencode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c index 5eb7caf2589..03979695b08 100644 --- a/sim/sh/gencode.c +++ b/sim/sh/gencode.c @@ -3257,8 +3257,8 @@ ppi_gensim (void) printf (" static char const u_tab[] = { 8, 10, 7, 5};\n"); printf ("\n"); printf (" int z;\n"); - printf (" int res, res_grd;\n"); - printf (" int carry, overflow, greater_equal;\n"); + printf (" int res = 0, res_grd = 0;\n"); + printf (" int carry = 0, overflow = 0, greater_equal = 0;\n"); printf ("\n"); printf (" switch (ppi_table[iword >> 4]) {\n"); From patchwork Thu Oct 20 09:32:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59170 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 129343948A5F for ; Thu, 20 Oct 2022 09:41:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 129343948A5F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258864; bh=hI/p5isefST8vEytaz1gnVwBofv54NaUpMAfvNunBJk=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=G+r7xcOG1kJPR2N9TucP3KycaGKhNdNZOjvUVsn6WpcGolNKqYr4tbNduvSkzVmUO y4L744m34W0NraCw0OMLkysD0qRtOk4rehA1dTy3UONkEXjLtgBY7Cg3AI9G37tEV/ oMitKwpijt8QzKM/BmLfjETIQCP2OS5HYR1fpLeI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 3ACFE3853807 for ; Thu, 20 Oct 2022 09:39:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3ACFE3853807 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 938CD300089; Thu, 20 Oct 2022 09:39:12 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 36/40] sim/sh: Use fabs instead of abs Date: Thu, 20 Oct 2022 09:32:41 +0000 Message-Id: <1c1dc37d64784ff8fec4ab3e322f6b84693d8b92.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if abs function is called with a floating point argument ("-Wabsolute-value"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). After careful investigation, it is concluded that replacing abs with fabs is completely safe. --- sim/sh/interp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/sh/interp.c b/sim/sh/interp.c index fb92d9f4480..38f3f945a35 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -1401,7 +1401,7 @@ fsca_s (int in, double (*f) (double)) lower = result - error; frac = frexp (lower, &exp); lower = ldexp (ceil (ldexp (frac, 24)), exp - 24); - return abs (upper - result) >= abs (lower - result) ? upper : lower; + return fabs (upper - result) >= fabs (lower - result) ? upper : lower; } static float From patchwork Thu Oct 20 09:32:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59163 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 108A038D1B3E for ; Thu, 20 Oct 2022 09:39:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 108A038D1B3E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258790; bh=SvOjBLpGoKrHUK2OHsvM+cu8Mb0y7V9jRCWPXplFA3Q=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=co7VzR/VDBRMgvWyG15ZJyY3tdvSKwqi0s4HWO+g/bxumaI7M8Nfjm6WBYsWvQuIu fWx1lNGJvFtS0MFH23Tp9SV+GLRtzT4KSTrP9CUCXB0cHYL1eRjwk6dqgG9qwNMFKi Nj6f60FLOuCvZ/KlmOVuF/4P5rDK56VDfrB0kInI= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id B5AA53895FCD for ; Thu, 20 Oct 2022 09:39:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B5AA53895FCD Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 16C66300089; Thu, 20 Oct 2022 09:39:23 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 37/40] sim/sh: Remove redundant function declaration Date: Thu, 20 Oct 2022 09:32:42 +0000 Message-Id: <0db6b0934795da17889f71fb469ab81183fbf3c6.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is a function declaration/definition with zero arguments. Such declarations/definitions without a prototype (an argument list) are deprecated forms of indefinite arguments ("-Wdeprecated-non-prototype"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). But there is another issue. This function declaration in sim/sh/interp.c is completely redundant. This commit just removes that declaration. --- sim/sh/interp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sim/sh/interp.c b/sim/sh/interp.c index 38f3f945a35..b6f29880d74 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -1492,8 +1492,6 @@ get_loop_bounds (int rs, int re, unsigned char *memory, unsigned char *mem_end, return loop; } -static void ppi_insn (); - #include "ppi.c" /* Provide calloc / free versions that use an anonymous mmap. This can From patchwork Thu Oct 20 09:32:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59173 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CF0D9383A583 for ; Thu, 20 Oct 2022 09:42:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CF0D9383A583 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258921; bh=pkghkLa9mn7VjFwqbKwF8A6s2S9fxFNqcZRqMk1xSFg=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=ZuqBnh5BJI599wb/Zpy4dTlhiCEQHVlaNMt+OkYPzKQ7buw0XeT+vRQ1P1RDyk/wy 9rKWIRuZBUJgYcXTQB1qxkLAiw85tf8kCVvAAXGgQVN1UYlqFwH1m1DZN1zVkLSAXI qeN7OipfBMe46+gp+GSQ3pnYtLYtIGfzyvXVr9eo= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 4080E38AA279 for ; Thu, 20 Oct 2022 09:39:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4080E38AA279 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 957A6300089; Thu, 20 Oct 2022 09:39:33 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 38/40] sim/bpf: Add explicit casts Date: Thu, 20 Oct 2022 09:32:43 +0000 Message-Id: <6e5213e625e6c309f2baaae5e6a3dad20155e696.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the BPF instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN to resolve. --- sim/bpf/decode-be.c | 14 +++++++------- sim/bpf/decode-le.c | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/sim/bpf/decode-be.c b/sim/bpf/decode-be.c index e18c9578629..3698db71319 100644 --- a/sim/bpf/decode-be.c +++ b/sim/bpf/decode-be.c @@ -42,12 +42,12 @@ static IDESC bpfbf_ebpfbe_insn_data[BPFBF_EBPFBE_INSN__MAX]; static const struct insn_sem bpfbf_ebpfbe_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, BPFBF_EBPFBE_INSN_X_AFTER, BPFBF_EBPFBE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFBE_INSN_X_BEFORE, BPFBF_EBPFBE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFBE_INSN_X_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFBE_INSN_X_BEGIN, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, BPFBF_EBPFBE_INSN_X_AFTER, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFBE_INSN_X_BEFORE, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFBE_INSN_X_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFBE_INSN_X_BEGIN, BPFBF_EBPFBE_SFMT_EMPTY }, { BPF_INSN_ADDIBE, BPFBF_EBPFBE_INSN_ADDIBE, BPFBF_EBPFBE_SFMT_ADDIBE }, { BPF_INSN_ADDRBE, BPFBF_EBPFBE_INSN_ADDRBE, BPFBF_EBPFBE_SFMT_ADDRBE }, { BPF_INSN_ADD32IBE, BPFBF_EBPFBE_INSN_ADD32IBE, BPFBF_EBPFBE_SFMT_ADDIBE }, @@ -175,7 +175,7 @@ static const struct insn_sem bpfbf_ebpfbe_insn_sem[] = static const struct insn_sem bpfbf_ebpfbe_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ diff --git a/sim/bpf/decode-le.c b/sim/bpf/decode-le.c index ff5bb3cca67..5920e799047 100644 --- a/sim/bpf/decode-le.c +++ b/sim/bpf/decode-le.c @@ -42,12 +42,12 @@ static IDESC bpfbf_ebpfle_insn_data[BPFBF_EBPFLE_INSN__MAX]; static const struct insn_sem bpfbf_ebpfle_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, BPFBF_EBPFLE_INSN_X_AFTER, BPFBF_EBPFLE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFLE_INSN_X_BEFORE, BPFBF_EBPFLE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFLE_INSN_X_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFLE_INSN_X_BEGIN, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, BPFBF_EBPFLE_INSN_X_AFTER, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFLE_INSN_X_BEFORE, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFLE_INSN_X_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFLE_INSN_X_BEGIN, BPFBF_EBPFLE_SFMT_EMPTY }, { BPF_INSN_ADDILE, BPFBF_EBPFLE_INSN_ADDILE, BPFBF_EBPFLE_SFMT_ADDILE }, { BPF_INSN_ADDRLE, BPFBF_EBPFLE_INSN_ADDRLE, BPFBF_EBPFLE_SFMT_ADDRLE }, { BPF_INSN_ADD32ILE, BPFBF_EBPFLE_INSN_ADD32ILE, BPFBF_EBPFLE_SFMT_ADDILE }, @@ -175,7 +175,7 @@ static const struct insn_sem bpfbf_ebpfle_insn_sem[] = static const struct insn_sem bpfbf_ebpfle_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:32:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59168 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CFA1C3887D5D for ; Thu, 20 Oct 2022 09:40:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CFA1C3887D5D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258856; bh=YtSph78VzDevT301z4mNMheOyh5J7JEBDGYe0y11C3w=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=SKp0//bRcKkYPJvE5Z0Id5irxXNWIDyljHniSzObJv3dhVYp/Ld6CEJj2e+Xk9BxM JCsH1q/9+xpIvcJcZalqQQrLA+df2w0CcMMjVUnz2PfvvNsuLdQfG7SQY95Vs8d3ye ce/OyQKkxxyg7icu3SsFidzl4QPXmDiWaErSF4fA= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id C2048388BA59 for ; Thu, 20 Oct 2022 09:39:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C2048388BA59 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 21A53300089; Thu, 20 Oct 2022 09:39:44 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 39/40] sim/iq2000: Add explicit casts Date: Thu, 20 Oct 2022 09:32:44 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the IQ2000 instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another known regression in CGEN or sim/iq2000 to resolve. --- sim/iq2000/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/iq2000/decode.c b/sim/iq2000/decode.c index 3c6ea7c80e3..3a94154391c 100644 --- a/sim/iq2000/decode.c +++ b/sim/iq2000/decode.c @@ -39,12 +39,12 @@ static IDESC iq2000bf_insn_data[IQ2000BF_INSN__MAX]; static const struct insn_sem iq2000bf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, IQ2000BF_INSN_X_AFTER, IQ2000BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, IQ2000BF_INSN_X_BEFORE, IQ2000BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, IQ2000BF_INSN_X_CTI_CHAIN, IQ2000BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, IQ2000BF_INSN_X_CHAIN, IQ2000BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, IQ2000BF_INSN_X_BEGIN, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, IQ2000BF_INSN_X_AFTER, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, IQ2000BF_INSN_X_BEFORE, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, IQ2000BF_INSN_X_CTI_CHAIN, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, IQ2000BF_INSN_X_CHAIN, IQ2000BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, IQ2000BF_INSN_X_BEGIN, IQ2000BF_SFMT_EMPTY }, { IQ2000_INSN_ADD, IQ2000BF_INSN_ADD, IQ2000BF_SFMT_ADD }, { IQ2000_INSN_ADDI, IQ2000BF_INSN_ADDI, IQ2000BF_SFMT_ADDI }, { IQ2000_INSN_ADDIU, IQ2000BF_INSN_ADDIU, IQ2000BF_SFMT_ADDI }, @@ -193,7 +193,7 @@ static const struct insn_sem iq2000bf_insn_sem[] = static const struct insn_sem iq2000bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */ From patchwork Thu Oct 20 09:32:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tsukasa OI X-Patchwork-Id: 59174 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 95E81383A5D8 for ; Thu, 20 Oct 2022 09:42:33 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 95E81383A5D8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666258953; bh=8dddZRAX5qnaGaF3CTlj9W8sH0604mfAaclSfDmMIM4=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=vD5KN0P9N3zsVq0mXJCHh7LdWrZU5zO89bvTbrBXdG51IIVdVVuplmihHivr+sEBP Qp18RASiEyKVy8MqaJxBLt76V56LFN14KDatrz2ix7xMVzuz0K/c+SHWACNXeXAr9i Av3+VGOyMSwALGdATT0vk7Yq6wEkf/JCW8Xan2XE= X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 4B57E3887F5A for ; Thu, 20 Oct 2022 09:39:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4B57E3887F5A Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A25D2300089; Thu, 20 Oct 2022 09:39:54 +0000 (UTC) To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Subject: [PATCH 40/40] sim/or1k: Add explicit casts Date: Thu, 20 Oct 2022 09:32:45 +0000 Message-Id: <0cefc89e745a41b15aa70da010ccce7bdb632ceb.1666258361.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, UPPERCASE_50_75 autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Gdb-patches From: Tsukasa OI Reply-To: Tsukasa OI Cc: gdb-patches@sourceware.org Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org Sender: "Gdb-patches" Clang generates a warning if there is an enum value with a mismatching type without an explicit cast ("-Wenum-conversion"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). This commit adds explicit casts on the OpenRISC 1000 instruction decoder. Note: This commit touches CGEN-generated files directly. Modifying CGEN is the best way to prevent this issue from happening again but there is another possible regression in CGEN to resolve. --- sim/or1k/decode.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/sim/or1k/decode.c b/sim/or1k/decode.c index 5da574794fd..a46c1513af3 100644 --- a/sim/or1k/decode.c +++ b/sim/or1k/decode.c @@ -40,12 +40,12 @@ static IDESC or1k32bf_insn_data[OR1K32BF_INSN__MAX]; static const struct insn_sem or1k32bf_insn_sem[] = { - { VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY }, + { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY }, { OR1K_INSN_L_J, OR1K32BF_INSN_L_J, OR1K32BF_SFMT_L_J }, { OR1K_INSN_L_ADRP, OR1K32BF_INSN_L_ADRP, OR1K32BF_SFMT_L_ADRP }, { OR1K_INSN_L_JAL, OR1K32BF_INSN_L_JAL, OR1K32BF_SFMT_L_JAL }, @@ -191,7 +191,7 @@ static const struct insn_sem or1k32bf_insn_sem[] = static const struct insn_sem or1k32bf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY + (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY }; /* Initialize an IDESC from the compile-time computable parts. */