From patchwork Sat Sep 24 12:47:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 57988 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0B0293858435 for ; Sat, 24 Sep 2022 12:48:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0B0293858435 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1664023691; bh=rLXfR7UbzHulJaH5ycB00cOVPRoQhqTISWkrnjqxsqg=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=iIIR7jHELapU+mkA9pZJXcT3T/arIyZwApMOZJVCUL/qaBDCm4WL21uOhLIyzbRMR zQAtJGlMShWiROaYQOzGaPt1UypngCfU1z33suTw233FZ6CulU3YOq9sftkuYtmRYW wnFQ9sDvncc8Mpm/SHBZItQw3uOQyx8TPIxpzOUU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [IPv6:2001:470:683e::1]) by sourceware.org (Postfix) with ESMTPS id 5CDB43858C53 for ; Sat, 24 Sep 2022 12:47:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5CDB43858C53 Received: from xry111-x57s1.. (unknown [IPv6:240e:358:1175:c300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id A67B76679E; Sat, 24 Sep 2022 08:47:35 -0400 (EDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH] LoongArch: Use UNSPEC for fmin/fmax RTL pattern [PR105414] Date: Sat, 24 Sep 2022 20:47:22 +0800 Message-Id: <20220924124722.1946365-1-xry111@xry111.site> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, FROM_SUSPICIOUS_NTLD_FP, GIT_PATCH_0, LIKELY_SPAM_FROM, SPF_HELO_PASS, SPF_PASS, TXREP, T_PDS_OTHER_BAD_TLD autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Cc: Chenghua Xu , Lulu Cheng , Wang Xuerui Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" I made a mistake defining fmin/fmax RTL patterns in r13-2085: I used smin and smax in the definition mistakenly. This causes the optimizer to perform constant folding as if fmin/fmax was "really" smin/smax operations even with -fsignaling-nans. Then pr105414.c fails. We don't have fmin/fmax RTL codes for now (PR107013) so we can only use an UNSPEC for fmin and fmax patterns. gcc/ChangeLog: PR tree-optimization/105414 * config/loongarch/loongarch.md (UNSPEC_FMAX): New unspec. (UNSPEC_FMIN): Likewise. (fmax3): Use UNSPEC_FMAX instead of smax. (fmin3): Use UNSPEC_FMIN instead of smin. --- gcc/config/loongarch/loongarch.md | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 3787fd8230f..214b14bddd3 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -35,6 +35,8 @@ (define_c_enum "unspec" [ ;; Floating point unspecs. UNSPEC_FRINT UNSPEC_FCLASS + UNSPEC_FMAX + UNSPEC_FMIN ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -1032,8 +1034,9 @@ (define_insn "smin3" (define_insn "fmax3" [(set (match_operand:ANYF 0 "register_operand" "=f") - (smax:ANYF (match_operand:ANYF 1 "register_operand" "f") - (match_operand:ANYF 2 "register_operand" "f")))] + (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f")) + (use (match_operand:ANYF 2 "register_operand" "f"))] + UNSPEC_FMAX))] "" "fmax.\t%0,%1,%2" [(set_attr "type" "fmove") @@ -1041,8 +1044,9 @@ (define_insn "fmax3" (define_insn "fmin3" [(set (match_operand:ANYF 0 "register_operand" "=f") - (smin:ANYF (match_operand:ANYF 1 "register_operand" "f") - (match_operand:ANYF 2 "register_operand" "f")))] + (unspec:ANYF [(use (match_operand:ANYF 1 "register_operand" "f")) + (use (match_operand:ANYF 2 "register_operand" "f"))] + UNSPEC_FMIN))] "" "fmin.\t%0,%1,%2" [(set_attr "type" "fmove")