From patchwork Thu Sep 1 03:27:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 57226 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 54BB93830092 for ; Thu, 1 Sep 2022 03:28:45 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by sourceware.org (Postfix) with ESMTPS id 204FE3834F1A for ; Thu, 1 Sep 2022 03:28:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 204FE3834F1A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pg1-x52f.google.com with SMTP id q63so15177774pga.9 for ; Wed, 31 Aug 2022 20:28:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:message-id:date :subject:from:to:cc:subject:date; bh=J4aZrjfEeNMM/vBwz26O3883G9GEtVQwxCwg5Y58Jxc=; b=2chBu9A9Ep0bnClQSKFi6hx3RJEINlaOC9dkp4YJqjvcm4JLM3zTu3W+EVCzHuWlyY J6iSCm7eytn99SMr357B68V5ihRuTCmt4Q/56rVidws/GGaLdS6up5RcvvRa+QGKohwc ezNxERwBg1x7NtUm7PyEqLch+BE6jVumseV1I+gEjFRsHkgd96vWf1r6VTJEt9W66BtH Xul/oNQRXJ5S7Lpc/DgnvdFLAJExwX9743S5iXYgr6+vW1sGNco4VGGm8XSIpaPzoKEq ZGFCD2qCSRkRPP8sOuNXV2Ud7wsFW9xKUGvi/8FRbzKpS80awDVIuOINHoJTcY0HZV2T WuDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:message-id:date :subject:x-gm-message-state:from:to:cc:subject:date; bh=J4aZrjfEeNMM/vBwz26O3883G9GEtVQwxCwg5Y58Jxc=; b=z6DoQIYADCR00EgHlXecp7qE11k9/enGFeiCEC1GjC5d7xXs2DoFJSWBZ9wJOHd09W II+swyYIK7ox1vV9wR9TQHZm1N1vy4WGaqHiJdfYHhBzterdyiqDbmFZUJDpe1j0/iK6 ihuztWLbOf8dDdVwQHy04ruijUQNCD5SWwTMbWICwOACDHG42cGNmzViSRfms3V51LFC JIacTLzJBgCuascp8AQRyiL6/WFhPA0Spo1wWgJIOoLuPXX8uuwmkhDBuWjEU8xY5GwG gJryFzXvIDiLjTaWA/DFzbGKmCRxJKviT0K2JIgvci4Hxkk5LIu9cTw0JTQD7yr5N6af 2ZRw== X-Gm-Message-State: ACgBeo07v+A5ATZkNeKnMlNHGp/h1iDkWm4k1+42uiMRhDxksOqcBx+o XW4XmUz+5gWO9iiqLKOIKjXN0g== X-Google-Smtp-Source: AA6agR4JPD+XbAyd8RkfeNKOGIuwi0gnh1kaowW8CsLNCTsOWjeVBgqXTGNIGslTMAsktKAKI13s/Q== X-Received: by 2002:a63:106:0:b0:430:805a:f1ad with SMTP id 6-20020a630106000000b00430805af1admr210801pgb.284.1662002906939; Wed, 31 Aug 2022 20:28:26 -0700 (PDT) Received: from localhost ([12.3.194.138]) by smtp.gmail.com with ESMTPSA id n13-20020a6563cd000000b00428c216467csm4110456pgv.32.2022.08.31.20.28.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Aug 2022 20:28:26 -0700 (PDT) Subject: [PATCH] RISC-V: Fix the V calling convention Date: Wed, 31 Aug 2022 20:27:46 -0700 Message-Id: <20220901032746.22765-1-palmer@rivosinc.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 From: Palmer Dabbelt To: gcc-patches@gcc.gnu.org X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" The V registers are always clobbered on calls. gcc/ChangeLog * config/riscv/riscv.cc (riscv_conditional_register_usage): Always mark the V registers as clobbered on calls. --- gcc/config/riscv/riscv.cc | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 675d92c0961..c18e61f4a03 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -5442,11 +5442,18 @@ riscv_conditional_register_usage (void) if (!TARGET_VECTOR) { for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++) - fixed_regs[regno] = call_used_regs[regno] = 1; + fixed_regs[regno] = 1; - fixed_regs[VTYPE_REGNUM] = call_used_regs[VTYPE_REGNUM] = 1; - fixed_regs[VL_REGNUM] = call_used_regs[VL_REGNUM] = 1; + fixed_regs[VTYPE_REGNUM] = 1; + fixed_regs[VL_REGNUM] = 1; } + + /* The standard ABIs all clobber the entire vector state on calls. */ + for (int regno = V_REG_FIRST; regno <= V_REG_LAST; regno++) + call_used_regs[regno] = 1; + + call_used_regs[VTYPE_REGNUM] = 1; + call_used_regs[VL_REGNUM] = 1; } /* Return a register priority for hard reg REGNO. */