From patchwork Fri Aug 12 20:40:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 56723 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 85A8B3856DF5 for ; Fri, 12 Aug 2022 20:41:11 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 3225F3858D28 for ; Fri, 12 Aug 2022 20:40:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3225F3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=EWhYh4yAPLOl0H3egysRbROlAmk/Fl2Dd2g+wuqKyKI=; b=D28n33zUlnEw7ym+vfz4ErQQyw b1IfvlEz16YKjm7ihqWqS2SZk9S2g7Nu7bhGIu8f+62yVI4gYegto+dDxNuyf0tAZ/EPmY4CUZ8Pk 6x3vFrwCZLLuU0aVNg5utxLyfiQvaluwU2LZR72OfbDHLdCiqmSC9H2nqI8PsbzKtu3mT/vtZnG2l DnvF6XOLNfutAkfjlFFSZEmsUTXe14UTmOrGj/fGsD9tTMQKcJK95JbNZjOX7xaafDHhJT1wU1j6y QYrGK2CEm7XHAQr6hMUI5dpCB8OZyV04IO9UpnOIIlZtvGVfaixlioOrDwW5yrBTZvxq9uwKXcOzq JzgdK0XQ==; Received: from host86-169-41-119.range86-169.btcentralplus.com ([86.169.41.119]:49199 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oMbSf-0000AP-22; Fri, 12 Aug 2022 16:40:53 -0400 From: "Roger Sayle" To: Subject: [x86 PATCH] PR target/106577: force_reg may clobber operands during split. Date: Fri, 12 Aug 2022 21:40:52 +0100 Message-ID: <002201d8ae8b$d11fa9b0$735efd10$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adiuiv0du7YTAZ8aTSqnwiEKHJA8Dw== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch fixes PR target/106577 which is a recent ICE on valid regression caused by my introduction of a *testti_doubleword pre-reload splitter in i386.md. During the split pass before reload, this converts the virtual *testti_doubleword into an *andti3_doubleword and *cmpti_doubleword, checking that any immediate operand is a valid "x86_64_hilo_general_operand" and placing it into a TImode register using force_reg if it isn't. The unexpected behaviour (that caught me out) is that calling force_reg may occasionally clobber the contents of the global operands array, or more accurately recog_data.operand[0], which means that by the time split_XXX calls gen_split_YYY the replacement insn's operands have been corrupted. It's difficult to tell who (if anyone is at fault). The re-entrant stack trace (for the attached PR) looks like: gen_split_203 (*testti_doubleword) calls force_reg calls emit_move_insn calls emit_move_insn_1 calls gen_movti calls ix86_expand_move calls ix86_convert_const_wide_int_to_broadcast calls ix86_vector_duplicate_value calls recog_memoized calls recog. By far the simplest and possibly correct fix is rather than attempt to push and pop recog_data, to simply (in pre-reload splits) save a copy of any operands that will be needed after force_reg, and use these copies afterwards. Many pre-reload splitters avoid this issue using "[(clobber (const_int 0))]" and so avoid gen_split_YYY functions, but in our case we still need to save a copy of operands[0] (even if we call emit_insn or expand_* ourselves), so we might as well continue to use the conveniently generated gen_split. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-08-12 Roger Sayle gcc/ChangeLog PR target/106577 * config/i386/i386.md (*testti_doubleword): Preserve a copy of operands[0], and move initialization of operands[2] later, as the call to force_reg may clobber the contents of the operands array. gcc/testsuite/ChangeLog PR target/106577 * gcc.target/i386/pr106577.c: New test case. Thanks, Roger diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 2fde8cd..e9232cd 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -9772,9 +9772,12 @@ (clobber (reg:CC FLAGS_REG))]) (set (reg:CCZ FLAGS_REG) (compare:CCZ (match_dup 2) (const_int 0)))] { - operands[2] = gen_reg_rtx (TImode); + /* Calling force_reg may clobber operands[0]. */ + rtx save_op0 = operands[0]; if (!x86_64_hilo_general_operand (operands[1], TImode)) operands[1] = force_reg (TImode, operands[1]); + operands[2] = gen_reg_rtx (TImode); + operands[0] = save_op0; }) ;; Combine likes to form bit extractions for some tests. Humor it. diff --git a/gcc/testsuite/gcc.target/i386/pr106577.c b/gcc/testsuite/gcc.target/i386/pr106577.c new file mode 100644 index 0000000..4e35031 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr106577.c @@ -0,0 +1,7 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -mavx" } */ + +int i; +void foo(void) { + i ^= !(((unsigned __int128)0xf0f0f0f0f0f0f0f0 << 64 | 0xf0f0f0f0f0f0f0f0) & i); +}