From patchwork Thu Jul 7 16:41:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 55849 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7D5343854178 for ; Thu, 7 Jul 2022 16:41:55 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 04D213857B99 for ; Thu, 7 Jul 2022 16:41:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 04D213857B99 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=Ww7rlArRGNiKjXy5zpOyA4KTrqMlSoKjGJpe9NWePSA=; b=GovJHCuXM9wKdbLYT+B5b2SozV 9rAje279hrPZ/DYyMKbbPUjc2VuBt0iinPGyyEypTRnWWTaJyXtPP2EPDMHdTPpV1NEe42kP6x8YX cC3fLXV2ajxSVwGoLnw5dX/1QGnXK6Yh/bCDkVLVf4ioO/F3ZvvPz8rNkS/dM530TLVjf7qznHQ7k 5X4o7EmdUbZx4qu8JdTZT4EbezzYX29d5iMuYkKvRimPxc2xfQ8lUvK1ZHPaLa2kaZ2siseoYAOZ5 Sz/kWOHT5omY8vbb0to67CvBoqdS2TaB94lQAv2v/q+ZlkKRlsDodMrDhCbEHzUwBP+k3ufOMfaRU jbKt6lfQ==; Received: from host86-130-134-60.range86-130.btcentralplus.com ([86.130.134.60]:58408 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o9UZL-00018A-Sd; Thu, 07 Jul 2022 12:41:36 -0400 From: "Roger Sayle" To: "'GCC Patches'" Subject: [x86 PATCH] Support *testdi_not_doubleword during STV pass. Date: Thu, 7 Jul 2022 17:41:33 +0100 Message-ID: <043a01d89220$6bb82a70$43287f50$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdiSH3DJh6Ce9WPCRLi+WfMFrqRseA== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch fixes the current two FAILs of pr65105-5.c on x86 when compiled with -m32. These (temporary) breakages were fallout from my patches to improve/upgrade (scalar) double word comparisons. On mainline, the i386 backend currently represents a critical comparison using (compare (and (not reg1) reg2) (const_int 0)) which isn't/wasn't recognized by the STV pass' convertible_comparison_p. This simple STV patch adds support for this pattern (*testdi_not_doubleword) and generates the vector pandn and ptest instructions expected in the existing (failing) test case. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, where with --target_board=unix{-m32} there are two fewer failures, and without, there are no new failures. Ok for mainline? 2022-07-07 Roger Sayle gcc/ChangeLog * config/i386/i386-features.cc (convert_compare): Add support for *testdi_not_doubleword pattern (i.e. "(compare (and (not ...") by generating a pandn followed by ptest. (convertible_comparison_p): Recognize both *cmpdi_doubleword and recent *testdi_not_doubleword comparison patterns. Thanks in advance, Roger diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index be38586..a7bd172 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -938,10 +938,10 @@ general_scalar_chain::convert_compare (rtx op1, rtx op2, rtx_insn *insn) { rtx tmp = gen_reg_rtx (vmode); rtx src; - convert_op (&op1, insn); /* Comparison against anything other than zero, requires an XOR. */ if (op2 != const0_rtx) { + convert_op (&op1, insn); convert_op (&op2, insn); /* If both operands are MEMs, explicitly load the OP1 into TMP. */ if (MEM_P (op1) && MEM_P (op2)) @@ -953,8 +953,25 @@ general_scalar_chain::convert_compare (rtx op1, rtx op2, rtx_insn *insn) src = op1; src = gen_rtx_XOR (vmode, src, op2); } + else if (GET_CODE (op1) == AND + && GET_CODE (XEXP (op1, 0)) == NOT) + { + rtx op11 = XEXP (XEXP (op1, 0), 0); + rtx op12 = XEXP (op1, 1); + convert_op (&op11, insn); + convert_op (&op12, insn); + if (MEM_P (op11)) + { + emit_insn_before (gen_rtx_SET (tmp, op11), insn); + op11 = tmp; + } + src = gen_rtx_AND (vmode, gen_rtx_NOT (vmode, op11), op12); + } else - src = op1; + { + convert_op (&op1, insn); + src = op1; + } emit_insn_before (gen_rtx_SET (tmp, src), insn); if (vmode == V2DImode) @@ -1399,17 +1416,29 @@ convertible_comparison_p (rtx_insn *insn, enum machine_mode mode) rtx op1 = XEXP (src, 0); rtx op2 = XEXP (src, 1); - if (!CONST_INT_P (op1) - && ((!REG_P (op1) && !MEM_P (op1)) - || GET_MODE (op1) != mode)) - return false; - - if (!CONST_INT_P (op2) - && ((!REG_P (op2) && !MEM_P (op2)) - || GET_MODE (op2) != mode)) - return false; + /* *cmp_doubleword. */ + if ((CONST_INT_P (op1) + || ((REG_P (op1) || MEM_P (op1)) + && GET_MODE (op1) == mode)) + && (CONST_INT_P (op2) + || ((REG_P (op2) || MEM_P (op2)) + && GET_MODE (op2) == mode))) + return true; + + /* *test_not_doubleword. */ + if (op2 == const0_rtx + && GET_CODE (op1) == AND + && GET_CODE (XEXP (op1, 0)) == NOT) + { + rtx op11 = XEXP (XEXP (op1, 0), 0); + rtx op12 = XEXP (op1, 1); + return (REG_P (op11) || MEM_P (op11)) + && (REG_P (op12) || MEM_P (op12)) + && GET_MODE (op11) == mode + && GET_MODE (op12) == mode; + } - return true; + return false; } /* The general version of scalar_to_vector_candidate_p. */