From patchwork Tue Jun 14 14:46:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Jeanson X-Patchwork-Id: 55073 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F16DF3852765 for ; Tue, 14 Jun 2022 14:47:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F16DF3852765 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1655218046; bh=RUaIt04szM5Tf+G8k1m/yG3/uMY3qlYHULkSt2OC4Iw=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=Jm8gJWEz/TAG/UDP00/YwGOZOY4Ocl4I5315zFthqIzwbU/BY7Tvmoojn30Un8Nop ogCTvG8/AO3C768pQPy2eWN1XBpYd1zuHEUKU/a+2sIDcZcwmVAObSQBar2BXKBxTO Y9x//vFm6fy6Uh01vrBCQX2ob72Q5TSU3keLYfhQ= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail.efficios.com (mail.efficios.com [167.114.26.124]) by sourceware.org (Postfix) with ESMTPS id 86CC43852754 for ; Tue, 14 Jun 2022 14:47:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 86CC43852754 Received: from localhost (localhost [127.0.0.1]) by mail.efficios.com (Postfix) with ESMTP id 25FAB3C6E77; Tue, 14 Jun 2022 10:47:05 -0400 (EDT) Received: from mail.efficios.com ([127.0.0.1]) by localhost (mail03.efficios.com [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id YjMXr5BxWSOC; Tue, 14 Jun 2022 10:47:04 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mail.efficios.com (Postfix) with ESMTP id 8FAD23C6E72; Tue, 14 Jun 2022 10:47:04 -0400 (EDT) DKIM-Filter: OpenDKIM Filter v2.10.3 mail.efficios.com 8FAD23C6E72 X-Virus-Scanned: amavisd-new at efficios.com Received: from mail.efficios.com ([127.0.0.1]) by localhost (mail03.efficios.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id wloO91ecEeL3; Tue, 14 Jun 2022 10:47:04 -0400 (EDT) Received: from laptop-mjeanson.internal.efficios.com (192-222-180-24.qc.cable.ebox.net [192.222.180.24]) by mail.efficios.com (Postfix) with ESMTPSA id 576283C6EA3; Tue, 14 Jun 2022 10:47:04 -0400 (EDT) To: fweimer@redhat.com Subject: [PATCH v2] linux: add RISC-V rseq signature Date: Tue, 14 Jun 2022 10:46:15 -0400 Message-Id: <20220614144614.1359043-1-mjeanson@efficios.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-13.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Michael Jeanson via Libc-alpha From: Michael Jeanson Reply-To: Michael Jeanson Cc: mathieu.desnoyers@efficios.com, libc-alpha@sourceware.org, Michael Jeanson Errors-To: libc-alpha-bounces+patchwork=sourceware.org@sourceware.org Sender: "Libc-alpha" The rseq syscall for the RISC-V architecture was added in Linux 5.18. --- sysdeps/unix/sysv/linux/riscv/bits/rseq.h | 43 +++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 sysdeps/unix/sysv/linux/riscv/bits/rseq.h diff --git a/sysdeps/unix/sysv/linux/riscv/bits/rseq.h b/sysdeps/unix/sysv/linux/riscv/bits/rseq.h new file mode 100644 index 0000000000..59d1bb24fa --- /dev/null +++ b/sysdeps/unix/sysv/linux/riscv/bits/rseq.h @@ -0,0 +1,43 @@ +/* Restartable Sequences Linux RISC-V architecture header. + Copyright (C) 2022 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifndef _SYS_RSEQ_H +# error "Never use directly; include instead." +#endif + +#include + +/* + RSEQ_SIG is a signature required before each abort handler code. + + It is a 32-bit value that maps to actual architecture code compiled + into applications and libraries. It needs to be defined for each + architecture. When choosing this value, it needs to be taken into + account that generating invalid instructions may have ill effects on + tools like objdump, and may also have impact on the CPU speculative + execution efficiency in some cases. + + Select the instruction "csrw mhartid, x0" as the RSEQ_SIG. Unlike + other architectures, the ebreak instruction has no immediate field for + distinguishing purposes. Hence, ebreak is not suitable as RSEQ_SIG. + "csrw mhartid, x0" can also satisfy the RSEQ requirement because it + is an uncommon instruction and will raise an illegal instruction + exception when executed in all modes. */ + +#if __BYTE_ORDER == __LITTLE_ENDIAN +# define RSEQ_SIG 0xf1401073 +#endif