From patchwork Sat Mar 21 05:10:01 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arjun Salunkhe X-Patchwork-Id: 132137 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [127.0.0.1]) by sourceware.org (Postfix) with ESMTP id 234334C31886 for ; Sat, 21 Mar 2026 05:10:47 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 234334C31886 Authentication-Results: sourceware.org; dkim=pass (2048-bit key, secure) header.d=proton.me header.i=@proton.me header.a=rsa-sha256 header.s=protonmail header.b=IuFYbMPL X-Original-To: newlib@sourceware.org Delivered-To: newlib@sourceware.org Received: from mail-24426.protonmail.ch (mail-24426.protonmail.ch [109.224.244.26]) by sourceware.org (Postfix) with ESMTPS id 2992C4B196F6 for ; Sat, 21 Mar 2026 05:10:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2992C4B196F6 Authentication-Results: sourceware.org; dmarc=pass (p=quarantine dis=none) header.from=proton.me Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=proton.me ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 2992C4B196F6 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=109.224.244.26 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774069810; cv=none; b=ibztPFilBkazNaSBDuIlfCxF+j1lL/kEUhgh5cz/QWQa/fVVgeVb1ZSiDCcLifI2E/G7eRF/+ELDao0sQALOOBxb1h56SjjVb9oRYS9uR3NsLLmeWNfkd1DtTKxNcHlpd3toLfxP1WYWv7GAFepzQZfuEJZumvv0UzFaGsb3XUc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1774069810; c=relaxed/simple; bh=uRxq4z5ky0UcZhf/UeH05ffksy4nj0ebAtrQVBRjiJc=; h=DKIM-Signature:Date:To:From:Subject:Message-ID:MIME-Version; b=MXojKjX1qTWUj9TvIBI2SR97jViviKAdZFUw8XUR+J+RwW9iGDkPlO1m3RJ97/uFBpqj0pF2ZfVtdt3dp+ekdCSt55ceJbngnZAByMexZYQYWN8gB2we6/RuRGSubaRh5tRjbuNxo3dI5LaWDSutdRgtKAi9qzCoBCHAwALfGMs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2992C4B196F6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1774069807; x=1774329007; bh=XlrM/TRygQXVUL+/5HFgEZqQZDeWAa1rbzzJUey6PAI=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=IuFYbMPLCfHBY3Wvl6SpWw6gj9pL6jJXFW5j4AHR3Smdouegv6pPNfRLDMKzeBsW+ kCbM2vGRFtshHbB9qzo91os2OGlTDAvSrzRQnT0YOpdqd04x8cGrht6qEexzQbp/Jb 9djXjJJCNLfcQ2jfSpw7WwBxlOpmdLArubNHrdgAH4uRVBO+qcujv/StLOrRYsP0Qi 6IR4uXP/M9Wq7C3kf572oB3yw5Pdug9goKXp2Dv4TqwhuyyNa4m18NysId8Oa4whK/ c54NeWrwOHCqmILR05g3v2NgI0wEKEeUAduJZ5UT+E3V7aY37fCSMnSeVeCT3PPJRr AOoXGtgNLcchQ== Date: Sat, 21 Mar 2026 05:10:01 +0000 To: "newlib@sourceware.org" From: Arjun Salunkhe Subject: [PATCH v2] newlib: riscv: Add Zicfilp lpads to asm functions Message-ID: Feedback-ID: 101350064:user:proton X-Pm-Message-ID: afe7df4ed02c81327f04a6120014abe47ddf47a1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_INFOUSMEBIZ, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_HOSTKARMA_W, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_PASS, SPF_PASS, TXREP, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: newlib@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Newlib mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: newlib-bounces~patchwork=sourceware.org@sourceware.org From eecb231f5237354fbf67eabb6580f12428177ebf Mon Sep 17 00:00:00 2001 From: Arjun Salunkhe Date: Thu, 19 Mar 2026 13:50:54 +0530 Subject: [PATCH v2] newlib: riscv: Add Zicfilp lpads to asm functions Adds `lpad 0` instructions, guarded by `#if __riscv_landing_pad`, to the RISC-V assembly memory, setjmp and string functions. Signed-off-by: Arjun Salunkhe --- Changes in v2: - Use __riscv_landing_pad instead of __riscv_zicfilp newlib/libc/machine/riscv/memcpy-asm.S | 4 ++++ newlib/libc/machine/riscv/memmove-asm.S | 4 ++++ newlib/libc/machine/riscv/memset.S | 4 ++++ newlib/libc/machine/riscv/setjmp.S | 6 ++++++ newlib/libc/machine/riscv/strcmp.S | 4 ++++ 5 files changed, 22 insertions(+) diff --git a/newlib/libc/machine/riscv/memcpy-asm.S b/newlib/libc/machine/riscv/memcpy-asm.S index 2771285f9..136bb4e3a 100644 --- a/newlib/libc/machine/riscv/memcpy-asm.S +++ b/newlib/libc/machine/riscv/memcpy-asm.S @@ -14,6 +14,10 @@ .global memcpy .type memcpy, @function memcpy: +#if __riscv_landing_pad + lpad 0 +#endif + mv a3, a0 beqz a2, 2f diff --git a/newlib/libc/machine/riscv/memmove-asm.S b/newlib/libc/machine/riscv/memmove-asm.S index 061472ca2..c97b8cb64 100644 --- a/newlib/libc/machine/riscv/memmove-asm.S +++ b/newlib/libc/machine/riscv/memmove-asm.S @@ -14,6 +14,10 @@ .global memmove .type memmove, @function memmove: +#if __riscv_landing_pad + lpad 0 +#endif + beqz a2, .Ldone /* in case there are 0 bytes to be copied, return immediately */ mv a4, a0 /* copy the destination address over to a4, since memmove should return that address in a0 at the end */ diff --git a/newlib/libc/machine/riscv/memset.S b/newlib/libc/machine/riscv/memset.S index 533f66758..8c3da876c 100644 --- a/newlib/libc/machine/riscv/memset.S +++ b/newlib/libc/machine/riscv/memset.S @@ -50,6 +50,10 @@ memset: +#if __riscv_landing_pad + lpad 0 +#endif + #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__) mv a3, a0 beqz a2, .Ldone diff --git a/newlib/libc/machine/riscv/setjmp.S b/newlib/libc/machine/riscv/setjmp.S index f2b50537e..9cc85e747 100644 --- a/newlib/libc/machine/riscv/setjmp.S +++ b/newlib/libc/machine/riscv/setjmp.S @@ -15,6 +15,9 @@ .globl setjmp .type setjmp, @function setjmp: +#if __riscv_landing_pad + lpad 0 +#endif REG_S ra, 0*SZREG(a0) #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast) sd s0, 1*SZREG(a0) @@ -70,6 +73,9 @@ setjmp: .globl longjmp .type longjmp, @function longjmp: +#if __riscv_landing_pad + lpad 0 +#endif REG_L ra, 0*SZREG(a0) #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast) ld s0, 1*SZREG(a0) diff --git a/newlib/libc/machine/riscv/strcmp.S b/newlib/libc/machine/riscv/strcmp.S index 0b1dfc4b1..18ac9a981 100644 --- a/newlib/libc/machine/riscv/strcmp.S +++ b/newlib/libc/machine/riscv/strcmp.S @@ -15,6 +15,10 @@ .globl strcmp .type strcmp, @function strcmp: +#if __riscv_landing_pad + lpad 0 +#endif + #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__) .Lcompare: lbu a2, 0(a0)