[v2] newlib: riscv: Add Zicfilp lpads to asm functions

Message ID NeB6paN6iBxYLJrcKfCM4phxwtgc4ed_UwyPd_1BlLU-7wmJTWDRaESfQcRDzVRiColSnnK28LRiFu2JrAQ5DDql4pwavfeU3b4duj0oAi8=@proton.me
State New
Headers
Series [v2] newlib: riscv: Add Zicfilp lpads to asm functions |

Commit Message

Arjun Salunkhe March 21, 2026, 5:10 a.m. UTC
  From eecb231f5237354fbf67eabb6580f12428177ebf Mon Sep 17 00:00:00 2001
From: Arjun Salunkhe <arjun.salunkhe@proton.me>
Date: Thu, 19 Mar 2026 13:50:54 +0530
Subject: [PATCH v2] newlib: riscv: Add Zicfilp lpads to asm functions

Adds `lpad 0` instructions, guarded by `#if __riscv_landing_pad`,
to the RISC-V assembly memory, setjmp and string functions.

Signed-off-by: Arjun Salunkhe <arjun.salunkhe@proton.me>
---
Changes in v2:
- Use __riscv_landing_pad instead of __riscv_zicfilp

 newlib/libc/machine/riscv/memcpy-asm.S  | 4 ++++
 newlib/libc/machine/riscv/memmove-asm.S | 4 ++++
 newlib/libc/machine/riscv/memset.S      | 4 ++++
 newlib/libc/machine/riscv/setjmp.S      | 6 ++++++
 newlib/libc/machine/riscv/strcmp.S      | 4 ++++
 5 files changed, 22 insertions(+)
  

Comments

Kito Cheng March 23, 2026, 1:50 p.m. UTC | #1
Thanks, pushed :)

Arjun Salunkhe <arjun.salunkhe@proton.me> 於 2026年3月21日週六 下午1:10寫道:
>
> From eecb231f5237354fbf67eabb6580f12428177ebf Mon Sep 17 00:00:00 2001
> From: Arjun Salunkhe <arjun.salunkhe@proton.me>
> Date: Thu, 19 Mar 2026 13:50:54 +0530
> Subject: [PATCH v2] newlib: riscv: Add Zicfilp lpads to asm functions
>
> Adds `lpad 0` instructions, guarded by `#if __riscv_landing_pad`,
> to the RISC-V assembly memory, setjmp and string functions.
>
> Signed-off-by: Arjun Salunkhe <arjun.salunkhe@proton.me>
> ---
> Changes in v2:
> - Use __riscv_landing_pad instead of __riscv_zicfilp
>
>  newlib/libc/machine/riscv/memcpy-asm.S  | 4 ++++
>  newlib/libc/machine/riscv/memmove-asm.S | 4 ++++
>  newlib/libc/machine/riscv/memset.S      | 4 ++++
>  newlib/libc/machine/riscv/setjmp.S      | 6 ++++++
>  newlib/libc/machine/riscv/strcmp.S      | 4 ++++
>  5 files changed, 22 insertions(+)
>
> diff --git a/newlib/libc/machine/riscv/memcpy-asm.S b/newlib/libc/machine/riscv/memcpy-asm.S
> index 2771285f9..136bb4e3a 100644
> --- a/newlib/libc/machine/riscv/memcpy-asm.S
> +++ b/newlib/libc/machine/riscv/memcpy-asm.S
> @@ -14,6 +14,10 @@
>  .global memcpy
>  .type  memcpy, @function
>  memcpy:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
> +
>    mv a3, a0
>    beqz a2, 2f
>
> diff --git a/newlib/libc/machine/riscv/memmove-asm.S b/newlib/libc/machine/riscv/memmove-asm.S
> index 061472ca2..c97b8cb64 100644
> --- a/newlib/libc/machine/riscv/memmove-asm.S
> +++ b/newlib/libc/machine/riscv/memmove-asm.S
> @@ -14,6 +14,10 @@
>  .global memmove
>  .type  memmove, @function
>  memmove:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
> +
>    beqz a2, .Ldone              /* in case there are 0 bytes to be copied, return immediately */
>
>    mv a4, a0                    /* copy the destination address over to a4, since memmove should return that address in a0 at the end */
> diff --git a/newlib/libc/machine/riscv/memset.S b/newlib/libc/machine/riscv/memset.S
> index 533f66758..8c3da876c 100644
> --- a/newlib/libc/machine/riscv/memset.S
> +++ b/newlib/libc/machine/riscv/memset.S
> @@ -50,6 +50,10 @@
>
>
>  memset:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
> +
>  #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
>    mv     a3, a0
>    beqz   a2, .Ldone
> diff --git a/newlib/libc/machine/riscv/setjmp.S b/newlib/libc/machine/riscv/setjmp.S
> index f2b50537e..9cc85e747 100644
> --- a/newlib/libc/machine/riscv/setjmp.S
> +++ b/newlib/libc/machine/riscv/setjmp.S
> @@ -15,6 +15,9 @@
>    .globl  setjmp
>    .type   setjmp, @function
>  setjmp:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
>         REG_S ra,  0*SZREG(a0)
>    #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
>           sd    s0,  1*SZREG(a0)
> @@ -70,6 +73,9 @@ setjmp:
>    .globl  longjmp
>    .type   longjmp, @function
>  longjmp:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
>         REG_L ra,  0*SZREG(a0)
>    #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
>      ld s0, 1*SZREG(a0)
> diff --git a/newlib/libc/machine/riscv/strcmp.S b/newlib/libc/machine/riscv/strcmp.S
> index 0b1dfc4b1..18ac9a981 100644
> --- a/newlib/libc/machine/riscv/strcmp.S
> +++ b/newlib/libc/machine/riscv/strcmp.S
> @@ -15,6 +15,10 @@
>  .globl strcmp
>  .type  strcmp, @function
>  strcmp:
> +#if __riscv_landing_pad
> +  lpad 0
> +#endif
> +
>  #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
>  .Lcompare:
>    lbu   a2, 0(a0)
> --
> 2.53.0
>
>
  

Patch

diff --git a/newlib/libc/machine/riscv/memcpy-asm.S b/newlib/libc/machine/riscv/memcpy-asm.S
index 2771285f9..136bb4e3a 100644
--- a/newlib/libc/machine/riscv/memcpy-asm.S
+++ b/newlib/libc/machine/riscv/memcpy-asm.S
@@ -14,6 +14,10 @@ 
 .global memcpy
 .type	memcpy, @function
 memcpy:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
   mv a3, a0
   beqz a2, 2f
 
diff --git a/newlib/libc/machine/riscv/memmove-asm.S b/newlib/libc/machine/riscv/memmove-asm.S
index 061472ca2..c97b8cb64 100644
--- a/newlib/libc/machine/riscv/memmove-asm.S
+++ b/newlib/libc/machine/riscv/memmove-asm.S
@@ -14,6 +14,10 @@ 
 .global memmove
 .type	memmove, @function
 memmove:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
   beqz a2, .Ldone		/* in case there are 0 bytes to be copied, return immediately */
 
   mv a4, a0			/* copy the destination address over to a4, since memmove should return that address in a0 at the end */
diff --git a/newlib/libc/machine/riscv/memset.S b/newlib/libc/machine/riscv/memset.S
index 533f66758..8c3da876c 100644
--- a/newlib/libc/machine/riscv/memset.S
+++ b/newlib/libc/machine/riscv/memset.S
@@ -50,6 +50,10 @@ 
 
 
 memset:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
 #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
   mv     a3, a0
   beqz   a2, .Ldone
diff --git a/newlib/libc/machine/riscv/setjmp.S b/newlib/libc/machine/riscv/setjmp.S
index f2b50537e..9cc85e747 100644
--- a/newlib/libc/machine/riscv/setjmp.S
+++ b/newlib/libc/machine/riscv/setjmp.S
@@ -15,6 +15,9 @@ 
   .globl  setjmp
   .type   setjmp, @function
 setjmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
 	REG_S ra,  0*SZREG(a0)
   #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
 	  sd    s0,  1*SZREG(a0)
@@ -70,6 +73,9 @@  setjmp:
   .globl  longjmp
   .type   longjmp, @function
 longjmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
 	REG_L ra,  0*SZREG(a0)
   #if __riscv_xlen == 32 && (__riscv_zilsd) && (__riscv_misaligned_fast)
     ld s0, 1*SZREG(a0)
diff --git a/newlib/libc/machine/riscv/strcmp.S b/newlib/libc/machine/riscv/strcmp.S
index 0b1dfc4b1..18ac9a981 100644
--- a/newlib/libc/machine/riscv/strcmp.S
+++ b/newlib/libc/machine/riscv/strcmp.S
@@ -15,6 +15,10 @@ 
 .globl strcmp
 .type  strcmp, @function
 strcmp:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+
 #if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
 .Lcompare:
   lbu   a2, 0(a0)