From patchwork Fri Aug 14 02:26:48 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pincheng Wang X-Patchwork-Id: 141352 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C8EAC4BA79AD for ; Fri, 14 Aug 2026 02:27:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C8EAC4BA79AD X-Original-To: newlib@sourceware.org Delivered-To: newlib@sourceware.org Received: from cstnet.cn (smtp81.cstnet.cn [159.226.251.81]) by sourceware.org (Postfix) with ESMTPS id 4092E4BA23F8 for ; Fri, 14 Aug 2026 02:27:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4092E4BA23F8 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=isrc.iscas.ac.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4092E4BA23F8 Authentication-Results: sourceware.org; arc=none smtp.remote-ip=159.226.251.81 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1786674425; cv=none; b=kW3280LL0x38uignoAW5B38xBt99xOuJPsy8uBSDqaj/E64OYfxvY8mzdOqsJA1s2qYDrBRBfL7UlEueehhFcXzx2RKyYbN78B/2Rhwuyx5l13RczXZujgCLlDwlYUE/efmwYTfUDnd0jm49G+y3qAEn9kYwocC0cmYSoZ5POws= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1786674425; c=relaxed/simple; bh=UDM4pcNWL3cXorzLEL5jw7yjW7bM/3dxx000Va3MKVM=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=f2+Fg7uQU5jzb4mCLsvd8itrWjJ/d2DJF3ywqYXItG58XVFgCFTAN3x8Yfrl63Bv6kM9wV6LZSB6jH5uHhnTv89HWs22TS7BF6jVnlgkyvgB02WmjpwuZYAOwfk9F8eXSiOZCJQ6XLrw4uzxMVhHwaFVMBLGZ2Xe8PunRVqA5vI= ARC-Authentication-Results: i=1; sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4092E4BA23F8 Received: from ROG.localdomain (unknown [183.134.225.12]) by APP-03 (Coremail) with SMTP id rQCowACnsT_xfH5qsxNIBQ--.31342S9; Fri, 14 Aug 2026 10:27:00 +0800 (CST) From: Pincheng Wang To: newlib@sourceware.org Cc: Pincheng Wang Subject: [PATCH v3 07/15] riscv: add vectorized strncmp Date: Fri, 14 Aug 2026 10:26:48 +0800 Message-Id: <20260814022656.1071643-8-pincheng.plct@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260814022656.1071643-1-pincheng.plct@isrc.iscas.ac.cn> References: <20260814022656.1071643-1-pincheng.plct@isrc.iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: rQCowACnsT_xfH5qsxNIBQ--.31342S9 X-Coremail-Antispam: 1UD129KBjvJXoWxGFyDuFykJw1xtr4ktrWfAFb_yoW5WrWUpF srWa1rtF4xtryfJrZ2qF18uF45JFZ5KF13KrWrAa1YyrWkCa95WF4ktr43uw4fJr9IvF17 u3W2kr1S9r1UXw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9G14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26r4j6ryUM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr 1l84ACjcxK6I8E87Iv67AKxVWUJVW8JwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1U M2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjx v20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1l F7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxAIw28IcxkI7VAKI48JMx C20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAF wI0_JrI_JrWlx4CE17CEb7AF67AKxVWUXVWUAwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20x vE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v2 0xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxV W8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUjeHq7UUUUU== X-Originating-IP: [183.134.225.12] X-CM-SenderInfo: pslquxhhqjh1xofwqxxvufhxpvfd2hldfou0/ X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_PBL, SPF_HELO_PASS, SPF_PASS, TXREP shortcircuit=no autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: newlib@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Newlib mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: newlib-bounces~patchwork=sourceware.org@sourceware.org The vector implementation compares both operands in vector-length chunks using fault-only-first loads (vle8ff.v); vl is additionally capped by the remaining count so it never reads past the n-th byte and never crosses into an unmapped page. This provides significant performance improvements on RVV-capable hardware. Use conditional compilation to fall back to the generic implementation when __riscv_vector is not available, maintaining compatibility with non-vector RISC-V systems. Signed-off-by: Pincheng Wang --- newlib/libc/machine/riscv/Makefile.inc | 2 ++ newlib/libc/machine/riscv/strncmp-asm.S | 47 +++++++++++++++++++++++++ newlib/libc/machine/riscv/strncmp.c | 5 +++ 3 files changed, 54 insertions(+) create mode 100644 newlib/libc/machine/riscv/strncmp-asm.S create mode 100644 newlib/libc/machine/riscv/strncmp.c diff --git a/newlib/libc/machine/riscv/Makefile.inc b/newlib/libc/machine/riscv/Makefile.inc index 243195b36..015b91799 100644 --- a/newlib/libc/machine/riscv/Makefile.inc +++ b/newlib/libc/machine/riscv/Makefile.inc @@ -29,6 +29,8 @@ libc_a_SOURCES += \ %D%/strcpy.c \ %D%/strlen-asm.S \ %D%/strlen.c \ + %D%/strncmp-asm.S \ + %D%/strncmp.c \ %D%/strnlen-asm.S \ %D%/strnlen.c \ %D%/strrchr-asm.S \ diff --git a/newlib/libc/machine/riscv/strncmp-asm.S b/newlib/libc/machine/riscv/strncmp-asm.S new file mode 100644 index 000000000..c178c32e2 --- /dev/null +++ b/newlib/libc/machine/riscv/strncmp-asm.S @@ -0,0 +1,47 @@ +#include + +#if defined(__riscv_vector) && !defined(__OPTIMIZE_SIZE__) && !defined(PREFER_SIZE_OVER_SPEED) +ENTRY(strncmp) + beqz a2, .Lzero_length +.Lloop: + vsetvli zero, a2, e8, m1, ta, ma + + vle8ff.v v0, (a0) + /* v0[i] == 0. */ + vmseq.vx v8, v0, zero + + vle8ff.v v4, (a1) + /* v0[i] != v4[i]. */ + vmsne.vv v9, v0, v4 + + csrr a3, vl + + /* r = mask1 | mask2 + Combine the first NUL in a0 with the first differing byte so a single + vfirst.m locates whichever comes first. */ + vmor.mm v8, v8, v9 + + sub a2, a2, a3 + + vfirst.m a4, v8 + + bgez a4, .Lend_loop + + add a0, a0, a3 + add a1, a1, a3 + bnez a2, .Lloop +.Lend_loop: + + add a0, a0, a4 + add a1, a1, a4 + lbu a4, 0(a0) + lbu a5, 0(a1) + + sub a0, a4, a5 + ret + +.Lzero_length: + li a0, 0 + ret +END(strncmp) +#endif diff --git a/newlib/libc/machine/riscv/strncmp.c b/newlib/libc/machine/riscv/strncmp.c new file mode 100644 index 000000000..81ccf1e58 --- /dev/null +++ b/newlib/libc/machine/riscv/strncmp.c @@ -0,0 +1,5 @@ +#if defined(__OPTIMIZE_SIZE__) || defined(PREFER_SIZE_OVER_SPEED) || !defined(__riscv_vector) +# include "../../string/strncmp.c" +#else +/* strncmp defined in strncmp-asm.S */ +#endif