diff mbox series

riscv: add vectorized rawmemchr

Message ID 20260529011952.11668-1-pincheng.plct@isrc.iscas.ac.cn
State New
Headers
Series riscv: add vectorized rawmemchr |

Commit Message

Pincheng Wang May 29, 2026, 1:19 a.m. UTC 
  The vector implementation uses m1 register grouping to avoid overly
lareg fault-only-first loads on large-VLEN implementations. Use
conditional compilation to fall back to the generic implementation when
__riscv_vector is not available, maintaining compatibility with
non-vector RISC-V systems.

Signed-off-by: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn>
---
 newlib/libc/machine/riscv/Makefile.inc    |  2 ++
 newlib/libc/machine/riscv/rawmemchr-asm.S | 27 +++++++++++++++++++++++
 newlib/libc/machine/riscv/rawmemchr.c     |  6 +++++
 3 files changed, 35 insertions(+)
 create mode 100644 newlib/libc/machine/riscv/rawmemchr-asm.S
 create mode 100644 newlib/libc/machine/riscv/rawmemchr.c

Comments

Kito Cheng June 12, 2026, 3:12 p.m. UTC | #1 
Pushed with minor fix :)

> diff --git a/newlib/libc/machine/riscv/Makefile.inc b/newlib/libc/machine/riscv/Makefile.inc
> index 1fdee8d95..669d3ed0f 100644
> --- a/newlib/libc/machine/riscv/Makefile.inc
> +++ b/newlib/libc/machine/riscv/Makefile.inc
> @@ -15,6 +15,8 @@ libc_a_SOURCES += \
>         %D%/mempcpy.c \
>         %D%/memrchr-asm.S \
>         %D%/memrchr.c \
> +       %D%/rawmemchr-asm.S \
> +       %D%/rawmemchr.c

^^^^ miss backslash at end of line

>         %D%/memset.S \
>         %D%/setjmp.S \
>         %D%/stpcpy.c \
diff mbox series

Patch

diff --git a/newlib/libc/machine/riscv/Makefile.inc b/newlib/libc/machine/riscv/Makefile.inc
index 1fdee8d95..669d3ed0f 100644
--- a/newlib/libc/machine/riscv/Makefile.inc
+++ b/newlib/libc/machine/riscv/Makefile.inc
@@ -15,6 +15,8 @@  libc_a_SOURCES += \
 	%D%/mempcpy.c \
 	%D%/memrchr-asm.S \
 	%D%/memrchr.c \
+	%D%/rawmemchr-asm.S \
+	%D%/rawmemchr.c
 	%D%/memset.S \
 	%D%/setjmp.S \
 	%D%/stpcpy.c \
diff --git a/newlib/libc/machine/riscv/rawmemchr-asm.S b/newlib/libc/machine/riscv/rawmemchr-asm.S
new file mode 100644
index 000000000..058448716
--- /dev/null
+++ b/newlib/libc/machine/riscv/rawmemchr-asm.S
@@ -0,0 +1,27 @@ 
+#if defined(__riscv_vector) && !defined(__OPTIMIZE_SIZE__) && !defined(PREFER_SIZE_OVER_SPEED)
+.text
+.global rawmemchr
+.type rawmemchr, @function
+rawmemchr:
+#if __riscv_landing_pad
+  lpad 0
+#endif
+  andi a1, a1, 0xff
+.Lloop:
+  vsetvli t0, zero, e8, m1, ta, ma
+
+  vle8ff.v v0, (a0)
+  vmseq.vx v8, v0, a1
+  vfirst.m a2, v8
+
+  bgez a2, .Lfound
+
+  csrr a3, vl
+  add a0, a0, a3
+  j .Lloop
+
+.Lfound:
+  add a0, a0, a2
+  ret
+.size rawmemchr, .-rawmemchr
+#endif
diff --git a/newlib/libc/machine/riscv/rawmemchr.c b/newlib/libc/machine/riscv/rawmemchr.c
new file mode 100644
index 000000000..af16baca3
--- /dev/null
+++ b/newlib/libc/machine/riscv/rawmemchr.c
@@ -0,0 +1,6 @@ 
+#if defined(__OPTIMIZE_SIZE__) || defined(PREFER_SIZE_OVER_SPEED) || !defined(__riscv_vector)
+# include "../../string/rawmemchr.c"
+#else
+/* rawmemchr defined in rawmemchr-asm.S */
+#endif
+