| Message ID | 20260814022656.1071643-1-pincheng.plct@isrc.iscas.ac.cn |
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Return-Path: <newlib-bounces~patchwork=sourceware.org@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from vm01.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 225084BA902D for <patchwork@sourceware.org>; Fri, 14 Aug 2026 02:28:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 225084BA902D X-Original-To: newlib@sourceware.org Delivered-To: newlib@sourceware.org Received: from cstnet.cn (smtp81.cstnet.cn [159.226.251.81]) by sourceware.org (Postfix) with ESMTPS id 510474BA7987 for <newlib@sourceware.org>; Fri, 14 Aug 2026 02:27:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 510474BA7987 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=isrc.iscas.ac.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 510474BA7987 Authentication-Results: sourceware.org; arc=none smtp.remote-ip=159.226.251.81 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1786674425; cv=none; b=NQVzxerZUSq1uUh78GR/xmv63rz0OEL6UQOaONCqHV2JuR7PR47oDftNkyKFwawiF+r60UiWDwzDNHSEFOqjj/qhChzirmlenPjOvfpnYZcfTZ4LulqsjwEd2yFEkVIQy803flTFoRAhOiSoCKEineyG6DRzPBfcFI+STJmY6zo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1786674425; c=relaxed/simple; bh=RjrT9p08cBREdmjq5C9Ln3/o7KZ76nFybvjazz6zaTQ=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=WCpqnlzAjq4B7OH16W7t/2oMZh+YkZNKhzfq0lYBn+9onD0PfZtbI0LCKJc1v/Dj0XfeTBtUZ67+4yc3Zd26lANqSJ0njg63Y7BXbUG93TvZ4AafUEm2W+D6h9SEBEMYP1qmp0A3ThGJk59CBnfOcHgeQsPyKAcNn7uJI9tJ14s= ARC-Authentication-Results: i=1; sourceware.org DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 510474BA7987 Received: from ROG.localdomain (unknown [183.134.225.12]) by APP-03 (Coremail) with SMTP id rQCowACnsT_xfH5qsxNIBQ--.31342S2; Fri, 14 Aug 2026 10:26:58 +0800 (CST) From: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> To: newlib@sourceware.org Cc: Pincheng Wang <pincheng.plct@isrc.iscas.ac.cn> Subject: [PATCH v3 00/15] riscv: vectorized str* routines Date: Fri, 14 Aug 2026 10:26:41 +0800 Message-Id: <20260814022656.1071643-1-pincheng.plct@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: rQCowACnsT_xfH5qsxNIBQ--.31342S2 X-Coremail-Antispam: 1UD129KBjvJXoW3Gw18KF1fCr4Dtw4Dtw45trb_yoWxXFyfpF s7G3W5Jw18trn3ArsxZF18ury5JFZ3Gw13Gr4xAa1YqFWkK3yrKrs8Jw12yr4fJFn0vF1x uF4kCr1Y9w15XrUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUyq14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UM28EF7xvwVC2z280aVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r1j6r 4UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xII jxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr 1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxAIw28IcxkI7VAKI48J MxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwV AFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUXVWUAwCIc40Y0x0EwIxGrwCI42IY6xIIjxv2 0xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4 v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AK xVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjfU5WlkUUUUU X-Originating-IP: [183.134.225.12] X-CM-SenderInfo: pslquxhhqjh1xofwqxxvufhxpvfd2hldfou0/ X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, RCVD_IN_PBL, SPF_HELO_PASS, SPF_PASS, TXREP shortcircuit=no autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on sourceware.org X-BeenThere: newlib@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Newlib mailing list <newlib.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/newlib>, <mailto:newlib-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/newlib/> List-Post: <mailto:newlib@sourceware.org> List-Help: <mailto:newlib-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/newlib>, <mailto:newlib-request@sourceware.org?subject=subscribe> Errors-To: newlib-bounces~patchwork=sourceware.org@sourceware.org |
| Series |
riscv: vectorized str* routines
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Message
Pincheng Wang
Aug. 14, 2026, 2:26 a.m. UTC
Hi all,
This series adds RISC-V Vector Extension (RVV) implementations for the str*
family in Newlib, as a follow-up to the earlier mem* work (memset, memcpy,
memmove, and then memccpy, memchr, memcmp, mempcpy, memrchr, rawmemchr). It
covers the following 15 interfaces:
strlen, strnlen, strchr, strchrnul, strrchr, strcmp, strncmp, strcpy,
strncpy, strcat, strncat, strspn, strcspn, strpbrk, strstr
Each routine follows the same integration pattern as the mem* series: a
hand-written <func>-asm.S guarded by
__riscv_vector && !__OPTIMIZE_SIZE__ && !PREFER_SIZE_OVER_SPEED
with a small <func>.c that falls back to the existing scalar or generic
implementation when the guard is not satisfied, so non-vector RISC-V targets are
unaffected. For routines that need the full integer register set, the guard
also excludes __riscv_e. For strlen, strcmp, and strcpy the existing
hand-optimized scalar code is kept as the fallback.
Page-boundary safety was a primary concern. Every scan reads its input(s) with
fault-only-first loads (vle8ff.v): element 0 is always loaded and a fault on any
later element merely truncates vl, so a vector load is never forced across a
page boundary into an unmapped page. The bounded routines (strnlen, strncmp,
strncpy, strncat) additionally cap vl by the remaining count so they never read
past the n-th byte. The set routines (strspn, strcspn, strpbrk) build a
256-byte table on the stack and gather through it with vluxei8.v, which only
touches the fully-mapped table. strstr combines a vle8ff scan for the needle's
first byte with a byte-wise verify that stops at a NUL, so neither phase crosses
past the end of either string.
Changes in v3:
- Drop strcasecmp and strncasecmp from the series.
- Remove the __riscv_xlen == 64 guard where the implementation is not
XLEN-specific.
- Exclude __riscv_e for routines that require registers outside the embedded
integer register set.
As with the mem* series, this is a fair amount of hand-written assembly to
maintain; other architectures rarely optimize the whole str* family. I'm glad
to trim the set to whatever subset is considered worth carrying.
Comments and suggestions welcome.
Best regards,
Pincheng Wang
Pincheng Wang (15):
riscv: add vectorized strlen
riscv: add vectorized strnlen
riscv: add vectorized strchr
riscv: add vectorized strchrnul
riscv: add vectorized strrchr
riscv: add vectorized strcmp
riscv: add vectorized strncmp
riscv: add vectorized strcpy
riscv: add vectorized strncpy
riscv: add vectorized strcat
riscv: add vectorized strncat
riscv: add vectorized strspn
riscv: add vectorized strcspn
riscv: add vectorized strpbrk
riscv: add vectorized strstr
newlib/libc/machine/riscv/Makefile.inc | 29 ++++++++++++-
newlib/libc/machine/riscv/strcat-asm.S | 36 ++++++++++++++++
newlib/libc/machine/riscv/strcat.c | 5 +++
newlib/libc/machine/riscv/strchr-asm.S | 25 +++++++++++
newlib/libc/machine/riscv/strchr.c | 5 +++
newlib/libc/machine/riscv/strchrnul-asm.S | 27 ++++++++++++
newlib/libc/machine/riscv/strchrnul.c | 5 +++
newlib/libc/machine/riscv/strcmp-asm.S | 51 +++++++++++++++++++++++
newlib/libc/machine/riscv/strcmp.S | 4 ++
newlib/libc/machine/riscv/strcpy-asm.S | 20 +++++++++
newlib/libc/machine/riscv/strcpy.c | 5 +++
newlib/libc/machine/riscv/strcspn-asm.S | 51 +++++++++++++++++++++++
newlib/libc/machine/riscv/strcspn.c | 5 +++
newlib/libc/machine/riscv/strlen-asm.S | 21 ++++++++++
newlib/libc/machine/riscv/strlen.c | 5 +++
newlib/libc/machine/riscv/strncat-asm.S | 43 +++++++++++++++++++
newlib/libc/machine/riscv/strncat.c | 5 +++
newlib/libc/machine/riscv/strncmp-asm.S | 47 +++++++++++++++++++++
newlib/libc/machine/riscv/strncmp.c | 5 +++
newlib/libc/machine/riscv/strncpy-asm.S | 42 +++++++++++++++++++
newlib/libc/machine/riscv/strncpy.c | 5 +++
newlib/libc/machine/riscv/strnlen-asm.S | 24 +++++++++++
newlib/libc/machine/riscv/strnlen.c | 5 +++
newlib/libc/machine/riscv/strpbrk-asm.S | 51 +++++++++++++++++++++++
newlib/libc/machine/riscv/strpbrk.c | 5 +++
newlib/libc/machine/riscv/strrchr-asm.S | 38 +++++++++++++++++
newlib/libc/machine/riscv/strrchr.c | 5 +++
newlib/libc/machine/riscv/strspn-asm.S | 47 +++++++++++++++++++++
newlib/libc/machine/riscv/strspn.c | 5 +++
newlib/libc/machine/riscv/strstr-asm.S | 51 +++++++++++++++++++++++
newlib/libc/machine/riscv/strstr.c | 5 +++
31 files changed, 676 insertions(+), 1 deletion(-)
create mode 100644 newlib/libc/machine/riscv/strcat-asm.S
create mode 100644 newlib/libc/machine/riscv/strcat.c
create mode 100644 newlib/libc/machine/riscv/strchr-asm.S
create mode 100644 newlib/libc/machine/riscv/strchr.c
create mode 100644 newlib/libc/machine/riscv/strchrnul-asm.S
create mode 100644 newlib/libc/machine/riscv/strchrnul.c
create mode 100644 newlib/libc/machine/riscv/strcmp-asm.S
create mode 100644 newlib/libc/machine/riscv/strcpy-asm.S
create mode 100644 newlib/libc/machine/riscv/strcspn-asm.S
create mode 100644 newlib/libc/machine/riscv/strcspn.c
create mode 100644 newlib/libc/machine/riscv/strlen-asm.S
create mode 100644 newlib/libc/machine/riscv/strncat-asm.S
create mode 100644 newlib/libc/machine/riscv/strncat.c
create mode 100644 newlib/libc/machine/riscv/strncmp-asm.S
create mode 100644 newlib/libc/machine/riscv/strncmp.c
create mode 100644 newlib/libc/machine/riscv/strncpy-asm.S
create mode 100644 newlib/libc/machine/riscv/strncpy.c
create mode 100644 newlib/libc/machine/riscv/strnlen-asm.S
create mode 100644 newlib/libc/machine/riscv/strnlen.c
create mode 100644 newlib/libc/machine/riscv/strpbrk-asm.S
create mode 100644 newlib/libc/machine/riscv/strpbrk.c
create mode 100644 newlib/libc/machine/riscv/strrchr-asm.S
create mode 100644 newlib/libc/machine/riscv/strrchr.c
create mode 100644 newlib/libc/machine/riscv/strspn-asm.S
create mode 100644 newlib/libc/machine/riscv/strspn.c
create mode 100644 newlib/libc/machine/riscv/strstr-asm.S
create mode 100644 newlib/libc/machine/riscv/strstr.c