diff mbox series

Add HWCAP2_SME* from Linux 6.3 to AArch64 bits/hwcap.h

Message ID f367be-1451-537-74f1-aaed651a5cb6@codesourcery.com
State Committed
Commit 5460fbbfeaabb1ac696eace962bd4bcfd99a78d9
Headers
Series Add HWCAP2_SME* from Linux 6.3 to AArch64 bits/hwcap.h |

Checks

Context Check Description
dj/TryBot-apply_patch success Patch applied to master at the time it was sent
dj/TryBot-32bit success Build for i686

Commit Message

Joseph Myers May 17, 2023, 9:05 p.m. UTC 
  Linux 6.3 adds six HWCAP2_SME* constants for AArch64; add them to the
corresponding bits/hwcap.h in glibc.

Tested with build-many-glibcs.py for aarch64-linux-gnu.

Comments

Szabolcs Nagy May 18, 2023, 10:17 a.m. UTC | #1 
The 05/17/2023 21:05, Joseph Myers wrote:
> Linux 6.3 adds six HWCAP2_SME* constants for AArch64; add them to the
> corresponding bits/hwcap.h in glibc.
> 
> Tested with build-many-glibcs.py for aarch64-linux-gnu.

thanks, this looks good.

Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>

> 
> diff --git a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
> index 69b2b43140..55c7ed39be 100644
> --- a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
> +++ b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
> @@ -92,3 +92,9 @@
>  #define HWCAP2_CSSC		(1UL << 34)
>  #define HWCAP2_RPRFM		(1UL << 35)
>  #define HWCAP2_SVE2P1		(1UL << 36)
> +#define HWCAP2_SME2		(1UL << 37)
> +#define HWCAP2_SME2P1		(1UL << 38)
> +#define HWCAP2_SME_I16I32	(1UL << 39)
> +#define HWCAP2_SME_BI32I32	(1UL << 40)
> +#define HWCAP2_SME_B16B16	(1UL << 41)
> +#define HWCAP2_SME_F16F16	(1UL << 42)
> 
> -- 
> Joseph S. Myers
> joseph@codesourcery.com
diff mbox series

Patch

diff --git a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
index 69b2b43140..55c7ed39be 100644
--- a/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
+++ b/sysdeps/unix/sysv/linux/aarch64/bits/hwcap.h
@@ -92,3 +92,9 @@ 
 #define HWCAP2_CSSC		(1UL << 34)
 #define HWCAP2_RPRFM		(1UL << 35)
 #define HWCAP2_SVE2P1		(1UL << 36)
+#define HWCAP2_SME2		(1UL << 37)
+#define HWCAP2_SME2P1		(1UL << 38)
+#define HWCAP2_SME_I16I32	(1UL << 39)
+#define HWCAP2_SME_BI32I32	(1UL << 40)
+#define HWCAP2_SME_B16B16	(1UL << 41)
+#define HWCAP2_SME_F16F16	(1UL << 42)