diff mbox series

[v3,03/29] aarch64: Add <bits/pagesize.h>

Message ID	e0e3a312df29f0ab692a502e4eb3e8833575ddaf.1727624528.git.fweimer@redhat.com (mailing list archive)
State	Under Review
Delegated to:	Adhemerval Zanella Netto
Headers	DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org ACAAB385841E From: Florian Weimer <fweimer@redhat.com> To: libc-alpha@sourceware.org Cc: Adhemerval Zanella <adhemerval.zanella@linaro.org>, Wilco Dijkstra <Wilco.Dijkstra@arm.com> Subject: [PATCH v3 03/29] aarch64: Add <bits/pagesize.h> In-Reply-To: <cover.1727624528.git.fweimer@redhat.com> Message-ID: <e0e3a312df29f0ab692a502e4eb3e8833575ddaf.1727624528.git.fweimer@redhat.com> References: <cover.1727624528.git.fweimer@redhat.com> Date: Sun, 29 Sep 2024 17:53:24 +0200 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Content-Type: text/plain Precedence: list Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org
Series	Teach glibc about possible page sizes and handle gaps in ld.so \| [v3,00/29] Teach glibc about possible page sizes and handle gaps in ld.so [v3,01/29] elf: Add tests to verify that l_contiguous reflects reality [v3,02/29] Prepare for the addition of the <sys/pagesize.h> header [v3,03/29] aarch64: Add <bits/pagesize.h> [v3,04/29] alpha: Add <bits/pagesize.h> [v3,05/29] arc: Add <bits/pagesize.h> [v3,06/29] arm: Add <bits/pagesize.h> [v3,07/29] csky: Add <bits/pagesize.h> [v3,08/29] hppa: Add <bits/pagesize.h> [v3,09/29] loongarch: Add <bits/pagesize.h> [v3,10/29] m68k: Add <bits/pagesize.h> [v3,11/29] microblaze: Add <bits/pagesize.h> [v3,12/29] mips: Add <bits/pagesize.h> [v3,13/29] nios2: Add <bits/pagesize.h> [v3,14/29] or1k: Add <bits/pagesize.h> [v3,15/29] powerpc: Add <bits/pagesize.h> [v3,16/29] riscv: Add <bits/pagesize.h> [v3,17/29] s390: Add <bits/pagesize.h> [v3,18/29] sh: Add <bits/pagesize.h> [v3,19/29] sparc: Add <bits/pagesize.h> [v3,20/29] x86: Add <bits/pagesize.h> [v3,21/29] misc: Add tst-getpagesize [v3,22/29] elf: Extract rtld_setup_phdr function from dl_main [v3,23/29] configure: Add --with-ld-relro-load-gaps configure option and test [v3,24/29] elf: Handle ld.so with LOAD segment gaps in _dl_find_object (bug 31943) [v3,25/29] Install the <sys/pagesize.h> header file [v3,26/29] Linux: Optimize getpagesize using <sys/pagesize.h> [v3,27/29] malloc: Use volatile as compiler barrier in tst-memalign, tst-valloc [v3,28/29] posix: Use <support/next_to_fault.h> in tst-fnmatch3 [v3,29/29] Optimize various ways to obtain the page size using <bits/pagesize.h>

Checks

Context	Check	Description
redhat-pt-bot/TryBot-apply_patch	success	Patch applied to master at the time it was sent
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64	success	Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64	success	Test passed
linaro-tcwg-bot/tcwg_glibc_build--master-arm	success	Build passed
linaro-tcwg-bot/tcwg_glibc_check--master-arm	success	Test passed

Commit Message

Florian Weimer Sept. 29, 2024, 3:53 p.m. UTC

  According to Program Loading and Dynamic Linking in
<https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst>,
the maximum supported page size by the ABI is 64 KiB, so the
maximum page shift is 16 bits.
---
 sysdeps/aarch64/bits/pagesize.h | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 sysdeps/aarch64/bits/pagesize.h

diff mbox series

Patch

diff --git a/sysdeps/aarch64/bits/pagesize.h b/sysdeps/aarch64/bits/pagesize.h
new file mode 100644
index 0000000000..cd688d3fb0
--- /dev/null
+++ b/sysdeps/aarch64/bits/pagesize.h
@@ -0,0 +1,2 @@ 
+#define __GLIBC_PAGE_SHIFT_MIN 12
+#define __GLIBC_PAGE_SHIFT_MAX 16