Message ID | ad4e04090afc7409127ad85f3ce77f0ab67b80bf.1727624528.git.fweimer@redhat.com |
---|---|
State | Under Review |
Delegated to: | Adhemerval Zanella Netto |
Headers |
Return-Path: <libc-alpha-bounces~patchwork=sourceware.org@sourceware.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 274B6385E83F for <patchwork@sourceware.org>; Sun, 29 Sep 2024 16:24:20 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTP id 78656385E45C for <libc-alpha@sourceware.org>; Sun, 29 Sep 2024 16:23:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 78656385E45C Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 78656385E45C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=170.10.133.124 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1727627041; cv=none; b=DRkpNp/c/rMU0YprfB7gOyVwGjRqW2grSFGf1e2bHMZWl6mKCg2fymXAqt4B/i3s42JuMzLPVQTsFBzSChxtlsuFUmK3AFvDxIHsBYOXHp+pOVixYXin7BmDZB4TJJjuYxET3HEVUej9z/dASGjCOoTXwiUVXAjkfouWkMJmIdo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1727627041; c=relaxed/simple; bh=hmBip7TAg3TQr0KAv4O7oOmtdQKktwB1balIEPtUrIA=; h=DKIM-Signature:From:To:Subject:Message-ID:Date:MIME-Version; b=ADWq0rmFvl6p8XAFI2XaaRUxq2/rax06rIERc8rhVGKiktNFbR+nEYPtop5abix4vigwKex+ENZENoLDmHcQvLLBKcMh6nnXG+JaXoBkvc9UwQMi01I2JwM2s87fs1L/R/b2hv+nYEoxIn/qmj4h5+Zvts0mM1yNp85wAwW+2q8= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1727627039; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=qXmp/ijhmGNZwgyc2TdXHREYS9OMeEYO7qDerL75KkM=; b=Tz34TL1GgqU+P/qbIKbTQXbVEBYgJEJd67Wmmfi7UZU53ootOZUpltVj/8lFRvtMS3qrcU RzFGBwnZVJtuZfewo4KqUQB3XPKTyfLQiZLuKz+kQc2REdW5dHl2CSrvwIl3MKgdIoXrgp CZg+7nhMZ8whvQ99ssqM7auvaep9qMA= Received: from mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-132-tkQbRKi6PLCw7rqkKvo90Q-1; Sun, 29 Sep 2024 12:23:56 -0400 X-MC-Unique: tkQbRKi6PLCw7rqkKvo90Q-1 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (unknown [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 3579B195394C; Sun, 29 Sep 2024 16:23:55 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.45.224.151]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 1228C3003E4D; Sun, 29 Sep 2024 16:23:53 +0000 (UTC) From: Florian Weimer <fweimer@redhat.com> To: libc-alpha@sourceware.org Cc: Peter Bergner <bergner@linux.ibm.com> Subject: [PATCH v3 15/29] powerpc: Add <bits/pagesize.h> In-Reply-To: <cover.1727624528.git.fweimer@redhat.com> Message-ID: <ad4e04090afc7409127ad85f3ce77f0ab67b80bf.1727624528.git.fweimer@redhat.com> References: <cover.1727624528.git.fweimer@redhat.com> X-From-Line: ad4e04090afc7409127ad85f3ce77f0ab67b80bf Mon Sep 17 00:00:00 2001 Date: Sun, 29 Sep 2024 18:23:50 +0200 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list <libc-alpha.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/libc-alpha/> List-Post: <mailto:libc-alpha@sourceware.org> List-Help: <mailto:libc-alpha-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/libc-alpha>, <mailto:libc-alpha-request@sourceware.org?subject=subscribe> Errors-To: libc-alpha-bounces~patchwork=sourceware.org@sourceware.org |
Series |
Teach glibc about possible page sizes and handle gaps in ld.so
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Checks
Context | Check | Description |
---|---|---|
redhat-pt-bot/TryBot-apply_patch | success | Patch applied to master at the time it was sent |
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 | success | Build passed |
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 | success | Test passed |
linaro-tcwg-bot/tcwg_glibc_build--master-arm | success | Build passed |
linaro-tcwg-bot/tcwg_glibc_check--master-arm | success | Test passed |
Commit Message
Florian Weimer
Sept. 29, 2024, 4:23 p.m. UTC
According to arch/powerpc/Kconfig in the Linux kernel sources, PowerPC supports page sizes up to 256 KiB. However, in practice, only page sizes up to 64 KiB are used, especially on 64-bit targets. If 256 KiB page support is needed, it is probably best to add a configure check for linker LOAD segment alignment and generate a <bits/pagesize.h> file that has 256 KiB as the maximum page size. Regular toolchain defaults only support 64 KiB as the maximum page size. --- sysdeps/powerpc/bits/pagesize.h | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 sysdeps/powerpc/bits/pagesize.h
Comments
On 9/30/24 4:15 AM, Florian Weimer wrote: > * Maciej W. Rozycki: >> NB other page sizes are architecturally supported by TLB MMU hardware, >> from 1 KiB up to 256 TiB, but not by the MIPS port of Linux, so shouldn't >> this be sysdeps/unix/sysv/linux/mips/bits/pagesize.h instead, so as not to >> apply the limitations of MIPS/Linux to the generic MIPS architecture? > > In theory, any architecture could have future CPUs that support larger > page sizes, so there is no absolute strict upper limit. For > <sys/pagesize.h> to be useful to programmers, the maximum needs to > reflect what they can reasonably expect to matter during the life time > of the file format and application. Power supports page sizes much larger than 64K too, but given your response above... On 9/29/24 11:23 AM, Florian Weimer wrote: > According to arch/powerpc/Kconfig in the Linux kernel sources, > PowerPC supports page sizes up to 256 KiB. However, in practice, > only page sizes up to 64 KiB are used, especially on 64-bit targets. > > If 256 KiB page support is needed, it is probably best to add a > configure check for linker LOAD segment alignment and generate a > <bits/pagesize.h> file that has 256 KiB as the maximum page size. > Regular toolchain defaults only support 64 KiB as the maximum > page size. > --- > sysdeps/powerpc/bits/pagesize.h | 2 ++ > 1 file changed, 2 insertions(+) > create mode 100644 sysdeps/powerpc/bits/pagesize.h > > diff --git a/sysdeps/powerpc/bits/pagesize.h b/sysdeps/powerpc/bits/pagesize.h > new file mode 100644 > index 0000000000..cd688d3fb0 > --- /dev/null > +++ b/sysdeps/powerpc/bits/pagesize.h > @@ -0,0 +1,2 @@ > +#define __GLIBC_PAGE_SHIFT_MIN 12 > +#define __GLIBC_PAGE_SHIFT_MAX 16 LGTM. Reviewed-by: Peter Bergner <bergner@linux.ibm.com> Peter
diff --git a/sysdeps/powerpc/bits/pagesize.h b/sysdeps/powerpc/bits/pagesize.h new file mode 100644 index 0000000000..cd688d3fb0 --- /dev/null +++ b/sysdeps/powerpc/bits/pagesize.h @@ -0,0 +1,2 @@ +#define __GLIBC_PAGE_SHIFT_MIN 12 +#define __GLIBC_PAGE_SHIFT_MAX 16