From patchwork Fri Mar 4 16:07:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 11196 Received: (qmail 55405 invoked by alias); 4 Mar 2016 16:07:27 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 55395 invoked by uid 89); 4 Mar 2016 16:07:26 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=AmitPawaramdcom, Amit.Pawar@amd.com, amitpawaramdcom, amit.pawar@amd.com X-HELO: mail-qk0-f172.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=biPOI8lqoSX2HqtMLYjJQ4D2tP0Ehgpf+hpUcHf5aVg=; b=KruW7/uf/GDkUPiNcxh1oMbgcjXIO7EQNxV4yLuyclWNXugUxRKYMCser3++C+QLd9 eaZGsKKJqrgtHsvmJFzVjzswXji/HPTJDNqUmdRa/7z3mPcqgXc/3aWE4ky3hisuNKca xOkKoVQIZUtQQJeVLLkVkggshR4vqNQOgmrOw3tkRkC5IlSoAtpS1MXI1rK8JdteRbm/ X7pd4nFm8AmRSDlsT5FM/yP+IRihov8NrV2EiWpuec+PuOR8lMYfUwU9BX6/SnHt6LTy k9V6EwaztTMmEULApyoUmrHDiG+vh/GbM9ILycu8kaS1xLDLVNq2utgluu79RVdOtm+h uyDQ== X-Gm-Message-State: AD7BkJJRGI93iqvMr7yQMQtMjEGzPOVdU+pcWW8ZMuKkLDDyoTzxHpV21HoMXLutaACUFzUmTtqZA5IuIasfUg== MIME-Version: 1.0 X-Received: by 10.55.201.81 with SMTP id q78mr11004981qki.98.1457107643138; Fri, 04 Mar 2016 08:07:23 -0800 (PST) In-Reply-To: References: Date: Fri, 4 Mar 2016 08:07:22 -0800 Message-ID: Subject: Re: [PATCH x86_64] Fix for wrong selector in x86_64/multiarch/memcpy.S BZ #18880 From: "H.J. Lu" To: "Pawar, Amit" Cc: "libc-alpha@sourceware.org" On Thu, Mar 3, 2016 at 9:04 AM, Pawar, Amit wrote: >>Change looks good. If you can't commit it yourself, please improve commit >>log: >> >>1. Don't add your ChangLog entry in ChangeLog directly since other people may change ChangeLog. >>2. In ChangeLog entry, describe what you did, like check Fast_Unaligned_Load instead of Slow_BSF and >check Fast_Copy_Backward for __memcpy_ssse3_back. > > As per your suggestion, I have fixed the patch with improved commit log and also providing separate ChangeLog patch. If OK please commit it else let me know for any required changes. > > Thanks, > Amit Pawar > > This is the patch I am going to check in. From 2b4fee345d53eb8fc81461f2aefae74e9f3604ae Mon Sep 17 00:00:00 2001 From: Amit Pawar Date: Thu, 3 Mar 2016 22:24:21 +0530 Subject: [PATCH] x86-64: Fix memcpy IFUNC selection Chek Fast_Unaligned_Load, instead of Slow_BSF, and also check for Fast_Copy_Backward to enable __memcpy_ssse3_back. Existing selection order is updated with following selection order: 1. __memcpy_avx_unaligned if AVX_Fast_Unaligned_Load bit is set. 2. __memcpy_sse2_unaligned if Fast_Unaligned_Load bit is set. 3. __memcpy_sse2 if SSSE3 isn't available. 4. __memcpy_ssse3_back if Fast_Copy_Backward bit it set. 5. __memcpy_ssse3 [BZ #18880] * sysdeps/x86_64/multiarch/memcpy.S: Check Fast_Unaligned_Load instead of Slow_BSF and also check for Fast_Copy_Backward to enable __memcpy_ssse3_back. --- sysdeps/x86_64/multiarch/memcpy.S | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/sysdeps/x86_64/multiarch/memcpy.S b/sysdeps/x86_64/multiarch/memcpy.S index 64a1bcd..8882590 100644 --- a/sysdeps/x86_64/multiarch/memcpy.S +++ b/sysdeps/x86_64/multiarch/memcpy.S @@ -35,22 +35,23 @@ ENTRY(__new_memcpy) jz 1f HAS_ARCH_FEATURE (Prefer_No_VZEROUPPER) jz 1f - leaq __memcpy_avx512_no_vzeroupper(%rip), %rax + lea __memcpy_avx512_no_vzeroupper(%rip), %RAX_LP ret #endif -1: leaq __memcpy_avx_unaligned(%rip), %rax +1: lea __memcpy_avx_unaligned(%rip), %RAX_LP HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load) - jz 2f - ret -2: leaq __memcpy_sse2(%rip), %rax - HAS_ARCH_FEATURE (Slow_BSF) - jnz 3f - leaq __memcpy_sse2_unaligned(%rip), %rax - ret -3: HAS_CPU_FEATURE (SSSE3) - jz 4f - leaq __memcpy_ssse3(%rip), %rax -4: ret + jnz 2f + lea __memcpy_sse2_unaligned(%rip), %RAX_LP + HAS_ARCH_FEATURE (Fast_Unaligned_Load) + jnz 2f + lea __memcpy_sse2(%rip), %RAX_LP + HAS_CPU_FEATURE (SSSE3) + jz 2f + lea __memcpy_ssse3_back(%rip), %RAX_LP + HAS_ARCH_FEATURE (Fast_Copy_Backward) + jnz 2f + lea __memcpy_ssse3(%rip), %RAX_LP +2: ret END(__new_memcpy) # undef ENTRY -- 2.5.0