From patchwork Sun Feb 7 15:26:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 41957 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 8C285394EC11; Sun, 7 Feb 2021 15:26:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 8C285394EC11 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1612711619; bh=mR0/AJfla9869ZAW1NosRcRjNzsI7QhKxGdKaPh8TV0=; h=References:In-Reply-To:Date:Subject:To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=HvjUgLSR489pykrw90ggETuotW0JswO9BcH7To6qdPOcVhDpe2zJ9FjJe9sR5AFgP oSY5svlPpQW59WxP0RfiAmUIyDse3nwTSVHa+GhJpCHztl2WMeA+rLGEqCpxrltLh0 ZFDDipWBMxoeozXY19On6YigXawsrp1DPz1OB/Cg= X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-oo1-xc33.google.com (mail-oo1-xc33.google.com [IPv6:2607:f8b0:4864:20::c33]) by sourceware.org (Postfix) with ESMTPS id 427A938618BD for ; Sun, 7 Feb 2021 15:26:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 427A938618BD Received: by mail-oo1-xc33.google.com with SMTP id 123so2857878ooi.13 for ; Sun, 07 Feb 2021 07:26:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=mR0/AJfla9869ZAW1NosRcRjNzsI7QhKxGdKaPh8TV0=; b=GvIWdT7ke47HnjZDngcfDyds9vLQKF1c8QGrXaC5nrUgE6i9GB9+HMxhmv1+BcqkDi wpMvqB/+EUiJwFJP4nfm04DmqVHDsR37ZfvsmUwx5aKmrE2y6jda3VLSYO9Wg+C42pxY fbApRLYxSsbAJ/lLoYc7uGiM9vPhRZo4l2EGkwl82y4cvJrhmN3LwbUWWM/hvvXzPhDo ShvOs26fyHfq0/iGZPPF8qOhGw+4iBi46D/fANBGl/X1KqsNxNv9+m3teKRzVEjxtuds n+1iKCVEHr5MYJbb1eeQaGIOjHB6ilv91MnUpa6mm07cjBdj/Kz8wYRu/dVwgwSnyi7C t1wQ== X-Gm-Message-State: AOAM532agG9RoEDPm4h0btqaRXYW6YA9Z9gt4nQji7zXG6bCVYW3wS+/ Y3JKl/LNGwa3NZLC9Z0GPqo2FLMd5d68gxII4c8= X-Google-Smtp-Source: ABdhPJzCkpFcD7pAOtCMxkA7Z2wiIRDlYu2dIbOQX07sOUyWxWXxdIps5Nt2nrScu4nC1YTnCQwqjbO926Z0VK5jOlU= X-Received: by 2002:a4a:ca99:: with SMTP id x25mr9781348ooq.35.1612711615687; Sun, 07 Feb 2021 07:26:55 -0800 (PST) MIME-Version: 1.0 References: <20210205140915.3544462-1-hjl.tools@gmail.com> <87o8gw89y5.fsf@oldenburg.str.redhat.com> In-Reply-To: <87o8gw89y5.fsf@oldenburg.str.redhat.com> Date: Sun, 7 Feb 2021 07:26:19 -0800 Message-ID: Subject: [PATCH v2] x86: Add PTWRITE feature detection [BZ #27346] To: Florian Weimer X-Spam-Status: No, score=-3036.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Libc-alpha" From: "H.J. Lu" Reply-To: "H.J. Lu" Cc: "H.J. Lu via Libc-alpha" Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" On Sun, Feb 7, 2021 at 2:10 AM Florian Weimer wrote: > > * H. J. Lu via Libc-alpha: > > > 1. Add CPUID_INDEX_14 for CPUID leaf 0x14 to detect PTWRITE feature in > > EBX of CPUID leaf 0x14. > > The processor manual suggests that index 0x14h has subleaves, so should > this be CPUID_INDEX_14_ECX_0? Good idea. Fixed. > The bit position looks correct to me, and copying it from the feature > bits to the usable bits also appears to be correct. (I assume the > instruction is a NOP if not enabled by the kernel.) > I think so since operand passed to PTWRITE should be valid. Here is the updated patch. OK for master? Thanks. From 7234b7a9a6bca7443900a44996c324cc354284c5 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 4 Feb 2021 10:39:34 -0800 Subject: [PATCH v2] x86: Add PTWRITE feature detection [BZ #27346] 1. Add CPUID_INDEX_14_ECX_0 for CPUID leaf 0x14 to detect PTWRITE feature in EBX of CPUID leaf 0x14 with ECX == 0. 2. Add PTWRITE detection to CPU feature tests. 3. Add 2 static CPU feature tests. --- manual/platform.texi | 3 +++ sysdeps/x86/Makefile | 7 +++++-- sysdeps/x86/bits/platform/x86.h | 11 +++++++++-- sysdeps/x86/cpu-features.c | 8 ++++++++ sysdeps/x86/include/cpu-features.h | 17 ++++++++++++++++- sysdeps/x86/tst-cpu-features-cpuinfo-static.c | 1 + sysdeps/x86/tst-cpu-features-cpuinfo.c | 1 + sysdeps/x86/tst-cpu-features-supports-static.c | 1 + sysdeps/x86/tst-cpu-features-supports.c | 1 + sysdeps/x86/tst-get-cpu-features.c | 2 ++ 10 files changed, 47 insertions(+), 5 deletions(-) create mode 100644 sysdeps/x86/tst-cpu-features-cpuinfo-static.c create mode 100644 sysdeps/x86/tst-cpu-features-supports-static.c diff --git a/manual/platform.texi b/manual/platform.texi index 6caf68d796..a0b204b099 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -487,6 +487,9 @@ extended state management using XSAVE/XRSTOR. @item @code{PSN} -- Processor Serial Number. +@item +@code{PTWRITE} -- PTWRITE instruction. + @item @code{RDPID} -- RDPID instruction. diff --git a/sysdeps/x86/Makefile b/sysdeps/x86/Makefile index dd82674342..e1f9379fd8 100644 --- a/sysdeps/x86/Makefile +++ b/sysdeps/x86/Makefile @@ -8,8 +8,11 @@ sysdep-dl-routines += dl-get-cpu-features sysdep_headers += sys/platform/x86.h tests += tst-get-cpu-features tst-get-cpu-features-static \ - tst-cpu-features-cpuinfo tst-cpu-features-supports -tests-static += tst-get-cpu-features-static + tst-cpu-features-cpuinfo tst-cpu-features-cpuinfo-static \ + tst-cpu-features-supports tst-cpu-features-supports-static +tests-static += tst-get-cpu-features-static \ + tst-cpu-features-cpuinfo-static \ + tst-cpu-features-supports-static ifeq (yes,$(have-ifunc)) tests += \ tst-ifunc-isa-1 \ diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h index dd59224b7f..fe08d8a1b6 100644 --- a/sysdeps/x86/bits/platform/x86.h +++ b/sysdeps/x86/bits/platform/x86.h @@ -29,7 +29,8 @@ enum CPUID_INDEX_80000007, CPUID_INDEX_80000008, CPUID_INDEX_7_ECX_1, - CPUID_INDEX_19 + CPUID_INDEX_19, + CPUID_INDEX_14_ECX_0 }; struct cpuid_feature @@ -295,5 +296,11 @@ enum + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), x86_cpu_AESKLE = x86_cpu_index_19_ebx, - x86_cpu_WIDE_KL = x86_cpu_index_19_ebx + 2 + x86_cpu_WIDE_KL = x86_cpu_index_19_ebx + 2, + + x86_cpu_index_14_ecx_0_ebx + = (CPUID_INDEX_14_ECX_0 * 8 * 4 * sizeof (unsigned int) + + cpuid_register_index_ebx * 8 * sizeof (unsigned int)), + + x86_cpu_PTWRITE = x86_cpu_index_14_ecx_0_ebx + 4 }; diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 7996ed0cd2..d7248cbb45 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -97,6 +97,7 @@ update_usable (struct cpu_features *cpu_features) CPU_FEATURE_SET_USABLE (cpu_features, FZLRM); CPU_FEATURE_SET_USABLE (cpu_features, FSRS); CPU_FEATURE_SET_USABLE (cpu_features, FSRCS); + CPU_FEATURE_SET_USABLE (cpu_features, PTWRITE); /* Can we call xgetbv? */ if (CPU_FEATURES_CPU_P (cpu_features, OSXSAVE)) @@ -359,6 +360,13 @@ get_common_indices (struct cpu_features *cpu_features, cpu_features->features[CPUID_INDEX_D_ECX_1].cpuid.ecx, cpu_features->features[CPUID_INDEX_D_ECX_1].cpuid.edx); + if (cpu_features->basic.max_cpuid >= 0x14) + __cpuid_count (0x14, 0, + cpu_features->features[CPUID_INDEX_14_ECX_0].cpuid.eax, + cpu_features->features[CPUID_INDEX_14_ECX_0].cpuid.ebx, + cpu_features->features[CPUID_INDEX_14_ECX_0].cpuid.ecx, + cpu_features->features[CPUID_INDEX_14_ECX_0].cpuid.edx); + if (cpu_features->basic.max_cpuid >= 0x19) __cpuid_count (0x19, 0, cpu_features->features[CPUID_INDEX_19].cpuid.eax, diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu-features.h index 475e877294..dabe6b9d86 100644 --- a/sysdeps/x86/include/cpu-features.h +++ b/sysdeps/x86/include/cpu-features.h @@ -29,7 +29,7 @@ enum { - CPUID_INDEX_MAX = CPUID_INDEX_19 + 1 + CPUID_INDEX_MAX = CPUID_INDEX_14_ECX_0 + 1 }; enum @@ -307,6 +307,11 @@ enum #define bit_cpu_AESKLE (1u << 0) #define bit_cpu_WIDE_KL (1u << 2) +/* CPUID_INDEX_14_ECX_0. */ + +/* EBX. */ +#define bit_cpu_PTWRITE (1u << 4) + /* CPUID_INDEX_1. */ /* ECX. */ @@ -532,6 +537,11 @@ enum #define index_cpu_AESKLE CPUID_INDEX_19 #define index_cpu_WIDE_KL CPUID_INDEX_19 +/* CPUID_INDEX_14_ECX_0. */ + +/* EBX. */ +#define index_cpu_PTWRITE CPUID_INDEX_14_ECX_0 + /* CPUID_INDEX_1. */ /* ECX. */ @@ -757,6 +767,11 @@ enum #define reg_AESKLE ebx #define reg_WIDE_KL ebx +/* CPUID_INDEX_14_ECX_0. */ + +/* EBX. */ +#define reg_PTWRITE ebx + /* PREFERRED_FEATURE_INDEX_1. */ #define bit_arch_I586 (1u << 0) #define bit_arch_I686 (1u << 1) diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo-static.c b/sysdeps/x86/tst-cpu-features-cpuinfo-static.c new file mode 100644 index 0000000000..993a1a95f7 --- /dev/null +++ b/sysdeps/x86/tst-cpu-features-cpuinfo-static.c @@ -0,0 +1 @@ +#include "tst-cpu-features-cpuinfo.c" diff --git a/sysdeps/x86/tst-cpu-features-cpuinfo.c b/sysdeps/x86/tst-cpu-features-cpuinfo.c index 95cefb5738..3f1150a329 100644 --- a/sysdeps/x86/tst-cpu-features-cpuinfo.c +++ b/sysdeps/x86/tst-cpu-features-cpuinfo.c @@ -198,6 +198,7 @@ do_test (int argc, char **argv) fails += CHECK_PROC (popcnt, POPCNT); fails += CHECK_PROC (3dnowprefetch, PREFETCHW); fails += CHECK_PROC (prefetchwt1, PREFETCHWT1); + fails += CHECK_PROC (ptwrite, PTWRITE); fails += CHECK_PROC (pse, PSE); fails += CHECK_PROC (pse36, PSE_36); fails += CHECK_PROC (psn, PSN); diff --git a/sysdeps/x86/tst-cpu-features-supports-static.c b/sysdeps/x86/tst-cpu-features-supports-static.c new file mode 100644 index 0000000000..38f4046bb8 --- /dev/null +++ b/sysdeps/x86/tst-cpu-features-supports-static.c @@ -0,0 +1 @@ +#include "tst-cpu-features-supports.c" diff --git a/sysdeps/x86/tst-cpu-features-supports.c b/sysdeps/x86/tst-cpu-features-supports.c index 79d803eb29..ce78a7d8bc 100644 --- a/sysdeps/x86/tst-cpu-features-supports.c +++ b/sysdeps/x86/tst-cpu-features-supports.c @@ -149,6 +149,7 @@ do_test (int argc, char **argv) fails += CHECK_SUPPORTS (popcnt, POPCNT); #if __GNUC_PREREQ (11, 0) fails += CHECK_SUPPORTS (prefetchwt1, PREFETCHWT1); + fails += CHECK_SUPPORTS (ptwrite, PTWRITE); fails += CHECK_SUPPORTS (rdpid, RDPID); fails += CHECK_SUPPORTS (rdrnd, RDRAND); fails += CHECK_SUPPORTS (rdseed, RDSEED); diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index b5e7f6e7b0..583e1e6d49 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -203,6 +203,7 @@ do_test (void) CHECK_CPU_FEATURE (LAM); CHECK_CPU_FEATURE (AESKLE); CHECK_CPU_FEATURE (WIDE_KL); + CHECK_CPU_FEATURE (PTWRITE); printf ("Usable CPU features:\n"); CHECK_CPU_FEATURE_USABLE (SSE3); @@ -364,6 +365,7 @@ do_test (void) CHECK_CPU_FEATURE_USABLE (FSRCS); CHECK_CPU_FEATURE_USABLE (AESKLE); CHECK_CPU_FEATURE_USABLE (WIDE_KL); + CHECK_CPU_FEATURE_USABLE (PTWRITE); return 0; } -- 2.29.2