From patchwork Tue Nov 24 13:22:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 9801 Received: (qmail 33395 invoked by alias); 24 Nov 2015 13:22:50 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 33384 invoked by uid 89); 24 Nov 2015 13:22:49 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f175.google.com MIME-Version: 1.0 X-Received: by 10.60.93.170 with SMTP id cv10mr19746432oeb.38.1448371361228; Tue, 24 Nov 2015 05:22:41 -0800 (PST) In-Reply-To: References: <563B276D.4010403@redhat.com> Date: Tue, 24 Nov 2015 05:22:41 -0800 Message-ID: Subject: Re: [PATCH] Fixed family and model detection for AMD CPU's From: "H.J. Lu" To: "Pawar, Amit" Cc: Joseph Myers , Florian Weimer , "libc-alpha@sourceware.org" On Tue, Nov 24, 2015 at 2:58 AM, Pawar, Amit wrote: > Please find the attached recreated patch to this mail. Bugzilla ID included in Glibc Changelog and git commit log. > > Problem: In GLIBC Family and model values detection are incorrect. > Why this fix? > Based on arch ISA flags string and memory routines are selected. In future patches, will be defining ISA flags based on family > and model values which will help in selecting the correct string or memory routines. > > Is it OK to apply? > Try this one instead. diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index b03451d..fba3ef0 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -21,7 +21,8 @@ static inline void get_common_indeces (struct cpu_features *cpu_features, - unsigned int *family, unsigned int *model) + unsigned int *family, unsigned int *model, + unsigned int *extended_model) { unsigned int eax; __cpuid (1, eax, cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx, @@ -30,6 +31,12 @@ get_common_indeces (struct cpu_features *cpu_features, GLRO(dl_x86_cpu_features).cpuid[COMMON_CPUID_INDEX_1].eax = eax; *family = (eax >> 8) & 0x0f; *model = (eax >> 4) & 0x0f; + *extended_model = (eax >> 12) & 0xf0; + if (*family == 0x0f) + { + *family += (eax >> 20) & 0xff; + *model += *extended_model; + } } static inline void @@ -53,19 +60,13 @@ init_cpu_features (struct cpu_features *cpu_features) /* This spells out "GenuineIntel". */ if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69) { + unsigned int extended_model; + kind = arch_kind_intel; - get_common_indeces (cpu_features, &family, &model); + get_common_indeces (cpu_features, &family, &model, &extended_model); - unsigned int eax = cpu_features->cpuid[COMMON_CPUID_INDEX_1].eax; - unsigned int extended_family = (eax >> 20) & 0xff; - unsigned int extended_model = (eax >> 12) & 0xf0; - if (family == 0x0f) - { - family += extended_family; - model += extended_model; - } - else if (family == 0x06) + if (family == 0x06) { ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx; model += extended_model; @@ -132,9 +133,11 @@ init_cpu_features (struct cpu_features *cpu_features) /* This spells out "AuthenticAMD". */ else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65) { + unsigned int extended_model; + kind = arch_kind_amd; - get_common_indeces (cpu_features, &family, &model); + get_common_indeces (cpu_features, &family, &model, &extended_model); ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx;