From patchwork Fri Jun 30 22:13:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 21377 Received: (qmail 119711 invoked by alias); 30 Jun 2017 22:13:34 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 119696 invoked by uid 89); 30 Jun 2017 22:13:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.9 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=mrs X-Spam-User: qpsmtpd, 2 recipients X-HELO: mail-pg0-f65.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=m2AgbvXZPTKIZwxKwt8wtyZKYoUYIH8nOR6ck0ZqrzY=; b=na+dOA7aa3KpV9JAhxBBVtRBwaAA4/z2hNJHwDemDbd4mEN+As/CfbEV/QGHDqEX6o uinF/7hzO82w9u2OWju3Bota3OKmSbVM23xhCtW+Flfj8cXBxPggex6K9j86oqO9/RoL iCmrJT170MI061Wl8yPI28kinf+nYwirimi7ofbV2DkpuZH6wtfLfWgC4BO9JWQUFnfe sqQsccXDz9y/RUQiUo/ysZ+0gJR38kv5Hdr9n9b3b3grWP3LZbzSXlZZkQur56a3fzxn 6qsZngrOOIUeNVOojdHds3Shct4qE79hff4UmBASMs//n+o0Y8DxDe0sV8axkFvZTnfZ 8xdg== X-Gm-Message-State: AKS2vOw70H6heJaeRHf0mcpLhMjgUyUYUtbk87UA5TZjM6WNrm4/fKKV TVrePNjNsw70h3KbjGOTtNeiyk93hA== X-Received: by 10.84.217.220 with SMTP id d28mr27753217plj.218.1498860810706; Fri, 30 Jun 2017 15:13:30 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1498729954-15927-1-git-send-email-siddhesh@sourceware.org> References: <1498729954-15927-1-git-send-email-siddhesh@sourceware.org> From: Ramana Radhakrishnan Date: Fri, 30 Jun 2017 23:13:29 +0100 Message-ID: Subject: Re: [PATCH v2] tunables, aarch64: New tunable to override cpu To: Siddhesh Poyarekar Cc: GNU C Library On Thu, Jun 29, 2017 at 10:52 AM, Siddhesh Poyarekar wrote: > Add a new tunable (glibc.tune.cpu) to override CPU identification on > aarch64. This is useful in two cases: one where it is desirable to > pretend to be another CPU for purposes of testing or because routines > written for that CPU are beneficial for specific workloads and second > where the underlying kernel does not support emulation of MRS to get > the MIDR of the CPU. How was this tested ? I see breakages because ... > --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c > +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c > @@ -20,18 +20,53 @@ > #include > #include > > +#if HAVE_TUNABLES > +struct cpu_list > +{ > + const char *name; > + uint64_t midr; > +}; > + > +static struct cpu_list cpu_list[] = { > + {"thunderxt88", 0x430F0A10}, > + {"generic", 0x0} > +}; > + > +static uint64_t > +get_midr_from_mcpu (const char *mcpu) > +{ > + for (int i = 0; i < sizeof (cpu_list) / sizeof (struct cpu_list); i++) > + if (tunable_is_name (mcpu, cpu_list[i].name) == 0) > + return cpu_list[i].midr; > + > + return UINT64_MAX; > +} > +#endif > + > static inline void > init_cpu_features (struct cpu_features *cpu_features) > { > uint64_t hwcap_mask = GET_HWCAP_MASK(); > uint64_t hwcap = GLRO (dl_hwcap) & hwcap_mask; > > - if (hwcap & HWCAP_CPUID) > + register uint64_t midr = UINT64_MAX; > + > +#if HAVE_TUNABLES > + /* Get the tunable override. */ > + const char *mcpu = TUNABLE_GET (glibc, tune, mcpu, const char *, NULL); Shouldn't this be TUNABLE_GET (glibc, tune, cpu, const char * , NULL); I don't have write privileges in glibc but the attached appears to be an obvious fix and allows the build to complete. Are there any tests for tunables btw ? regards Ramana > + if (mcpu != NULL) > + midr = get_midr_from_mcpu (mcpu); > +#endif > + > + /* If there was no useful tunable override, query the MIDR if the kernel > + allows it. */ > + if (midr == UINT64_MAX) > { > - register uint64_t id = 0; > - asm volatile ("mrs %0, midr_el1" : "=r"(id)); > - cpu_features->midr_el1 = id; > + if (hwcap & HWCAP_CPUID) > + asm volatile ("mrs %0, midr_el1" : "=r"(midr)); > + else > + midr = 0; > } > - else > - cpu_features->midr_el1 = 0; > + > + cpu_features->midr_el1 = midr; > } > -- > 2.7.4 > diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 47c7d97..0275d11 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -53,7 +53,7 @@ init_cpu_features (struct cpu_features *cpu_features) #if HAVE_TUNABLES /* Get the tunable override. */ - const char *mcpu = TUNABLE_GET (glibc, tune, mcpu, const char *, NULL); + const char *mcpu = TUNABLE_GET (glibc, tune, cpu, const char *, NULL); if (mcpu != NULL) midr = get_midr_from_mcpu (mcpu); #endif