From patchwork Tue Dec 18 09:49:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feng Xue OS X-Patchwork-Id: 30718 Received: (qmail 130257 invoked by alias); 18 Dec 2018 09:50:02 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 129821 invoked by uid 89); 18 Dec 2018 09:50:01 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS autolearn=ham version=3.3.2 spammy=feng, Feng X-HELO: NAM01-SN1-obe.outbound.protection.outlook.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amperemail.onmicrosoft.com; s=selector1-os-amperecomputing-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OrXaE28uf/pwlKnlYUtAAYlmHl26f1ZBtPSAgae6p7Q=; b=OxiG/Ps4oHLAVyL2jN8C3RS6MyeEgq2z0FQ5P+1MD6qe4XA2uzUIzhusvogR4L1n9kke8IFW3ZnoPj2VkmpPBTWnLJxH1QCl0q6FGYTDSkv7YT6HSKGmx0byovkVh//op+oblSN1oagn4HgNuIy+8crYD9v11QbH5ze9qkhcHas= From: Feng Xue To: "libc-alpha@sourceware.org" CC: Feng Xue Subject: [PATCH 0/3] aarch64: Add AmpereComputing emag to tunable cpu list Date: Tue, 18 Dec 2018 09:49:55 +0000 Message-ID: authentication-results: spf=none (sender IP is ) smtp.mailfrom=fxue@os.amperecomputing.com; received-spf: None (protection.outlook.com: os.amperecomputing.com does not designate permitted sender hosts) MIME-Version: 1.0 This patch and following patches are from AmpereComputing, which target AmpereComputing's emag processor. Hope your code reviews on these patches. And we have already signed a copyright assignement with the FSF. Thanks, Feng --- Emag is a 64-bit CPU core released by AmpereComputing. Add its name to cpu list, and corresponding macro as utilities for later IFUNC dispatch. * manual/tunables.texi (Tunable glibc.cpu.name): Add emag. * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): Add emag. * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_EMAG): New macro. --- ChangeLog | 8 ++++++++ manual/tunables.texi | 2 +- sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 + sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 3 +++ 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/ChangeLog b/ChangeLog index e0e7a74..ee2119b 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,11 @@ +2018-12-17 Feng Xue + + * manual/tunables.texi (Tunable glibc.cpu.name): Add emag. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): + Add emag. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_EMAG): + New macro. + 2018-12-15 Paul Eggert regex: fix storage-exhaustion error diff --git a/manual/tunables.texi b/manual/tunables.texi index 09a2565..1a20e95 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -360,7 +360,7 @@ This tunable is specific to powerpc, powerpc64 and powerpc64le. The @code{glibc.cpu.name=xxx} tunable allows the user to tell @theglibc{} to assume that the CPU is @code{xxx} where xxx may have one of these values: @code{generic}, @code{falkor}, @code{thunderxt88}, @code{thunderx2t99}, -@code{thunderx2t99p1}. +@code{thunderx2t99p1}, @code{emag}. This tunable is specific to aarch64. @end deftp diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index b4f3485..07138ea 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -36,6 +36,7 @@ static struct cpu_list cpu_list[] = { {"thunderx2t99", 0x431F0AF0}, {"thunderx2t99p1", 0x420F5160}, {"phecda", 0x680F0000}, + {"emag", 0x503F0001}, {"generic", 0x0} }; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index eb35adf..95b17d4 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -52,6 +52,9 @@ #define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h' \ && MIDR_PARTNUM(midr) == 0x000) +#define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ + && MIDR_PARTNUM(midr) == 0x000) + struct cpu_features { uint64_t midr_el1;